Searched refs:Cond (Results 26 - 50 of 156) sorted by relevance

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/external/clang/test/SemaTemplate/
H A Dinstantiate-expr-3.cpp80 template<bool Cond, typename T, typename U, typename Result>
83 Result r = __builtin_choose_expr(Cond, t, u); // expected-error{{lvalue}}
/external/llvm/lib/CodeGen/
H A DCodePlacementOpt.cpp78 SmallVector<MachineOperand, 4> Cond; local
79 if (TII->AnalyzeBranch(*MBB, TBB, FBB, Cond))
85 if (Cond.empty() && TBB)
107 SmallVector<MachineOperand, 4> Cond; local
109 if (TII->AnalyzeBranch(*MBB, TBB, FBB, Cond))
117 if (1u + !Cond.empty() != MBB->succ_size())
120 if (!Cond.empty() && TII->ReverseBranchCondition(Cond))
H A DMachineBasicBlock.cpp355 SmallVector<MachineOperand, 4> Cond; local
357 bool B = TII->AnalyzeBranch(*this, TBB, FBB, Cond);
360 if (Cond.empty()) {
385 TII->InsertBranch(*this, TBB, 0, Cond, dl);
393 if (TII->ReverseBranchCondition(Cond))
396 TII->InsertBranch(*this, FBB, 0, Cond, dl);
399 TII->InsertBranch(*this, TBB, 0, Cond, dl);
423 TII->InsertBranch(*this, TBB, 0, Cond, dl);
429 if (TII->ReverseBranchCondition(Cond)) {
431 Cond
604 SmallVector<MachineOperand, 4> Cond; local
647 SmallVector<MachineOperand, 4> Cond; local
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H A DIfConversion.cpp83 /// TargetInstrInfo::AnalyzeBranch() (i.e. TBB, FBB, and Cond), and its
189 bool FeasibilityAnalysis(BBInfo &BBI, SmallVectorImpl<MachineOperand> &Cond,
200 SmallVectorImpl<MachineOperand> &Cond,
204 SmallVectorImpl<MachineOperand> &Cond,
734 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
736 if (TII->ReverseBranchCondition(Cond))
740 !TII->SubsumesPredicate(Cond, RevPred))
959 SmallVector<MachineOperand, 4> Cond; local
960 if (!TII->AnalyzeBranch(*BBI.BB, TBB, FBB, Cond))
961 BBI.BB->CorrectExtraCFGEdges(TBB, FBB, !Cond
1436 PredicateBlock(BBInfo &BBI, MachineBasicBlock::iterator E, SmallVectorImpl<MachineOperand> &Cond, SmallSet<unsigned, 4> &Redefs, SmallSet<unsigned, 4> *LaterRedefs) argument
1480 CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI, SmallVectorImpl<MachineOperand> &Cond, SmallSet<unsigned, 4> &Redefs, bool IgnoreBr) argument
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/external/clang/lib/Sema/
H A DScopeInfo.cpp141 if (const ConditionalOperator *Cond = dyn_cast<ConditionalOperator>(E)) {
142 markSafeWeakUse(Cond->getTrueExpr());
143 markSafeWeakUse(Cond->getFalseExpr());
147 if (const BinaryConditionalOperator *Cond =
149 markSafeWeakUse(Cond->getCommon());
150 markSafeWeakUse(Cond->getFalseExpr());
/external/llvm/lib/Target/R600/
H A DSIAnnotateControlFlow.cpp80 void handleLoopCondition(Value *Cond);
203 void SIAnnotateControlFlow::handleLoopCondition(Value *Cond) { argument
204 if (PHINode *Phi = dyn_cast<PHINode>(Cond)) {
246 } else if (Instruction *Inst = dyn_cast<Instruction>(Cond)) {
249 Value *Args[] = { Cond, PhiInserter.GetValueAtEndOfBlock(Parent) };
266 Value *Cond = Term->getCondition(); local
268 handleLoopCondition(Cond);
H A DR600InstrInfo.h72 bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
75 SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const;
77 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const;
H A DR600InstrInfo.cpp234 SmallVectorImpl<MachineOperand> &Cond,
268 Cond.push_back(predSet->getOperand(1));
269 Cond.push_back(predSet->getOperand(2));
270 Cond.push_back(MachineOperand::CreateReg(AMDGPU::PRED_SEL_ONE, false));
288 Cond.push_back(predSet->getOperand(1));
289 Cond.push_back(predSet->getOperand(2));
290 Cond.push_back(MachineOperand::CreateReg(AMDGPU::PRED_SEL_ONE, false));
312 const SmallVectorImpl<MachineOperand> &Cond,
317 if (Cond.empty()) {
324 PredSet->getOperand(2).setImm(Cond[
231 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
309 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument
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/external/llvm/lib/Target/Sparc/
H A DSparcInstrInfo.cpp130 SmallVectorImpl<MachineOperand> &Cond,
162 Cond.clear();
183 if (Cond.empty()) {
219 Cond.push_back(MachineOperand::CreateImm(BranchCode));
232 const SmallVectorImpl<MachineOperand> &Cond,
235 assert((Cond.size() == 1 || Cond.size() == 0) &&
238 if (Cond.empty()) {
245 unsigned CC = Cond[0].getImm();
127 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
230 InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument
/external/llvm/lib/Transforms/Scalar/
H A DCorrelatedValuePropagation.cpp206 Value *Cond = SI->getCondition(); local
211 if (isa<Instruction>(Cond) && cast<Instruction>(Cond)->getParent() == BB)
231 Cond, Case, *PI, BB);
260 Cond = SI->getCondition();
/external/llvm/lib/Target/MBlaze/
H A DMBlazeInstrInfo.h200 SmallVectorImpl<MachineOperand> &Cond,
204 const SmallVectorImpl<MachineOperand> &Cond,
208 virtual bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond)
/external/clang/test/SemaCXX/
H A Dconditional-expr.cpp236 void f(bool Cond, String S, OtherString OS) { argument
237 (void)(Cond? S : "");
238 (void)(Cond? "" : S);
240 (void)(Cond? S : a);
241 (void)(Cond? a : S);
242 (void)(Cond? OS : S);
H A Dconversion-function.cpp111 AutoPtr test_auto_ptr(bool Cond) { argument
115 if (Cond)
/external/llvm/lib/IR/
H A DConstantFold.h35 Constant *ConstantFoldSelectInstruction(Constant *Cond,
/external/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.h59 SmallVectorImpl<MachineOperand> &Cond,
66 const SmallVectorImpl<MachineOperand> &Cond,
117 const SmallVectorImpl<MachineOperand> &Cond) const;
137 ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
H A DHexagonHardwareLoops.cpp372 SmallVector<MachineOperand,2> Cond; local
374 bool NotAnalyzed = TII->AnalyzeBranch(*Latch, TB, FB, Cond, false);
378 unsigned CSz = Cond.size();
380 unsigned PredR = Cond[CSz-1].getReg();
480 SmallVector<MachineOperand,2> Cond;
482 bool NotAnalyzed = TII->AnalyzeBranch(*Latch, TB, FB, Cond, false);
496 // to put imm(0), followed by P in the vector Cond.
499 bool Negated = (Cond.size() > 1) ^ (TB != Header);
500 unsigned PredReg = Cond[Cond
1136 SmallVector<MachineOperand, 0> Cond; local
1302 SmallVector<MachineOperand,2> Cond; local
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H A DHexagonInstrInfo.cpp117 const SmallVectorImpl<MachineOperand> &Cond,
129 if (!Cond.empty() && Cond[0].isImm() && Cond[0].getImm() == 0) {
135 if (Cond.empty()) {
141 SmallVector<MachineOperand, 4> Cond; local
143 if (isPredicated(Term) && !AnalyzeBranch(MBB, NewTBB, NewFBB, Cond,
148 ReverseBranchCondition(Cond);
150 return InsertBranch(MBB, TBB, 0, Cond, DL);
156 get(BccOpc)).addReg(Cond[regPo
115 InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument
168 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
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/external/llvm/lib/Transforms/Utils/
H A DCloneFunction.cpp305 ConstantInt *Cond = dyn_cast<ConstantInt>(BI->getCondition()); local
307 if (Cond == 0) {
309 Cond = dyn_cast_or_null<ConstantInt>(V);
313 if (Cond) {
314 BasicBlock *Dest = BI->getSuccessor(!Cond->getZExtValue());
322 ConstantInt *Cond = dyn_cast<ConstantInt>(SI->getCondition()); local
323 if (Cond == 0) { // Or known constant after constant prop in the callee...
325 Cond = dyn_cast_or_null<ConstantInt>(V);
327 if (Cond) { // Constant fold to uncond branch!
328 SwitchInst::ConstCaseIt Case = SI->findCaseValue(Cond);
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/external/llvm/lib/Target/X86/
H A DX86InstrInfo.h218 SmallVectorImpl<MachineOperand> &Cond,
223 const SmallVectorImpl<MachineOperand> &Cond,
226 const SmallVectorImpl<MachineOperand> &Cond,
231 const SmallVectorImpl<MachineOperand> &Cond,
338 bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
/external/llvm/include/llvm/Target/
H A DTargetInstrInfo.h264 SmallVectorImpl<MachineOperand> &Cond,
288 const SmallVectorImpl<MachineOperand> &Cond,
364 /// condition code in Cond.
367 /// FalseReg, and Cond to the destination register. The Cond latency should
374 /// @param Cond Condition returned by AnalyzeBranch.
375 /// @param TrueReg Virtual register to select when Cond is true.
376 /// @param FalseReg Virtual register to select when Cond is false.
377 /// @param CondCycles Latency from Cond+Branch to select output.
381 const SmallVectorImpl<MachineOperand> &Cond,
262 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify = false) const argument
286 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument
380 canInsertSelect(const MachineBasicBlock &MBB, const SmallVectorImpl<MachineOperand> &Cond, unsigned TrueReg, unsigned FalseReg, int &CondCycles, int &TrueCycles, int &FalseCycles) const argument
404 insertSelect(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DstReg, const SmallVectorImpl<MachineOperand> &Cond, unsigned TrueReg, unsigned FalseReg) const argument
430 analyzeSelect(const MachineInstr *MI, SmallVectorImpl<MachineOperand> &Cond, unsigned &TrueOp, unsigned &FalseOp, bool &Optimizable) const argument
[all...]
/external/llvm/lib/Analysis/
H A DBranchProbabilityInfo.cpp203 Value *Cond = BI->getCondition();
204 ICmpInst *CI = dyn_cast<ICmpInst>(Cond);
290 Value *Cond = BI->getCondition();
291 ICmpInst *CI = dyn_cast<ICmpInst>(Cond);
350 Value *Cond = BI->getCondition();
351 FCmpInst *FCmp = dyn_cast<FCmpInst>(Cond);
/external/llvm/utils/TableGen/
H A DAsmWriterEmitter.cpp821 std::string Cond;
822 Cond = std::string("MI->getNumOperands() == ") + llvm::utostr(LastOpNo);
823 IAP->addCond(Cond);
840 Cond = std::string("MI->getOperand(")+llvm::utostr(i)+").isReg()";
841 IAP->addCond(Cond);
848 Cond = std::string("MRI.getRegClass(") + Target.getName() + "::" +
851 IAP->addCond(Cond);
853 Cond = std::string("MI->getOperand(") +
856 IAP->addCond(Cond);
876 Cond
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/external/eigen/Eigen/src/Core/products/
H A DSelfadjointRank2Update.h52 template<bool Cond, typename T> struct conj_expr_if
53 : conditional<!Cond, const T&,
/external/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.h63 SmallVectorImpl<MachineOperand> &Cond,
68 const SmallVectorImpl<MachineOperand> &Cond,
72 bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
209 SmallVectorImpl<MachineOperand> &Cond,
/external/clang/include/clang/StaticAnalyzer/Core/BugReporter/
H A DBugReporterVisitor.h195 PathDiagnosticPiece *VisitTrueTest(const Expr *Cond,
201 PathDiagnosticPiece *VisitTrueTest(const Expr *Cond,
208 PathDiagnosticPiece *VisitTrueTest(const Expr *Cond,

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