/external/llvm/lib/CodeGen/ |
H A D | RegAllocBase.h | 64 LiveIntervals *LIS; member in class:llvm::RegAllocBase 69 : TRI(nullptr), MRI(nullptr), VRM(nullptr), LIS(nullptr), Matrix(nullptr) {}
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H A D | CalcSpillWeights.cpp | 25 void llvm::calculateSpillWeightsAndHints(LiveIntervals &LIS, argument 34 VirtRegAuxInfo VRAI(MF, LIS, MLI, MBFI, norm); 39 VRAI.calculateSpillWeightAndHint(LIS.getInterval(Reg)); 76 const LiveIntervals &LIS, 86 MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def); 89 if (!TII.isTriviallyReMaterializable(MI, LIS.getAliasAnalysis())) 140 if (writes && isExiting && LIS.isLiveOutOfMBB(li, mbb)) 180 if (li.isZeroLength(LIS.getSlotIndexes())) { 189 if (isRematerializable(li, LIS, *MF.getTarget().getInstrInfo())) 75 isRematerializable(const LiveInterval &LI, const LiveIntervals &LIS, const TargetInstrInfo &TII) argument
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H A D | InterferenceCache.h | 57 /// LIS - Used for accessing register mask interference maps. 58 LiveIntervals *LIS; member in class:llvm::InterferenceCache::Entry 97 Entry() : PhysReg(0), Tag(0), RefCount(0), Indexes(nullptr), LIS(nullptr) {} 104 LIS = lis;
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H A D | SplitKit.h | 46 const LiveIntervals &LIS; member in class:llvm::SplitAnalysis 213 LiveIntervals &LIS; member in class:llvm::SplitEditor
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H A D | VirtRegMap.cpp | 163 LiveIntervals *LIS; member in class:__anon25833::VirtRegRewriter 212 LIS = &getAnalysis<LiveIntervals>(); 220 LIS->addKillFlags(VRM); 246 LiveInterval &LI = LIS->getInterval(VirtReg); 247 if (LI.empty() || LIS->intervalIsInOneMBB(LI))
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H A D | PHIElimination.cpp | 53 LiveIntervals *LIS; member in class:__anon25782::PHIElimination 130 LIS = getAnalysisIfAvailable<LiveIntervals>(); 139 if (!DisableEdgeSplitting && (LV || LIS)) { 158 if (LIS) 159 LIS->RemoveMachineInstrFromMaps(DefMI); 167 if (LIS) 168 LIS->RemoveMachineInstrFromMaps(I->first); 308 if (LIS) { 310 SlotIndex DestCopyIndex = LIS->InsertMachineInstrInMaps(NewInstr); 312 SlotIndex MBBStartIndex = LIS [all...] |
H A D | RegAllocPBQP.cpp | 189 LiveIntervals *LIS = const_cast<LiveIntervals*>(lis); local 210 LiveInterval *vregLI = &LIS->getInterval(vreg); 214 LIS->checkRegMaskInterference(*vregLI, regMaskOverlaps); 232 if (vregLI->overlaps(LIS->getRegUnit(*Units))) {
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H A D | InlineSpiller.cpp | 61 LiveIntervals &LIS; member in class:__anon25751::InlineSpiller 146 LIS(pass.getAnalysis<LiveIntervals>()), 237 if (SnipLI.getNumValNums() > 2 || !LIS.intervalIsInOneMBB(SnipLI)) 289 LiveInterval &SnipLI = LIS.getInterval(SnipReg); 375 SV.SpillMBB = LIS.getMBBFromIndex(SV.SpillVNI->def); 393 DepSV.SpillMBB = LIS.getMBBFromIndex(DepSV.SpillVNI->def); 545 LiveInterval &LI = LIS.getInterval(Reg); 546 LiveInterval &OrigLI = LIS.getInterval(Original); 591 MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def); 597 LiveInterval &SrcLI = LIS 1030 dumpMachineInstrRangeWithSlotIndex(MachineBasicBlock::iterator B, MachineBasicBlock::iterator E, LiveIntervals const &LIS, const char *const header, unsigned VReg =0) argument 1200 DEBUG(dumpMachineInstrRangeWithSlotIndex(std::next(MI), MIS.end(), LIS, local [all...] |
H A D | LiveDebugVariables.cpp | 133 LiveIntervals &LIS, const TargetInstrInfo &TII); 138 LiveIntervals &LIS); 229 /// @param LIS Live intervals analysis. 234 LiveIntervals &LIS, MachineDominatorTree &MDT, 248 LiveIntervals &LIS); 253 LiveIntervals &LIS, MachineDominatorTree &MDT, 259 LiveIntervals &LIS); 267 LiveIntervals &LIS, const TargetInstrInfo &TRI); 287 LiveIntervals *LIS; member in class:__anon25756::LDVImpl 486 LIS 501 extendDef(SlotIndex Idx, unsigned LocNo, LiveRange *LR, const VNInfo *VNI, SmallVectorImpl<SlotIndex> *Kills, LiveIntervals &LIS, MachineDominatorTree &MDT, UserValueScopes &UVS) argument 563 addDefsFromCopies(LiveInterval *LI, unsigned LocNo, const SmallVectorImpl<SlotIndex> &Kills, SmallVectorImpl<std::pair<SlotIndex, unsigned> > &NewDefs, MachineRegisterInfo &MRI, LiveIntervals &LIS) argument 634 computeIntervals(MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, LiveIntervals &LIS, MachineDominatorTree &MDT, UserValueScopes &UVS) argument 738 splitLocation(unsigned OldLocNo, ArrayRef<unsigned> NewRegs, LiveIntervals& LIS) argument 837 splitRegister(unsigned OldReg, ArrayRef<unsigned> NewRegs, LiveIntervals &LIS) argument 867 splitRegister(unsigned OldReg, ArrayRef<unsigned> NewRegs, LiveIntervals &LIS) argument 903 findInsertLocation(MachineBasicBlock *MBB, SlotIndex Idx, LiveIntervals &LIS) argument 929 insertDebugValue(MachineBasicBlock *MBB, SlotIndex Idx, unsigned LocNo, LiveIntervals &LIS, const TargetInstrInfo &TII) argument 945 emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS, const TargetInstrInfo &TII) argument [all...] |
H A D | LiveIntervalAnalysis.cpp | 725 LiveIntervals& LIS; member in class:LiveIntervals::HMEditor 734 HMEditor(LiveIntervals& LIS, const MachineRegisterInfo& MRI, argument 737 : LIS(LIS), MRI(MRI), TRI(TRI), OldIdx(OldIdx), NewIdx(NewIdx), 746 return &LIS.getRegUnit(Unit); 747 return LIS.getCachedRegUnit(Unit); 769 LiveInterval &LI = LIS.getInterval(Reg); 843 if (MachineInstr *KillMI = LIS.getInstructionFromIndex(I->end)) 977 std::lower_bound(LIS.RegMaskSlots.begin(), LIS [all...] |
H A D | MachineBasicBlock.cpp | 716 LiveIntervals *LIS = P->getAnalysisIfAvailable<LiveIntervals>(); local 718 if (LIS) 719 LIS->insertMBBInMaps(NMBB); 750 if (LIS) { 844 if (LIS) { 872 LiveInterval &LI = LIS->getInterval(Reg); 883 if (PHISrcRegs.count(Reg) || !LIS->hasInterval(Reg)) 886 LiveInterval &LI = LIS->getInterval(Reg); 890 bool isLiveOut = LI.liveAt(LIS->getMBBStartIdx(Succ)); 902 LIS [all...] |
H A D | RegisterPressure.cpp | 153 return &LIS->getInterval(Reg); 154 return LIS->getCachedRegUnit(Reg); 159 LIS = nullptr; 196 LIS = lis; 232 return LIS->getMBBEndIdx(MBB); 233 return LIS->getInstructionIndex(IdxPos).getRegSlot(); 482 SlotIdx = LIS->getInstructionIndex(CurrPos).getRegSlot(); 726 SlotIndex SlotIdx = LIS->getInstructionIndex(MI); 885 const LiveIntervals *LIS) { 892 SlotIndex InstSlot = LIS 882 findUseBetween(unsigned Reg, SlotIndex PriorUseIdx, SlotIndex NextUseIdx, const MachineRegisterInfo *MRI, const LiveIntervals *LIS) argument [all...] |
H A D | TwoAddressInstructionPass.cpp | 77 LiveIntervals *LIS; member in class:__anon25830::TwoAddressInstructionPass 173 static bool isPlainlyKilled(MachineInstr *MI, unsigned Reg, LiveIntervals *LIS); 216 if (LIS) { 217 LiveInterval &LI = LIS->getInterval(SavedReg); 221 SlotIndex MBBEndIdx = LIS->getMBBEndIdx(MBB).getPrevSlot(); 227 KillMI = LIS->getInstructionFromIndex(I->end); 277 if (MO.isKill() || (LIS && isPlainlyKilled(OtherMI, MOReg, LIS))) { 290 if (!LIS) { 304 if (LIS) 359 isPlainlyKilled(MachineInstr *MI, unsigned Reg, LiveIntervals *LIS) argument 401 isKilled(MachineInstr &MI, unsigned Reg, const MachineRegisterInfo *MRI, const TargetInstrInfo *TII, LiveIntervals *LIS, bool allowFalsePositives) argument [all...] |
H A D | RegisterCoalescer.cpp | 84 LiveIntervals *LIS; member in class:__anon25794::RegisterCoalescer 400 LiveRangeEdit(nullptr, NewRegs, *MF, *LIS, 431 LIS->getInterval(CP.isFlipped() ? CP.getDstReg() : CP.getSrcReg()); 433 LIS->getInterval(CP.isFlipped() ? CP.getSrcReg() : CP.getDstReg()); 434 SlotIndex CopyIdx = LIS->getInstructionIndex(CopyMI).getRegSlot(); 456 MachineInstr *ACopyMI = LIS->getInstructionFromIndex(AValNo->def); 470 LIS->getInstructionFromIndex(ValS->end.getPrevSlot()); 509 LIS->shrinkToUses(&IntA); 523 if (LIS->hasPHIKill(IntA, AValNo)) 572 SlotIndex CopyIdx = LIS 1304 LiveIntervals *LIS; member in class:__anon25795::JoinVals 2082 isLocalCopy(MachineInstr *Copy, const LiveIntervals *LIS) argument [all...] |
H A D | MachineScheduler.cpp | 88 MF(nullptr), MLI(nullptr), MDT(nullptr), PassConfig(nullptr), AA(nullptr), LIS(nullptr) { 313 LIS = &getAnalysis<LiveIntervals>(); 316 DEBUG(LIS->dump()); 326 DEBUG(LIS->dump()); 620 if (LIS) 621 LIS->handleMove(MI, /*UpdateFlags=*/true); 848 TopRPTracker.init(&MF, RegClassInfo, LIS, BB, RegionBegin); 849 BotRPTracker.init(&MF, RegClassInfo, LIS, BB, LiveRegionEnd); 947 const LiveInterval &LI = LIS->getInterval(Reg); 952 VNI = LI.getVNInfoBefore(LIS 1412 LiveIntervals *LIS = DAG->getLIS(); local [all...] |
/external/llvm/include/llvm/CodeGen/ |
H A D | CalcSpillWeights.h | 51 LiveIntervals &LIS; member in class:llvm::VirtRegAuxInfo 62 : MF(mf), LIS(lis), Loops(loops), MBFI(mbfi), normalize(norm) {} 70 void calculateSpillWeightsAndHints(LiveIntervals &LIS, MachineFunction &MF,
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H A D | LiveRegMatrix.h | 42 LiveIntervals *LIS; member in class:llvm::LiveRegMatrix
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H A D | LiveRangeEdit.h | 63 LiveIntervals &LIS; member in class:llvm::LiveRangeEdit 121 MRI(MF.getRegInfo()), LIS(lis), VRM(vrm), 210 /// to erase it from LIS.
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H A D | ScheduleDAGInstrs.h | 83 LiveIntervals *LIS; member in class:llvm::ScheduleDAGInstrs 161 LiveIntervals *LIS = nullptr); 168 LiveIntervals *getLIS() const { return LIS; }
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H A D | LiveInterval.h | 649 /// // allocate numComps-1 new LiveIntervals into LIS[1..] 650 /// ConEQ.Distribute(LIS); 654 LiveIntervals &LIS; member in class:llvm::ConnectedVNInfoEqClasses 663 explicit ConnectedVNInfoEqClasses(LiveIntervals &lis) : LIS(lis) {}
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H A D | MachineScheduler.h | 108 LiveIntervals *LIS; member in struct:llvm::MachineSchedContext 254 /*RemoveKillFlags=*/IsPostRA, C->LIS),
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/external/llvm/lib/Target/R600/ |
H A D | SIFixSGPRLiveRanges.cpp | 78 LiveIntervals *LIS = &getAnalysis<LiveIntervals>(); local 99 LiveInterval &LI = LIS->getInterval(Def.getReg());
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrInfo.cpp | 1610 LiveIntervals *LIS; member in struct:__anon26090::PPCVSXFMAMutate 1653 SlotIndex FMAIdx = LIS->getInstructionIndex(MI); 1656 LIS->getInterval(MI->getOperand(1).getReg()).Query(FMAIdx).valueIn(); 1657 MachineInstr *AddendMI = LIS->getInstructionFromIndex(AddendValNo->def); 1700 if (LIS->getInterval(MI->getOperand(2).getReg()) 1704 } else if (LIS->getInterval(MI->getOperand(3).getReg()) 1717 if (!LIS->getInterval(AddendMI->getOperand(1).getReg()).liveAt(FMAIdx)) 1770 LiveInterval &FMAInt = LIS->getInterval(OldFMAReg); 1789 LiveInterval &NewFMAInt = LIS->getInterval(KilledProdReg); 1798 LIS [all...] |