Searched defs:MBB (Results 76 - 100 of 191) sorted by relevance

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/external/llvm/lib/CodeGen/
H A DMachineInstrBundle.cpp41 MachineBasicBlock *MBB = &*I; local
43 for (MachineBasicBlock::instr_iterator MII = MBB->instr_begin(),
44 MIE = MBB->instr_end(); MII != MIE; ) {
100 void llvm::finalizeBundle(MachineBasicBlock &MBB, argument
104 MIBundleBuilder Bundle(MBB, FirstMI, LastMI);
106 const TargetMachine &TM = MBB.getParent()->getTarget();
110 MachineInstrBuilder MIB = BuildMI(*MBB.getParent(), FirstMI->getDebugLoc(),
208 /// with 'InsideBundle' marker. It returns the MBB instruction iterator that
211 llvm::finalizeBundle(MachineBasicBlock &MBB, argument
213 MachineBasicBlock::instr_iterator E = MBB
226 MachineBasicBlock &MBB = *I; local
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H A DMachineTraceMetrics.cpp84 /// Compute the resource usage in basic block MBB.
86 MachineTraceMetrics::getResources(const MachineBasicBlock *MBB) { argument
87 assert(MBB && "No basic block");
88 FixedBlockInfo *FBI = &BlockInfo[MBB->getNumber()];
100 for (const auto &MI : *MBB) {
124 unsigned PROffset = MBB->getNumber() * PRKinds;
159 MachineTraceMetrics::Ensemble::getLoopFor(const MachineBasicBlock *MBB) const {
160 return MTM.Loops->getLoopFor(MBB);
163 // Update resource-related information in the TraceBlockInfo for MBB.
164 // Only update resources related to the trace above MBB
166 computeDepthResources(const MachineBasicBlock *MBB) argument
199 computeHeightResources(const MachineBasicBlock *MBB) argument
317 pickTracePred(const MachineBasicBlock *MBB) argument
345 pickTraceSucc(const MachineBasicBlock *MBB) argument
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H A DSplitKit.h68 MachineBasicBlock *MBB; member in struct:llvm::SplitAnalysis::BlockInfo
170 /// isThroughBlock - Return true if CurLI is live through MBB without uses.
171 bool isThroughBlock(unsigned MBB) const { return ThroughBlocks.test(MBB); }
320 MachineBasicBlock &MBB,
327 /// getShallowDominator - Returns the least busy dominator of MBB that is
329 MachineBasicBlock *findShallowDominator(MachineBasicBlock *MBB,
379 /// enterIntvAtEnd - Enter the open interval at the end of MBB.
380 /// Use the open interval from the inserted copy to the MBB end.
382 SlotIndex enterIntvAtEnd(MachineBasicBlock &MBB);
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H A DStackSlotColoring.cpp112 bool RemoveDeadStores(MachineBasicBlock* MBB);
145 MachineBasicBlock *MBB = &*MBBI; local
146 for (MachineBasicBlock::iterator MII = MBB->begin(), EE = MBB->end();
322 MachineBasicBlock *MBB = &*MBBI; local
323 for (MachineBasicBlock::iterator MII = MBB->begin(), EE = MBB->end();
326 RemoveDeadStores(MBB);
367 bool StackSlotColoring::RemoveDeadStores(MachineBasicBlock* MBB) { argument
374 for (MachineBasicBlock::iterator I = MBB
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/external/llvm/lib/Target/AArch64/
H A DAArch64AdvSIMDScalarPass.cpp80 bool processMachineBasicBlock(MachineBasicBlock *MBB);
281 MachineBasicBlock *MBB = MI->getParent(); local
338 BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(NewOpc), Dst)
354 bool AArch64AdvSIMDScalar::processMachineBasicBlock(MachineBasicBlock *MBB) { argument
356 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end(); I != E;) {
H A DAArch64BranchRelaxation.cpp85 void adjustBlockOffsets(MachineBasicBlock &MBB);
88 void computeBlockSize(const MachineBasicBlock &MBB);
110 for (MachineBasicBlock &MBB : *MF) {
111 unsigned Align = MBB.getAlignment();
112 unsigned Num = MBB.getNumber();
122 for (auto &MBB : *MF) {
123 const BasicBlockInfo &BBI = BlockInfo[MBB.getNumber()];
124 dbgs() << format("BB#%u\toffset=%08x\t", MBB.getNumber(), BBI.Offset)
131 static bool BBHasFallthrough(MachineBasicBlock *MBB) { argument
133 MachineFunction::iterator MBBI = MBB;
165 computeBlockSize(const MachineBasicBlock &MBB) argument
176 MachineBasicBlock *MBB = MI->getParent(); local
368 MachineBasicBlock *MBB = MI->getParent(); local
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H A DAArch64RegisterInfo.cpp285 void AArch64RegisterInfo::materializeFrameBaseRegister(MachineBasicBlock *MBB, argument
289 MachineBasicBlock::iterator Ins = MBB->begin();
291 if (Ins != MBB->end())
295 MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo();
296 const MachineFunction &MF = *MBB->getParent();
300 BuildMI(*MBB, Ins, DL, MCID, BaseReg)
326 MachineBasicBlock &MBB = *MI.getParent();
327 MachineFunction &MF = *MBB.getParent();
359 emitFrameOffset(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, Offset, TII);
/external/llvm/lib/Target/ARM/
H A DARMConstantPoolValue.h224 const MachineBasicBlock *MBB; // Machine basic block. member in class:llvm::ARMConstantPoolMBB
235 const MachineBasicBlock *getMBB() const { return MBB; }
253 return MBB == A->MBB && ARMConstantPoolValue::equals(A);
H A DThumb1FrameLowering.cpp41 emitSPUpdate(MachineBasicBlock &MBB, argument
46 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes, TII,
52 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, argument
75 emitSPUpdate(MBB, I, TII, dl, *RegInfo, -Amount);
78 emitSPUpdate(MBB, I, TII, dl, *RegInfo, Amount);
82 MBB.erase(I);
86 MachineBasicBlock &MBB = MF.front(); local
87 MachineBasicBlock::iterator MBBI = MBB.begin();
103 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
118 emitSPUpdate(MBB, MBB
411 spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) const argument
450 restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) const argument
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H A DThumb1RegisterInfo.cpp62 Thumb1RegisterInfo::emitLoadConstPool(MachineBasicBlock &MBB, argument
69 MachineFunction &MF = *MBB.getParent();
73 Type::getInt32Ty(MBB.getParent()->getFunction()->getContext()), Val);
76 BuildMI(MBB, MBBI, dl, TII.get(ARM::tLDRpci))
88 void emitThumbRegPlusImmInReg(MachineBasicBlock &MBB, argument
96 MachineFunction &MF = *MBB.getParent();
115 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVi8), LdReg))
118 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVi8), LdReg))
120 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tRSB), LdReg))
123 MRI.emitLoadConstPool(MBB, MBB
165 emitThumbRegPlusImmediate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned BaseReg, int NumBytes, const TargetInstrInfo &TII, const ARMBaseRegisterInfo& MRI, unsigned MIFlags) argument
299 emitThumbConstant(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, unsigned DestReg, int Imm, const TargetInstrInfo &TII, const Thumb1RegisterInfo& MRI, DebugLoc dl) argument
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H A DThumb2ITBlockPass.cpp48 bool InsertITInstructions(MachineBasicBlock &MBB);
162 bool Thumb2ITBlockPass::InsertITInstructions(MachineBasicBlock &MBB) { argument
167 MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
183 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(ARM::t2IT))
223 MBB.remove(NMI);
224 MBB.insert(InsertPos, NMI);
246 finalizeBundle(MBB, InsertPos.getInstrIterator(), std::next(LI));
267 MachineBasicBlock &MBB = *MFI; local
269 Modified |= InsertITInstructions(MBB);
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/external/llvm/lib/Target/Hexagon/
H A DHexagonFrameLowering.cpp77 MachineBasicBlock &MBB = MF.front(); local
79 MachineBasicBlock::iterator MBBI = MBB.begin();
82 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
90 MachineBasicBlock::iterator InsertPt = MBB.begin();
122 BuildMI(MBB, InsertPt, dl, TII.get(Hexagon::ALLOCFRAME)).addImm(0);
125 BuildMI(MBB, InsertPt, dl, TII.get(Hexagon::CONST32_Int_Real),
127 BuildMI(MBB, InsertPt, dl, TII.get(Hexagon::SUB_rr),
132 BuildMI(MBB, InsertPt, dl, TII.get(Hexagon::ALLOCFRAME)).addImm(NumBytes);
136 // Returns true if MBB has a machine instructions that indicates a tail call
138 bool HexagonFrameLowering::hasTailCall(MachineBasicBlock &MBB) cons
222 spillCalleeSavedRegisters( MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) const argument
276 restoreCalleeSavedRegisters( MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) const argument
329 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const argument
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/external/llvm/lib/Target/Mips/
H A DMipsCodeEmitter.cpp85 MachineBasicBlock &MBB);
131 MachineBasicBlock &MBB, unsigned Opc) const;
135 MachineBasicBlock &MBB) const;
160 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
161 MBB != E; ++MBB){
162 MCE.StartMachineBasicBlock(MBB);
163 for (MachineBasicBlock::instr_iterator I = MBB->instr_begin(),
164 E = MBB->instr_end(); I != E;)
165 emitInstruction(*I++, *MBB);
342 emitInstruction(MachineBasicBlock::instr_iterator MI, MachineBasicBlock &MBB) argument
368 expandACCInstr(MachineBasicBlock::instr_iterator MI, MachineBasicBlock &MBB, unsigned Opc) const argument
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H A DMipsInstrInfo.cpp51 insertNoop(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const argument
54 BuildMI(MBB, MI, DL, get(Mips::NOP));
57 MachineMemOperand *MipsInstrInfo::GetMemOperand(MachineBasicBlock &MBB, int FI, argument
59 MachineFunction &MF = *MBB.getParent();
78 // MBB.
86 bool MipsInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, argument
92 BranchType BT = AnalyzeBranch(MBB, TBB, FBB, Cond, AllowModify, BranchInstrs);
97 void MipsInstrInfo::BuildCondBr(MachineBasicBlock &MBB, argument
103 MachineInstrBuilder MIB = BuildMI(&MBB, DL, MCID);
117 InsertBranch(MachineBasicBlock &MBB, MachineBasicBloc argument
184 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify, SmallVectorImpl<MachineInstr*> &BranchInstrs) const argument
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H A DMipsLongBranch.cpp78 void splitMBB(MachineBasicBlock *MBB);
81 void replaceBranch(MachineBasicBlock &MBB, Iter Br, DebugLoc DL,
112 assert(false && "This instruction does not have an MBB operand.");
126 // Split MBB if it has two direct jumps/branches.
127 void MipsLongBranch::splitMBB(MachineBasicBlock *MBB) { argument
128 ReverseIter End = MBB->rend();
129 ReverseIter LastBr = getNonDebugInstr(MBB->rbegin(), End);
131 // Return if MBB has no branch instructions.
138 // MBB has only one branch instruction if FirstBr is not a branch
146 // Create a new MBB
175 MachineBasicBlock *MBB = MF->getBlockNumbered(I); local
217 replaceBranch(MachineBasicBlock &MBB, Iter Br, DebugLoc DL, MachineBasicBlock *MBBOpnd) argument
250 MachineBasicBlock *MBB = I.Br->getParent(), *TgtMBB = getTargetMBB(*I.Br); local
438 MachineBasicBlock &MBB = F.front(); local
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H A DMipsOptimizePICCall.cpp74 /// \brief Visit MBB.
130 static void setCallTargetReg(MachineBasicBlock *MBB, argument
132 MachineFunction &MF = *MBB->getParent();
136 BuildMI(*MBB, I, I->getDebugLoc(), TII.get(TargetOpcode::COPY), DstReg)
189 // If this MBB has already been visited, destroy the scope for the MBB and
197 // Visit the MBB and add its children to the work list.
210 MachineBasicBlock *MBB = MBBI.getNode()->getBlock(); local
212 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB
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/external/llvm/lib/Target/PowerPC/
H A DPPCCTRLoops.cpp570 static bool verifyCTRBranch(MachineBasicBlock *MBB, argument
577 if (I == MBB->begin()) {
578 Visited.insert(MBB);
584 Visited.insert(MBB);
585 if (I == MBB->end())
589 for (MachineBasicBlock::iterator IE = MBB->begin();; --I) {
597 DEBUG(dbgs() << "BB#" << MBB->getNumber() << " (" <<
598 MBB->getFullName() << ") instruction " << *I <<
615 if (MachineFunction::iterator(MBB) == MBB
646 MachineBasicBlock *MBB = I; local
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/external/llvm/lib/Target/R600/
H A DAMDGPUAsmPrinter.cpp158 MachineBasicBlock &MBB = *BB; local
159 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
223 MachineBasicBlock &MBB = *BB; local
224 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
H A DR600ExpandSpecialInstrs.cpp74 MachineBasicBlock &MBB = *BB; local
75 MachineBasicBlock::iterator I = MBB.begin();
76 while (I != MBB.end()) {
85 MachineInstr *Mov = TII->buildMovInstr(&MBB, I,
104 MachineInstr *PredSet = TII->buildDefaultInstruction(MBB, I,
132 BMI = TII->buildDefaultInstruction(MBB, I, AMDGPU::INTERP_XY,
161 BMI = TII->buildDefaultInstruction(MBB, I, AMDGPU::INTERP_ZW,
185 BMI = TII->buildDefaultInstruction(MBB, I, AMDGPU::INTERP_LOAD_P0,
209 TII->buildSlotOfVectorInstruction(MBB, &MI, Chan, SubDstReg);
327 TII->buildDefaultInstruction(MBB,
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H A DR600InstrInfo.cpp49 R600InstrInfo::copyPhysReg(MachineBasicBlock &MBB, argument
69 buildDefaultInstruction(MBB, MI, AMDGPU::MOV,
76 MachineInstr *NewMI = buildDefaultInstruction(MBB, MI, AMDGPU::MOV,
84 bool R600InstrInfo::isLegalToSplitMBBAt(MachineBasicBlock &MBB, argument
674 findFirstPredicateSetterFrom(MachineBasicBlock &MBB,
676 while (I != MBB.begin()) {
697 R600InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
705 MachineBasicBlock::iterator I = MBB.end();
706 if (I == MBB.begin())
710 if (I == MBB
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H A DR600OptimizeVectorRegisters.cpp182 MachineBasicBlock &MBB = *Pos->getParent(); local
195 MachineInstr *Tmp = BuildMI(MBB, Pos, DL, TII->get(AMDGPU::INSERT_SUBREG),
212 Pos = BuildMI(MBB, Pos, DL, TII->get(AMDGPU::COPY), Reg)
319 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
320 MBB != MBBe; ++MBB) {
321 MachineBasicBlock *MB = MBB;
H A DSIInsertWaits.cpp87 bool insertWait(MachineBasicBlock &MBB,
244 bool SIInsertWaits::insertWait(MachineBasicBlock &MBB, argument
249 if (I != MBB.end() && I->getOpcode() == AMDGPU::S_ENDPGM)
298 BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::S_WAITCNT))
363 MachineBasicBlock &MBB = *BI; local
364 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
367 Changes |= insertWait(MBB, I, handleOperands(*I));
371 // Wait for everything at the end of the MBB
372 Changes |= insertWait(MBB, MB
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H A DSILowerControlFlow.cpp119 for (MachineBasicBlock *MBB = From; MBB != To && !MBB->succ_empty();
120 MBB = *MBB->succ_begin()) {
122 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
147 MachineBasicBlock &MBB = *MI.getParent(); local
150 if (MBB.getParent()->getInfo<SIMachineFunctionInfo>()->ShaderType !=
152 !shouldSkip(&MBB,
180 MachineBasicBlock &MBB = *MI.getParent(); local
198 MachineBasicBlock &MBB = *MI.getParent(); local
217 MachineBasicBlock &MBB = *MI.getParent(); local
231 MachineBasicBlock &MBB = *MI.getParent(); local
246 MachineBasicBlock &MBB = *MI.getParent(); local
261 MachineBasicBlock &MBB = *MI.getParent(); local
277 MachineBasicBlock &MBB = *MI.getParent(); local
297 MachineBasicBlock &MBB = *MI.getParent(); local
334 MachineBasicBlock &MBB = *MI.getParent(); local
401 MachineBasicBlock &MBB = *MI.getParent(); local
422 MachineBasicBlock &MBB = *MI.getParent(); local
455 MachineBasicBlock &MBB = *BI; local
537 MachineBasicBlock &MBB = MF.front(); local
544 MachineBasicBlock &MBB = MF.front(); local
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/external/llvm/lib/Target/Sparc/
H A DDelaySlotFiller.cpp57 bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
88 findDelayInstr(MachineBasicBlock &MBB, MachineBasicBlock::iterator slot);
92 bool tryCombineRestoreWithPrevInst(MachineBasicBlock &MBB,
110 bool Filler::runOnMachineBasicBlock(MachineBasicBlock &MBB) { argument
115 for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ) {
123 Changed |= tryCombineRestoreWithPrevInst(MBB, MI);
130 BuildMI(MBB, I, MI->getDebugLoc(), TII->get(SP::NOP));
139 MachineBasicBlock::iterator D = MBB.end();
142 D = findDelayInstr(MBB, M
169 findDelayInstr(MachineBasicBlock &MBB, MachineBasicBlock::iterator slot) argument
466 tryCombineRestoreWithPrevInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) argument
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H A DSparcCodeEmitter.cpp68 MachineBasicBlock &MBB);
116 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
117 MBB != E; ++MBB){
118 MCE.StartMachineBasicBlock(MBB);
119 for (MachineBasicBlock::instr_iterator I = MBB->instr_begin(),
120 E = MBB->instr_end(); I != E;)
121 emitInstruction(*I++, *MBB);
129 MachineBasicBlock &MBB) {
128 emitInstruction(MachineBasicBlock::instr_iterator MI, MachineBasicBlock &MBB) argument

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