Searched defs:VS (Results 1 - 13 of 13) sorted by relevance

/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/
H A Dbrw_urb.c39 #define VS 0 macro
72 * For VS, the number of entries may be 8, 12, 16, or 32 (or 64 on G4X).
83 * XXX: Verify min_nr_entries, esp for VS.
125 if (vsize < limits[VS].min_entry_size)
126 vsize = limits[VS].min_entry_size;
143 brw->urb.nr_vs_entries = limits[VS].preferred_nr_entries;
158 brw->urb.nr_vs_entries = limits[VS].preferred_nr_entries;
167 brw->urb.nr_vs_entries = limits[VS].preferred_nr_entries;
172 brw->urb.nr_vs_entries = limits[VS].min_nr_entries;
199 printf("URB fence: %d ..VS
[all...]
/external/mesa3d/src/mesa/drivers/dri/i965/
H A Dbrw_urb.c39 #define VS 0 macro
72 * For VS, the number of entries may be 8, 12, 16, or 32 (or 64 on G4X).
83 * XXX: Verify min_nr_entries, esp for VS.
125 if (vsize < limits[VS].min_entry_size)
126 vsize = limits[VS].min_entry_size;
143 brw->urb.nr_vs_entries = limits[VS].preferred_nr_entries;
158 brw->urb.nr_vs_entries = limits[VS].preferred_nr_entries;
167 brw->urb.nr_vs_entries = limits[VS].preferred_nr_entries;
172 brw->urb.nr_vs_entries = limits[VS].min_nr_entries;
199 printf("URB fence: %d ..VS
[all...]
/external/clang/test/SemaCXX/
H A Dwarn-unused-filescoped.cpp71 struct VS { struct in namespace:__anon19418
75 struct SVS : public VS {
/external/deqp/modules/gles31/functional/
H A Des31fShaderBuiltinConstantTests.cpp113 VS = (1<<glu::SHADERTYPE_VERTEX), enumerator in enum:deqp::gles31::Functional::__anon20309::__anon20310
120 SHADER_TYPES = VS|TC|TE|GS|FS|CS
H A Des31fShaderIntegerFunctionTests.cpp1149 VS = (1<<glu::SHADERTYPE_VERTEX), enumerator in enum:deqp::gles31::Functional::__anon20326
1156 ALL_SHADERS = VS|TC|TE|GS|FS|CS
/external/clang/lib/Parse/
H A DParseCXXInlineMethods.cpp29 const VirtSpecifiers& VS,
50 VS, ICIS_NoInit);
25 ParseCXXInlineMethodDef(AccessSpecifier AS, AttributeList *AccessAttrs, ParsingDeclarator &D, const ParsedTemplateInfo &TemplateInfo, const VirtSpecifiers& VS, FunctionDefinitionKind DefinitionKind, ExprResult& Init) argument
H A DParseDeclCXX.cpp1880 void Parser::ParseOptionalCXX11VirtSpecifierSeq(VirtSpecifiers &VS, argument
1890 if (VS.SetSpecifier(Specifier, Tok.getLocation(), PrevSpec))
1923 Declarator &DeclaratorInfo, VirtSpecifiers &VS, ExprResult &BitfieldSize,
1943 ParseOptionalCXX11VirtSpecifierSeq(VS, getCurrentClass().IsInterface);
1963 if (BitfieldSize.isUnset() && VS.isUnset())
1964 ParseOptionalCXX11VirtSpecifierSeq(VS, getCurrentClass().IsInterface);
2163 VirtSpecifiers VS; local
2177 ParseCXXMemberDeclaratorBeforeInitializer(DeclaratorInfo, VS, BitfieldSize,
2255 VS, DefinitionKind, Init);
2311 // TODO: handle initializers, VS, bitfield
1922 ParseCXXMemberDeclaratorBeforeInitializer( Declarator &DeclaratorInfo, VirtSpecifiers &VS, ExprResult &BitfieldSize, LateParsedAttrList &LateParsedAttrs) argument
[all...]
/external/clang/lib/Sema/
H A DDeclSpec.cpp1191 bool VirtSpecifiers::SetSpecifier(Specifier VS, SourceLocation Loc, argument
1195 if (Specifiers & VS) {
1196 PrevSpec = getSpecifierName(VS);
1200 Specifiers |= VS;
1202 switch (VS) {
1212 const char *VirtSpecifiers::getSpecifierName(Specifier VS) { argument
1213 switch (VS) {
H A DSemaDeclCXX.cpp1932 Expr *BW, const VirtSpecifiers &VS,
2164 if (VS.isOverrideSpecified())
2165 Member->addAttr(new (Context) OverrideAttr(VS.getOverrideLoc(), Context, 0));
2166 if (VS.isFinalSpecified())
2167 Member->addAttr(new (Context) FinalAttr(VS.getFinalLoc(), Context,
2168 VS.isFinalSpelledSealed()));
2170 if (VS.getLastLocation().isValid()) {
2173 MD->setRangeEnd(VS.getLastLocation());
1930 ActOnCXXMemberDeclarator(Scope *S, AccessSpecifier AS, Declarator &D, MultiTemplateParamsArg TemplateParameterLists, Expr *BW, const VirtSpecifiers &VS, InClassInitStyle InitStyle) argument
/external/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMBaseInfo.h36 VS, // Overflow Unordered enumerator in enum:llvm::ARMCC::CondCodes
56 case VS: return VC;
57 case VC: return VS;
76 case ARMCC::VS: return "vs";
/external/clang/include/clang/Analysis/Analyses/
H A DThreadSafetyTIL.h150 ValueType(BaseType B, SizeType Sz, bool S, unsigned char VS) argument
151 : Base(B), Size(Sz), Signed(S), VectSize(VS)
/external/qemu/disas/
H A Dppc.c832 /* The VD or VS field in a VA, VX, VXR or X form instruction. */
834 #define VS VD
4612 { "stvebx", X(31, 135), X_MASK, PPCVEC, { VS, RA, RB } },
4613 { "stvehx", X(31, 167), X_MASK, PPCVEC, { VS, RA, RB } },
4614 { "stvewx", X(31, 199), X_MASK, PPCVEC, { VS, RA, RB } },
4615 { "stvx", X(31, 231), X_MASK, PPCVEC, { VS, RA, RB } },
4616 { "stvxl", X(31, 487), X_MASK, PPCVEC, { VS, RA, RB } },
4623 { "stvlx", X(31, 647), X_MASK, CELL, { VS, RA0, RB } },
4624 { "stvlxl", X(31, 903), X_MASK, CELL, { VS, RA0, RB } },
4625 { "stvrx", X(31, 679), X_MASK, CELL, { VS, RA
830 #define VS macro
[all...]
/external/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.h199 VS = 0x6, // Overflow Unordered enumerator in enum:llvm::AArch64CC::CondCode
222 case VS: return "vs";
256 case VS: return V; // V == 1

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