/external/mesa3d/src/gallium/drivers/radeon/InstPrinter/ |
H A D | AMDGPUInstPrinter.cpp | 3 #include "llvm/MC/MCInst.h" 7 void AMDGPUInstPrinter::printInst(const MCInst *MI, raw_ostream &OS, 14 void AMDGPUInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, 29 void AMDGPUInstPrinter::printMemOperand(const MCInst *MI, unsigned OpNo,
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/external/llvm/lib/Target/AArch64/Disassembler/ |
H A D | AArch64Disassembler.h | 20 class MCInst; 33 getInstruction(MCInst &instr, uint64_t &size, const MemoryObject ®ion,
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/external/llvm/lib/Target/R600/ |
H A D | AMDGPUMCInstLower.h | 19 class MCInst; 41 /// \brief Lower a MachineInstr to an MCInst 42 void lower(const MachineInstr *MI, MCInst &OutMI) const;
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/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64MCCodeEmitter.cpp | 20 #include "llvm/MC/MCInst.h" 49 uint64_t getBinaryCodeForInstr(const MCInst &MI, 55 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO, 63 uint32_t getLdStUImm12OpValue(const MCInst &MI, unsigned OpIdx, 69 uint32_t getAdrLabelOpValue(const MCInst &MI, unsigned OpIdx, 75 uint32_t getAddSubImmOpValue(const MCInst &MI, unsigned OpIdx, 81 uint32_t getCondBranchTargetOpValue(const MCInst &MI, unsigned OpIdx, 87 uint32_t getLoadLiteralOpValue(const MCInst &MI, unsigned OpIdx, 94 uint32_t getMemExtendOpValue(const MCInst &MI, unsigned OpIdx, 100 uint32_t getTestBranchTargetOpValue(const MCInst [all...] |
/external/llvm/lib/Target/SystemZ/Disassembler/ |
H A D | SystemZDisassembler.cpp | 13 #include "llvm/MC/MCInst.h" 32 DecodeStatus getInstruction(MCInst &instr, uint64_t &size, 51 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, 61 static DecodeStatus DecodeGR32BitRegisterClass(MCInst &Inst, uint64_t RegNo, 67 static DecodeStatus DecodeGRH32BitRegisterClass(MCInst &Inst, uint64_t RegNo, 73 static DecodeStatus DecodeGR64BitRegisterClass(MCInst &Inst, uint64_t RegNo, 79 static DecodeStatus DecodeGR128BitRegisterClass(MCInst &Inst, uint64_t RegNo, 85 static DecodeStatus DecodeADDR64BitRegisterClass(MCInst &Inst, uint64_t RegNo, 91 static DecodeStatus DecodeFP32BitRegisterClass(MCInst &Inst, uint64_t RegNo, 97 static DecodeStatus DecodeFP64BitRegisterClass(MCInst [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/MCTargetDesc/ |
H A D | SIMCCodeEmitter.cpp | 19 #include "llvm/MC/MCInst.h" 74 virtual void EncodeInstruction(const MCInst &MI, raw_ostream &OS, 78 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO, 84 unsigned GPRAlign(const MCInst &MI, unsigned OpNo, unsigned shift) const; 87 virtual unsigned GPR2AlignEncode(const MCInst &MI, unsigned OpNo, 91 virtual unsigned GPR4AlignEncode(const MCInst &MI, unsigned OpNo, 96 virtual uint64_t i32LiteralEncode(const MCInst &MI, unsigned OpNo, 100 virtual uint32_t SMRDmemriEncode(const MCInst &MI, unsigned OpNo, 104 virtual uint64_t VOPPostEncode(const MCInst &MI, uint64_t Value) const; 109 unsigned getEncodingType(const MCInst [all...] |
/external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
H A D | SIMCCodeEmitter.cpp | 19 #include "llvm/MC/MCInst.h" 74 virtual void EncodeInstruction(const MCInst &MI, raw_ostream &OS, 78 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO, 84 unsigned GPRAlign(const MCInst &MI, unsigned OpNo, unsigned shift) const; 87 virtual unsigned GPR2AlignEncode(const MCInst &MI, unsigned OpNo, 91 virtual unsigned GPR4AlignEncode(const MCInst &MI, unsigned OpNo, 96 virtual uint64_t i32LiteralEncode(const MCInst &MI, unsigned OpNo, 100 virtual uint32_t SMRDmemriEncode(const MCInst &MI, unsigned OpNo, 104 virtual uint64_t VOPPostEncode(const MCInst &MI, uint64_t Value) const; 109 unsigned getEncodingType(const MCInst [all...] |
/external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
H A D | SystemZMCCodeEmitter.cpp | 38 void EncodeInstruction(const MCInst &MI, raw_ostream &OS, 44 uint64_t getBinaryCodeForInstr(const MCInst &MI, 50 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO, 58 uint64_t getBDAddr12Encoding(const MCInst &MI, unsigned OpNum, 61 uint64_t getBDAddr20Encoding(const MCInst &MI, unsigned OpNum, 64 uint64_t getBDXAddr12Encoding(const MCInst &MI, unsigned OpNum, 67 uint64_t getBDXAddr20Encoding(const MCInst &MI, unsigned OpNum, 70 uint64_t getBDLAddr12Len8Encoding(const MCInst &MI, unsigned OpNum, 78 uint64_t getPCRelEncoding(const MCInst &MI, unsigned OpNum, 82 uint64_t getPC16DBLEncoding(const MCInst [all...] |
/external/llvm/lib/Target/Mips/Disassembler/ |
H A D | MipsDisassembler.cpp | 20 #include "llvm/MC/MCInst.h" 79 DecodeStatus getInstruction(MCInst &instr, 98 DecodeStatus getInstruction(MCInst &instr, 110 static DecodeStatus DecodeGPR64RegisterClass(MCInst &Inst, 115 static DecodeStatus DecodeCPU16RegsRegisterClass(MCInst &Inst, 120 static DecodeStatus DecodeGPR32RegisterClass(MCInst &Inst, 125 static DecodeStatus DecodePtrRegisterClass(MCInst &Inst, 130 static DecodeStatus DecodeDSPRRegisterClass(MCInst &Inst, 135 static DecodeStatus DecodeFGR64RegisterClass(MCInst &Inst, 140 static DecodeStatus DecodeFGR32RegisterClass(MCInst [all...] |
/external/llvm/include/llvm/MC/ |
H A D | MCInstBuilder.h | 18 #include "llvm/MC/MCInst.h" 23 MCInst Inst; 26 /// \brief Create a new MCInstBuilder for an MCInst with a specific opcode. 55 /// \brief Add a new MCInst operand. 56 MCInstBuilder &addInst(const MCInst *Val) { 61 operator MCInst&() {
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H A D | MCCodeEmitter.h | 17 class MCInst; 38 virtual void EncodeInstruction(const MCInst &Inst, raw_ostream &OS,
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H A D | MCAsmBackend.h | 26 class MCInst; 111 virtual bool mayNeedRelaxation(const MCInst &Inst) const = 0; 125 virtual void relaxInstruction(const MCInst &Inst, MCInst &Res) const = 0;
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/external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
H A D | HexagonMCInst.h | 1 //===- HexagonMCInst.h - Hexagon sub-class of MCInst ----------------------===// 10 // This class extends MCInst to allow some VLIW annotations. 18 #include "llvm/MC/MCInst.h" 23 class HexagonMCInst: public MCInst { 34 MCInst(), MCID(nullptr), packetStart(0), packetEnd(0) {}; 36 MCInst(), MCID(&mcid), packetStart(0), packetEnd(0) {};
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZMCInstLower.h | 1 //===-- SystemZMCInstLower.h - Lower MachineInstr to MCInst ----*- C++ -*--===// 18 class MCInst; 32 // Lower MachineInstr MI to MCInst OutMI. 33 void lower(const MachineInstr *MI, MCInst &OutMI) const;
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/external/llvm/lib/Target/X86/Disassembler/ |
H A D | X86Disassembler.h | 54 // MCInst for use by the MC infrastructure. 82 class MCInst; 103 DecodeStatus getInstruction(MCInst &instr, uint64_t &size,
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/external/llvm/lib/Target/Hexagon/InstPrinter/ |
H A D | HexagonInstPrinter.cpp | 1 //===- HexagonInstPrinter.cpp - Convert Hexagon MCInst to assembly syntax -===// 10 // This class prints an Hexagon MCInst to a .s file. 21 #include "llvm/MC/MCInst.h" 41 void HexagonInstPrinter::printInst(const MCInst *MI, raw_ostream &O, 89 void HexagonInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, 104 void HexagonInstPrinter::printImmOperand(const MCInst *MI, unsigned OpNo, 117 void HexagonInstPrinter::printExtOperand(const MCInst *MI, unsigned OpNo, 125 void HexagonInstPrinter::printUnsignedImmOperand(const MCInst *MI, 130 void HexagonInstPrinter::printNegImmOperand(const MCInst *MI, unsigned OpNo, 135 void HexagonInstPrinter::printNOneImmOperand(const MCInst *M [all...] |
/external/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCCodeEmitter.cpp | 24 #include "llvm/MC/MCInst.h" 68 uint64_t getBinaryCodeForInstr(const MCInst &MI, 74 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO, 81 uint32_t getHiLo16ImmOpValue(const MCInst &MI, unsigned OpIdx, 85 bool EncodeAddrModeOpValues(const MCInst &MI, unsigned OpIdx, 92 uint32_t getThumbBLTargetOpValue(const MCInst &MI, unsigned OpIdx, 98 uint32_t getThumbBLXTargetOpValue(const MCInst &MI, unsigned OpIdx, 103 uint32_t getThumbBRTargetOpValue(const MCInst &MI, unsigned OpIdx, 108 uint32_t getThumbBCCTargetOpValue(const MCInst &MI, unsigned OpIdx, 113 uint32_t getThumbCBTargetOpValue(const MCInst [all...] |
/external/llvm/lib/MC/ |
H A D | MCInstrAnalysis.cpp | 13 bool MCInstrAnalysis::evaluateBranch(const MCInst &Inst, uint64_t Addr,
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/external/llvm/lib/Target/ARM/ |
H A D | ARMInstrInfo.h | 29 void getNoopForMachoTarget(MCInst &NopInst) const override;
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/external/llvm/lib/Target/SystemZ/InstPrinter/ |
H A D | SystemZInstPrinter.cpp | 1 //===-- SystemZInstPrinter.cpp - Convert SystemZ MCInst to assembly syntax ===// 44 void SystemZInstPrinter::printInst(const MCInst *MI, raw_ostream &O, 54 void SystemZInstPrinter::printU4ImmOperand(const MCInst *MI, int OpNum, 61 void SystemZInstPrinter::printU6ImmOperand(const MCInst *MI, int OpNum, 68 void SystemZInstPrinter::printS8ImmOperand(const MCInst *MI, int OpNum, 75 void SystemZInstPrinter::printU8ImmOperand(const MCInst *MI, int OpNum, 82 void SystemZInstPrinter::printS16ImmOperand(const MCInst *MI, int OpNum, 89 void SystemZInstPrinter::printU16ImmOperand(const MCInst *MI, int OpNum, 96 void SystemZInstPrinter::printS32ImmOperand(const MCInst *MI, int OpNum, 103 void SystemZInstPrinter::printU32ImmOperand(const MCInst *M [all...] |
/external/llvm/lib/Target/XCore/InstPrinter/ |
H A D | XCoreInstPrinter.cpp | 1 //===-- XCoreInstPrinter.cpp - Convert XCore MCInst to assembly syntax ----===// 10 // This class prints an XCore MCInst to a .s file. 17 #include "llvm/MC/MCInst.h" 32 void XCoreInstPrinter::printInst(const MCInst *MI, raw_ostream &O, 39 printInlineJT(const MCInst *MI, int opNum, raw_ostream &O) { 44 printInlineJT32(const MCInst *MI, int opNum, raw_ostream &O) { 73 printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
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/external/llvm/lib/Target/MSP430/InstPrinter/ |
H A D | MSP430InstPrinter.cpp | 1 //===-- MSP430InstPrinter.cpp - Convert MSP430 MCInst to assembly syntax --===// 10 // This class prints an MSP430 MCInst to a .s file. 18 #include "llvm/MC/MCInst.h" 29 void MSP430InstPrinter::printInst(const MCInst *MI, raw_ostream &O, 35 void MSP430InstPrinter::printPCRelImmOperand(const MCInst *MI, unsigned OpNo, 46 void MSP430InstPrinter::printOperand(const MCInst *MI, unsigned OpNo, 60 void MSP430InstPrinter::printSrcMemOperand(const MCInst *MI, unsigned OpNo, 89 void MSP430InstPrinter::printCCOperand(const MCInst *MI, unsigned OpNo,
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/external/llvm/lib/Target/R600/InstPrinter/ |
H A D | AMDGPUInstPrinter.cpp | 14 #include "llvm/MC/MCInst.h" 20 void AMDGPUInstPrinter::printInst(const MCInst *MI, raw_ostream &OS, 28 void AMDGPUInstPrinter::printU8ImmOperand(const MCInst *MI, unsigned OpNo, 33 void AMDGPUInstPrinter::printU16ImmOperand(const MCInst *MI, unsigned OpNo, 38 void AMDGPUInstPrinter::printU32ImmOperand(const MCInst *MI, unsigned OpNo, 135 void AMDGPUInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, 161 void AMDGPUInstPrinter::printOperandAndMods(const MCInst *MI, unsigned OpNo, 173 void AMDGPUInstPrinter::printInterpSlot(const MCInst *MI, unsigned OpNum, 188 void AMDGPUInstPrinter::printMemOperand(const MCInst *MI, unsigned OpNo, 195 void AMDGPUInstPrinter::printIfSet(const MCInst *M [all...] |
/external/llvm/lib/Target/Sparc/Disassembler/ |
H A D | SparcDisassembler.cpp | 41 DecodeStatus getInstruction(MCInst &instr, 116 static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, 127 static DecodeStatus DecodeI64RegsRegisterClass(MCInst &Inst, 139 static DecodeStatus DecodeFPRegsRegisterClass(MCInst &Inst, 151 static DecodeStatus DecodeDFPRegsRegisterClass(MCInst &Inst, 163 static DecodeStatus DecodeQFPRegsRegisterClass(MCInst &Inst, 177 static DecodeStatus DecodeFCCRegsRegisterClass(MCInst &Inst, unsigned RegNo, 187 static DecodeStatus DecodeLoadInt(MCInst &Inst, unsigned insn, uint64_t Address, 189 static DecodeStatus DecodeLoadFP(MCInst &Inst, unsigned insn, uint64_t Address, 191 static DecodeStatus DecodeLoadDFP(MCInst [all...] |
/external/llvm/lib/Target/XCore/Disassembler/ |
H A D | XCoreDisassembler.cpp | 20 #include "llvm/MC/MCInst.h" 40 virtual DecodeStatus getInstruction(MCInst &instr, 89 static DecodeStatus DecodeGRRegsRegisterClass(MCInst &Inst, 94 static DecodeStatus DecodeRRegsRegisterClass(MCInst &Inst, 99 static DecodeStatus DecodeBitpOperand(MCInst &Inst, unsigned Val, 102 static DecodeStatus DecodeNegImmOperand(MCInst &Inst, unsigned Val, 105 static DecodeStatus Decode2RInstruction(MCInst &Inst, 110 static DecodeStatus Decode2RImmInstruction(MCInst &Inst, 115 static DecodeStatus DecodeR2RInstruction(MCInst &Inst, 120 static DecodeStatus Decode2RSrcDstInstruction(MCInst [all...] |