Searched refs:MF (Results 26 - 50 of 501) sorted by relevance

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/external/llvm/lib/Target/XCore/
H A DXCoreFrameLowering.h30 void emitPrologue(MachineFunction &MF) const override;
31 void emitEpilogue(MachineFunction &MF,
43 void eliminateCallFramePseudoInstr(MachineFunction &MF,
47 bool hasFP(const MachineFunction &MF) const override;
49 void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
52 void processFunctionBeforeFrameFinalized(MachineFunction &MF,
H A DXCoreFrameToArgsOffsetElim.cpp44 bool XCoreFTAOElim::runOnMachineFunction(MachineFunction &MF) { argument
46 *static_cast<const XCoreInstrInfo*>(MF.getTarget().getInstrInfo());
47 unsigned StackSize = MF.getFrameInfo()->getStackSize();
48 for (MachineFunction::iterator MFI = MF.begin(), E = MF.end(); MFI != E;
/external/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.h36 bool isReservedReg(const MachineFunction &MF, unsigned Reg) const;
40 getCalleeSavedRegs(const MachineFunction *MF = nullptr) const override;
64 BitVector getReservedRegs(const MachineFunction &MF) const override;
66 getPointerRegClass(const MachineFunction &MF,
71 bool requiresRegisterScavenging(const MachineFunction &MF) const override;
72 bool useFPForScavengingIndex(const MachineFunction &MF) const override;
73 bool requiresFrameIndexScavenging(const MachineFunction &MF) const override;
86 bool cannotEliminateFrame(const MachineFunction &MF) const;
88 bool requiresVirtualBaseRegisters(const MachineFunction &MF) const override;
89 bool hasBasePointer(const MachineFunction &MF) cons
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H A DAArch64RegisterInfo.cpp41 AArch64RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
42 assert(MF && "Invalid MachineFunction pointer.");
43 if (MF->getFunction()->getCallingConv() == CallingConv::AnyReg)
78 AArch64RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
79 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
88 if (TFI->hasFP(MF) || STI->isTargetDarwin()) {
98 if (hasBasePointer(MF)) {
106 bool AArch64RegisterInfo::isReservedReg(const MachineFunction &MF, argument
108 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
123 return TFI->hasFP(MF) || ST
133 getPointerRegClass(const MachineFunction &MF, unsigned Kind) const argument
296 const MachineFunction &MF = *MBB->getParent(); local
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/external/llvm/lib/Target/ARM/
H A DARMMachineFunctionInfo.cpp16 ARMFunctionInfo::ARMFunctionInfo(MachineFunction &MF) argument
17 : isThumb(MF.getTarget().getSubtarget<ARMSubtarget>().isThumb()),
18 hasThumb2(MF.getTarget().getSubtarget<ARMSubtarget>().hasThumb2()),
H A DARMFrameLowering.h31 void emitPrologue(MachineFunction &MF) const override;
32 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
44 bool hasFP(const MachineFunction &MF) const override;
45 bool hasReservedCallFrame(const MachineFunction &MF) const override;
46 bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override;
47 int getFrameIndexReference(const MachineFunction &MF, int FI,
49 int ResolveFrameIndexReference(const MachineFunction &MF, int FI,
51 int getFrameIndexOffset(const MachineFunction &MF, int FI) const override;
53 void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
56 void adjustForSegmentedStacks(MachineFunction &MF) cons
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
H A DSIMachineFunctionInfo.h29 SIMachineFunctionInfo(const MachineFunction &MF);
H A DAMDGPUAsmPrinter.h27 virtual bool runOnMachineFunction(MachineFunction &MF);
35 void EmitProgramInfo(MachineFunction &MF);
H A DAMDGPUConvertToISA.cpp33 virtual bool runOnMachineFunction(MachineFunction &MF);
47 bool AMDGPUConvertToISAPass::runOnMachineFunction(MachineFunction &MF) argument
52 for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
58 TII->convertToISA(MI, MF, MBB.findDebugLoc(I));
/external/llvm/include/llvm/Target/
H A DTargetFrameLowering.h103 assignCalleeSavedSpillSlots(MachineFunction &MF, argument
133 virtual void emitPrologue(MachineFunction &MF) const = 0;
134 virtual void emitEpilogue(MachineFunction &MF,
139 virtual void adjustForSegmentedStacks(MachineFunction &MF) const { }
143 virtual void adjustForHiPEPrologue(MachineFunction &MF) const { }
170 virtual bool hasFP(const MachineFunction &MF) const = 0;
177 virtual bool hasReservedCallFrame(const MachineFunction &MF) const {
178 return !hasFP(MF);
188 virtual bool canSimplifyCallFramePseudos(const MachineFunction &MF) const {
189 return hasReservedCallFrame(MF) || hasF
205 processFunctionBeforeCalleeSavedScan(MachineFunction &MF, RegScavenger *RS = nullptr) const argument
215 processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS = nullptr) const argument
227 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const argument
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/external/mesa3d/src/gallium/drivers/radeon/
H A DSIMachineFunctionInfo.h29 SIMachineFunctionInfo(const MachineFunction &MF);
H A DAMDGPUAsmPrinter.h27 virtual bool runOnMachineFunction(MachineFunction &MF);
35 void EmitProgramInfo(MachineFunction &MF);
H A DAMDGPUConvertToISA.cpp33 virtual bool runOnMachineFunction(MachineFunction &MF);
47 bool AMDGPUConvertToISAPass::runOnMachineFunction(MachineFunction &MF) argument
52 for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
58 TII->convertToISA(MI, MF, MBB.findDebugLoc(I));
/external/llvm/lib/Target/Mips/
H A DMipsFrameLowering.cpp96 bool MipsFrameLowering::hasFP(const MachineFunction &MF) const {
97 const MachineFrameInfo *MFI = MF.getFrameInfo();
98 return MF.getTarget().Options.DisableFramePointerElim(MF) ||
102 uint64_t MipsFrameLowering::estimateStackSize(const MachineFunction &MF) const {
103 const MachineFrameInfo *MFI = MF.getFrameInfo();
104 const TargetRegisterInfo &TRI = *MF.getTarget().getRegisterInfo();
113 for (const MCPhysReg *R = TRI.getCalleeSavedRegs(&MF); *R; ++R) {
129 if (MFI->adjustsStack() && hasReservedCallFrame(MF))
H A DMipsRegisterInfo.h42 void adjustMipsStackFrame(MachineFunction &MF) const;
45 const TargetRegisterClass *getPointerRegClass(const MachineFunction &MF,
49 MachineFunction &MF) const override;
51 getCalleeSavedRegs(const MachineFunction *MF = nullptr) const override;
55 BitVector getReservedRegs(const MachineFunction &MF) const override;
57 bool requiresRegisterScavenging(const MachineFunction &MF) const override;
59 bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override;
66 void processFunctionBeforeFrameFinalized(MachineFunction &MF,
70 unsigned getFrameRegister(const MachineFunction &MF) const override;
H A DMipsModuleISelDAGToDAG.cpp21 bool MipsModuleDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) { argument
23 const_cast<MipsSubtarget&>(Subtarget).resetSubtarget(&MF);
H A DMips16FrameLowering.h26 void emitPrologue(MachineFunction &MF) const override;
27 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
29 void eliminateCallFramePseudoInstr(MachineFunction &MF,
43 bool hasReservedCallFrame(const MachineFunction &MF) const override;
45 void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
H A DMipsSEFrameLowering.h27 void emitPrologue(MachineFunction &MF) const override;
28 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
30 void eliminateCallFramePseudoInstr(MachineFunction &MF,
39 bool hasReservedCallFrame(const MachineFunction &MF) const override;
41 void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
/external/llvm/lib/Target/R600/
H A DSIMachineFunctionInfo.cpp27 SIMachineFunctionInfo::SIMachineFunctionInfo(const MachineFunction &MF) argument
28 : AMDGPUMachineFunction(MF),
32 static unsigned createLaneVGPR(MachineRegisterInfo &MRI, MachineFunction *MF) { argument
59 for (MachineBasicBlock &MBB : *MF) {
61 MBB.back().addOperand(*MF, MachineOperand::CreateReg(VGPR, false, true));
66 LLVMContext &Ctx = MF->getFunction()->getContext();
73 MachineRegisterInfo &MRI, MachineFunction *MF, unsigned NumRegs) {
77 LaneVGPR = createLaneVGPR(MRI, MF);
81 LaneVGPR = createLaneVGPR(MRI, MF);
72 reserveLanes( MachineRegisterInfo &MRI, MachineFunction *MF, unsigned NumRegs) argument
H A DAMDGPUFrameLowering.cpp27 unsigned AMDGPUFrameLowering::getStackWidth(const MachineFunction &MF) const {
74 int AMDGPUFrameLowering::getFrameIndexOffset(const MachineFunction &MF, argument
76 const MachineFrameInfo *MFI = MF.getFrameInfo();
80 unsigned OffsetBytes = 2 * (getStackWidth(MF) * 4);
94 return OffsetBytes / (getStackWidth(MF) * 4);
103 AMDGPUFrameLowering::emitPrologue(MachineFunction &MF) const {
106 AMDGPUFrameLowering::emitEpilogue(MachineFunction &MF, argument
111 AMDGPUFrameLowering::hasFP(const MachineFunction &MF) const {
/external/llvm/lib/Target/SystemZ/
H A DSystemZFrameLowering.h30 void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
41 void processFunctionBeforeFrameFinalized(MachineFunction &MF,
43 void emitPrologue(MachineFunction &MF) const override;
44 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
45 bool hasFP(const MachineFunction &MF) const override;
46 int getFrameIndexOffset(const MachineFunction &MF, int FI) const override;
47 bool hasReservedCallFrame(const MachineFunction &MF) const override;
48 void eliminateCallFramePseudoInstr(MachineFunction &MF,
54 uint64_t getAllocatedStackSize(const MachineFunction &MF) const;
/external/llvm/include/llvm/CodeGen/
H A DStackMapLivenessAnalysis.h34 MachineFunction *MF; member in class:llvm::StackMapLiveness
48 bool runOnMachineFunction(MachineFunction &MF) override;
/external/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.h38 getPointerRegClass(const MachineFunction &MF, unsigned Kind=0) const override;
41 MachineFunction &MF) const override;
48 getCalleeSavedRegs(const MachineFunction* MF =nullptr) const override;
52 BitVector getReservedRegs(const MachineFunction &MF) const override;
55 bool requiresRegisterScavenging(const MachineFunction &MF) const override {
59 bool requiresFrameIndexScavenging(const MachineFunction &MF) const override {
63 bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override {
67 bool requiresVirtualBaseRegisters(const MachineFunction &MF) const override {
85 bool hasReservedSpillSlot(const MachineFunction &MF, unsigned Reg,
102 unsigned getFrameRegister(const MachineFunction &MF) cons
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H A DPPCFrameLowering.h30 unsigned determineFrameLayout(MachineFunction &MF,
36 void emitPrologue(MachineFunction &MF) const override;
37 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
39 bool hasFP(const MachineFunction &MF) const override;
40 bool needsFP(const MachineFunction &MF) const;
41 void replaceFPWithRealFP(MachineFunction &MF) const;
43 void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
45 void processFunctionBeforeFrameFinalized(MachineFunction &MF,
47 void addScavengingSpillSlot(MachineFunction &MF, RegScavenger *RS) const;
54 void eliminateCallFramePseudoInstr(MachineFunction &MF,
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/external/llvm/lib/Target/Sparc/
H A DSparcRegisterInfo.h35 getCalleeSavedRegs(const MachineFunction *MF =nullptr) const override;
40 BitVector getReservedRegs(const MachineFunction &MF) const override;
42 const TargetRegisterClass *getPointerRegClass(const MachineFunction &MF,
49 void processFunctionBeforeFrameFinalized(MachineFunction &MF,
53 unsigned getFrameRegister(const MachineFunction &MF) const override;

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