/external/llvm/lib/Target/XCore/ |
H A D | XCoreRegisterInfo.cpp | 224 const TargetFrameLowering *TFI = MF->getTarget().getFrameLowering(); 232 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); 270 *static_cast<const XCoreInstrInfo*>(MF.getTarget().getInstrInfo()); 272 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); 326 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
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H A D | XCoreFrameLowering.cpp | 218 return MF.getTarget().Options.DisableFramePointerElim(MF) || 229 *static_cast<const XCoreInstrInfo*>(MF.getTarget().getInstrInfo()); 265 MIB->addRegisterKilled(XCore::LR, MF.getTarget().getRegisterInfo(), true); 326 GetEHSpillList(SpillList, MFI, XFI, MF.getTarget().getTargetLowering()); 343 *static_cast<const XCoreInstrInfo*>(MF.getTarget().getInstrInfo()); 358 GetEHSpillList(SpillList, MFI, XFI, MF.getTarget().getTargetLowering()); 416 const TargetInstrInfo &TII = *MF->getTarget().getInstrInfo(); 449 const TargetInstrInfo &TII = *MF->getTarget().getInstrInfo(); 482 *static_cast<const XCoreInstrInfo*>(MF.getTarget().getInstrInfo());
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZFrameLowering.cpp | 68 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo(); 111 const TargetRegisterInfo *RI = MBB.getParent()->getTarget().getRegisterInfo(); 130 const TargetInstrInfo *TII = MF.getTarget().getInstrInfo(); 219 const TargetInstrInfo *TII = MF.getTarget().getInstrInfo(); 314 static_cast<const SystemZInstrInfo*>(MF.getTarget().getInstrInfo()); 411 static_cast<const SystemZInstrInfo*>(MF.getTarget().getInstrInfo()); 449 return (MF.getTarget().Options.DisableFramePointerElim(MF) ||
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/external/llvm/lib/CodeGen/ |
H A D | EarlyIfConversion.cpp | 156 TII = MF.getTarget().getInstrInfo(); 157 TRI = MF.getTarget().getRegisterInfo(); 780 if (!MF.getTarget() 785 TII = MF.getTarget().getInstrInfo(); 786 TRI = MF.getTarget().getRegisterInfo(); 788 MF.getTarget().getSubtarget<TargetSubtargetInfo>().getSchedModel();
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H A D | ExpandPostRAPseudos.cpp | 185 TRI = MF.getTarget().getRegisterInfo(); 186 TII = MF.getTarget().getInstrInfo();
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H A D | MachineBasicBlock.cpp | 56 const TargetMachine &TM = MF->getTarget(); 293 const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo(); 319 I->print(OS, &getParent()->getTarget()); 362 const TargetInstrInfo &TII = *getParent()->getTarget().getInstrInfo(); 393 const TargetInstrInfo *TII = getParent()->getTarget().getInstrInfo(); 648 const TargetInstrInfo *TII = getParent()->getTarget().getInstrInfo(); 688 if (MF->getTarget().requiresStructuredCFG()) 693 const TargetInstrInfo *TII = MF->getTarget().getInstrInfo(); 798 MF->getTarget().getInstrInfo()->InsertBranch(*NMBB, Succ, nullptr, Cond, dl); 826 const TargetRegisterInfo *TRI = MF->getTarget() [all...] |
H A D | MachineFunction.cpp | 353 const TargetRegisterInfo *TRI = getTarget().getRegisterInfo(); 462 const DataLayout *DL = getTarget().getDataLayout(); 477 const DataLayout *DL = getTarget().getDataLayout(); 602 const TargetMachine &TM = MF->getTarget(); 628 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); 629 const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo(); 679 const TargetFrameLowering *FI = MF.getTarget().getFrameLowering();
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H A D | VirtRegMap.cpp | 57 TII = mf.getTarget().getInstrInfo(); 58 TRI = mf.getTarget().getRegisterInfo(); 207 TM = &MF->getTarget();
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonRegisterInfo.cpp | 131 *static_cast<const HexagonInstrInfo*>(MF.getTarget().getInstrInfo()); 136 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); 281 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
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/external/llvm/lib/Target/X86/ |
H A D | X86SelectionDAGInfo.cpp | 40 const X86Subtarget &Subtarget = DAG.getTarget().getSubtarget<X86Subtarget>(); 185 const X86Subtarget &Subtarget = DAG.getTarget().getSubtarget<X86Subtarget>(); 207 static_cast<const X86RegisterInfo *>(DAG.getTarget().getRegisterInfo());
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H A D | X86VZeroUpper.cpp | 250 const X86Subtarget &ST = MF.getTarget().getSubtarget<X86Subtarget>(); 253 TII = MF.getTarget().getInstrInfo();
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/external/chromium_org/third_party/WebKit/Source/core/html/canvas/ |
H A D | WebGLTexture.h | 52 GLenum getTarget() const { return m_target; } function in class:blink::FINAL
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/external/chromium_org/third_party/skia/src/animator/ |
H A D | SkDisplayApply.h | 57 SkDrawable* getTarget(SkAnimateBase* );
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/external/llvm/lib/MC/MCDisassembler/ |
H A D | Disassembler.h | 113 const Target *getTarget() const { return TheTarget; } function in class:llvm::LLVMDisasmContext
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64DeadRegisterDefinitionsPass.cpp | 122 TRI = MF.getTarget().getRegisterInfo();
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H A D | AArch64ConditionalCompares.cpp | 194 TII = MF.getTarget().getInstrInfo(); 195 TRI = MF.getTarget().getRegisterInfo(); 894 TII = MF.getTarget().getInstrInfo(); 895 TRI = MF.getTarget().getRegisterInfo(); 897 MF.getTarget().getSubtarget<TargetSubtargetInfo>().getSchedModel();
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/external/llvm/lib/Target/MSP430/ |
H A D | MSP430BranchSelector.cpp | 57 static_cast<const MSP430InstrInfo*>(Fn.getTarget().getInstrInfo());
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/external/skia/src/animator/ |
H A D | SkDisplayApply.h | 57 SkDrawable* getTarget(SkAnimateBase* );
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/external/llvm/lib/Target/Mips/ |
H A D | MipsOptimizePICCall.cpp | 133 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); 177 if (F.getTarget().getSubtarget<MipsSubtarget>().inMips16Mode())
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/external/llvm/lib/Target/R600/ |
H A D | SIFixSGPRCopies.cpp | 199 MF.getTarget().getRegisterInfo()); 201 MF.getTarget().getInstrInfo());
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H A D | R600Packetizer.cpp | 154 TII (static_cast<const R600InstrInfo *>(MF.getTarget().getInstrInfo())), 156 VLIW5 = !MF.getTarget().getSubtarget<AMDGPUSubtarget>().hasCaymanISA(); 331 const TargetInstrInfo *TII = Fn.getTarget().getInstrInfo();
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/external/smack/src/org/jivesoftware/smackx/bytestreams/socks5/packet/ |
H A D | Bytestream.java | 424 public String getTarget() {
method in class:Bytestream.Activate 439 buf.append(getTarget());
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/external/llvm/lib/Target/ARM/ |
H A D | ARMFrameLowering.cpp | 50 const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo(); 58 return ((MF.getTarget().Options.DisableFramePointerElim(MF) && 164 const TargetMachine &TM = MF.getTarget(); 577 const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo(); 579 *static_cast<const ARMBaseInstrInfo*>(MF.getTarget().getInstrInfo()); 584 unsigned Align = MF.getTarget().getFrameLowering()->getStackAlignment(); 721 static_cast<const ARMBaseRegisterInfo*>(MF.getTarget().getRegisterInfo()); 806 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); 879 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); 969 const TargetInstrInfo &TII = *MF.getTarget() [all...] |
H A D | MLxExpansionPass.cpp | 381 TII = static_cast<const ARMBaseInstrInfo*>(Fn.getTarget().getInstrInfo()); 382 TRI = Fn.getTarget().getRegisterInfo(); 384 const ARMSubtarget *STI = &Fn.getTarget().getSubtarget<ARMSubtarget>();
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/external/llvm/lib/CodeGen/AsmPrinter/ |
H A D | AsmPrinterInlineAsm.cpp | 130 std::unique_ptr<MCSubtargetInfo> STI(TM.getTarget().createMCSubtargetInfo( 141 MCOptions = MF->getTarget().Options.MCOptions; 143 TM.getTarget().createMCAsmParser(*STI, *Parser, *MII, MCOptions));
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