/external/llvm/lib/Target/AArch64/ |
H A D | AArch64AsmPrinter.cpp | 474 MCOperand Dest; local 475 MCInstLowering.lowerOperand(MI->getOperand(0), Dest); 478 TmpInst.addOperand(Dest);
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H A D | AArch64FastISel.cpp | 121 bool TryEmitSmallMemCpy(Address Dest, Address Src, uint64_t Len, 1434 bool AArch64FastISel::TryEmitSmallMemCpy(Address Dest, Address Src, argument 1441 Address OrigDest = Dest; 1473 RV = EmitStore(VT, ResultReg, Dest); 1482 Dest.setOffset(OrigDest.getOffset() + UnscaledOffset); 1510 Address Dest, Src; local 1511 if (!ComputeAddress(MTI.getRawDest(), Dest) || 1514 if (TryEmitSmallMemCpy(Dest, Src, Len, Alignment))
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H A D | AArch64ISelLowering.cpp | 774 // Dest = PHI [IfTrue, TrueBB], [IfFalse, OrigBB] 2837 SDValue Dest = Op.getOperand(4); local 2876 return DAG.getNode(AArch64ISD::BRCOND, SDLoc(LHS), MVT::Other, Chain, Dest, 2904 DAG.getConstant(Log2_64(Mask), MVT::i64), Dest); 2907 return DAG.getNode(AArch64ISD::CBZ, dl, MVT::Other, Chain, LHS, Dest); 2924 DAG.getConstant(Log2_64(Mask), MVT::i64), Dest); 2927 return DAG.getNode(AArch64ISD::CBNZ, dl, MVT::Other, Chain, LHS, Dest); 2933 return DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, 2946 DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, Chain, Dest, CC1Val, Cmp); 2949 return DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, BR1, Dest, CC2Va 7587 SDValue Dest = N->getOperand(1); local [all...] |
/external/llvm/lib/Target/AArch64/InstPrinter/ |
H A D | AArch64InstPrinter.cpp | 1007 unsigned Dest = MI->getOperand(0).getReg(); local 1009 if ( ((Dest == AArch64::SP || Src1 == AArch64::SP) && 1011 ((Dest == AArch64::WSP || Src1 == AArch64::WSP) &&
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/external/llvm/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 181 bool ARMTryEmitSmallMemCpy(Address Dest, Address Src, uint64_t Len, 2428 bool ARMFastISel::ARMTryEmitSmallMemCpy(Address Dest, Address Src, argument 2458 RV = ARMEmitStore(VT, ResultReg, Dest); 2464 Dest.Offset += Size; 2526 Address Dest, Src; local 2527 if (!ARMComputeAddress(MTI.getRawDest(), Dest) || 2531 if (ARMTryEmitSmallMemCpy(Dest, Src, Len, Alignment))
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H A D | ARMISelLowering.cpp | 3582 SDValue Dest = Op.getOperand(4); local 3608 Chain, Dest, ARMcc, CCR, Cmp); 3620 SDValue Ops[] = { Chain, ARMcc, LHS1, LHS2, RHS1, RHS2, Dest }; 3632 SDValue Dest = Op.getOperand(4); local 3640 Chain, Dest, ARMcc, CCR, Cmp); 3660 SDValue Ops[] = { Chain, Dest, ARMcc, CCR, Cmp }; 3664 SDValue Ops[] = { Res, Dest, ARMcc, CCR, Res.getValue(1) };
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/external/llvm/lib/Target/MSP430/ |
H A D | MSP430BranchSelector.cpp | 114 MachineBasicBlock *Dest = I->getOperand(0).getMBB(); local 117 if (Dest->getNumber() <= MBB.getNumber()) { 123 for (unsigned i = Dest->getNumber(), e = MBB.getNumber(); i != e; ++i) 130 for (unsigned i = MBB.getNumber(), e = Dest->getNumber(); i != e; ++i) 162 I = BuildMI(MBB, I, dl, TII->get(MSP430::Bi)).addMBB(Dest);
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H A D | MSP430ISelLowering.cpp | 899 SDValue Dest = Op.getOperand(4); local 906 Chain, Dest, TargetCC, Flag);
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/external/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 1084 unsigned Dest = MI->getOperand(0).getReg(); local 1216 BB = emitSignExtendToI32InReg(MI, BB, Size, Dest, SrlRes); 1249 unsigned Dest = MI->getOperand(0).getReg(); local 1285 BuildMI(BB, DL, TII->get(LL), Dest).addReg(Ptr).addImm(0); 1287 .addReg(Dest).addReg(OldVal).addMBB(exitMBB); 1316 unsigned Dest = MI->getOperand(0).getReg(); local 1438 BB = emitSignExtendToI32InReg(MI, BB, Size, Dest, SrlRes); 1509 SDValue Dest = Op.getOperand(2); local 1526 FCC0, Dest, CondRes);
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/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXImageOptimizer.cpp | 154 BasicBlock *Dest; local 157 Dest = BI->getSuccessor(1); 160 Dest = BI->getSuccessor(0); 161 BranchInst::Create(Dest, BI);
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCBranchSelector.cpp | 116 MachineBasicBlock *Dest = nullptr; local 118 Dest = I->getOperand(2).getMBB(); 121 Dest = I->getOperand(1).getMBB(); 125 Dest = I->getOperand(0).getMBB(); 127 if (!Dest) { 135 if (Dest->getNumber() <= MBB.getNumber()) { 141 for (unsigned i = Dest->getNumber(), e = MBB.getNumber(); i != e; ++i) 148 for (unsigned i = MBB.getNumber(), e = Dest->getNumber(); i != e; ++i) 192 I = BuildMI(MBB, I, dl, TII->get(PPC::B)).addMBB(Dest);
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H A D | PPCISelLowering.cpp | 3348 if (SDNode *Dest = isBLACompatibleAddress(Callee, DAG)) { 3350 Callee = SDValue(Dest, 0); 7081 unsigned Dest = MI->getOperand(0).getReg(); local 7097 BuildMI(*BB, MI, dl, TII->get(PPC::FADD), Dest).addReg(Src1).addReg(Src2); 7112 unsigned Dest = RegInfo.createVirtualRegister(Opcode == PPC::ANDIo ? local 7117 BuildMI(*BB, MI, dl, TII->get(Opcode), Dest)
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/external/llvm/lib/Target/R600/ |
H A D | SIInstrInfo.cpp | 1373 MachineOperand &Dest = Inst->getOperand(0); local 1389 const TargetRegisterClass *DestRC = MRI.getRegClass(Dest.getReg()); 1410 MRI.replaceRegWith(Dest.getReg(), FullDestReg); 1425 MachineOperand &Dest = Inst->getOperand(0); local 1449 const TargetRegisterClass *DestRC = MRI.getRegClass(Dest.getReg()); 1474 MRI.replaceRegWith(Dest.getReg(), FullDestReg); 1490 MachineOperand &Dest = Inst->getOperand(0); local 1516 MRI.replaceRegWith(Dest.getReg(), ResultReg);
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/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 2290 SDValue Dest = Op.getOperand(4); local 2316 return DAG.getNode(Opc, dl, MVT::Other, Chain, Dest,
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 1701 SDValue Dest = Op.getOperand(4); local 1708 DAG.getConstant(C.CCMask, MVT::i32), Dest, Glue); 2741 unsigned Dest = MI->getOperand(0).getReg(); local 2786 // %OldVal = phi [ %OrigVal, StartMBB ], [ %Dest, LoopMBB ] 2790 // %Dest = CS %OldVal, %NewVal, Disp(%Base) 2796 .addReg(Dest).addMBB(LoopMBB); 2834 BuildMI(MBB, DL, TII->get(CSOpcode), Dest) 2864 unsigned Dest = MI->getOperand(0).getReg(); local 2911 // %OldVal = phi [ %OrigVal, StartMBB ], [ %Dest, UpdateMBB ] 2918 .addReg(Dest) 2975 unsigned Dest = MI->getOperand(0).getReg(); local 3092 unsigned Dest = MI->getOperand(0).getReg(); local [all...] |
H A D | SystemZInstrInfo.cpp | 689 MachineOperand &Dest = MI->getOperand(0); local 691 unsigned DestReg = Dest.getReg(); 708 .addOperand(Dest); 733 MachineOperand &Dest = MI->getOperand(0); local 737 .addOperand(Dest).addReg(0) 801 unsigned Dest = MI->getOperand(0).getReg(); local 802 return BuildMI(MF, MI->getDebugLoc(), get(LoadOpcode), Dest)
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H A D | SystemZSelectionDAGInfo.cpp | 29 // address Dest. Sequence is the opcode to use for straight-line code 238 SDValue Dest, SDValue Src, 241 SDVTList VTs = DAG.getVTList(Dest.getValueType(), MVT::Other); 242 SDValue EndDest = DAG.getNode(SystemZISD::STPCPY, DL, VTs, Chain, Dest, Src, 244 return std::make_pair(isStpcpy ? EndDest : Dest, EndDest.getValue(1)); 237 EmitTargetCodeForStrcpy(SelectionDAG &DAG, SDLoc DL, SDValue Chain, SDValue Dest, SDValue Src, MachinePointerInfo DestPtrInfo, MachinePointerInfo SrcPtrInfo, bool isStpcpy) const argument
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/external/llvm/lib/Target/X86/ |
H A D | X86FixupLEAs.cpp | 107 const MachineOperand &Dest = MI->getOperand(0); local 111 .addOperand(Dest)
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H A D | X86InstrInfo.cpp | 1943 unsigned Dest = MI->getOperand(0).getReg(); local 2029 .addReg(Dest, RegState::Define | getDeadRegState(isDead)) 2039 LV->replaceKillInstruction(Dest, MI, ExtMI); 2069 const MachineOperand &Dest = MI->getOperand(0); local 2090 .addOperand(Dest).addOperand(Src).addImm(M); 2106 .addOperand(Dest).addOperand(Src).addImm(M); 2121 .addOperand(Dest) 2141 .addOperand(Dest) 2159 .addOperand(Dest) 2181 .addOperand(Dest) [all...] |
/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCalls.cpp | 141 Value *Dest = Builder->CreateBitCast(MI->getArgOperand(0), NewDstPtrTy); local 146 StoreInst *S = Builder->CreateStore(L, Dest, MI->isVolatile()); 177 Value *Dest = MI->getDest(); local 178 unsigned DstAddrSp = cast<PointerType>(Dest->getType())->getAddressSpace(); 180 Dest = Builder->CreateBitCast(Dest, NewDstPtrTy); 187 StoreInst *S = Builder->CreateStore(ConstantInt::get(ITy, Fill), Dest,
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/external/llvm/lib/Transforms/Scalar/ |
H A D | MemCpyOptimizer.cpp | 710 Value *Dest = cpySrc->getType() == cpyDest->getType() ? cpyDest local 714 if (CS.getArgument(i)->getType() == Dest->getType()) 715 CS.setArgument(i, Dest); 717 CS.setArgument(i, CastInst::CreatePointerCast(Dest, 718 CS.getArgument(i)->getType(), Dest->getName(), C));
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H A D | SCCP.cpp | 422 void markEdgeExecutable(BasicBlock *Source, BasicBlock *Dest) { argument 423 if (!KnownFeasibleEdges.insert(Edge(Source, Dest)).second) 426 if (!MarkBlockExecutable(Dest)) { 431 << " -> " << Dest->getName() << '\n'); 434 for (BasicBlock::iterator I = Dest->begin(); 584 assert(BBExecutable.count(To) && "Dest should always be alive!");
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/external/llvm/lib/Transforms/Utils/ |
H A D | CloneFunction.cpp | 369 BasicBlock *Dest = BI->getSuccessor(!Cond->getZExtValue()); local 370 VMap[OldTI] = BranchInst::Create(Dest, NewBB); 371 ToClone.push_back(Dest); 384 BasicBlock *Dest = const_cast<BasicBlock*>(Case.getCaseSuccessor()); local 385 VMap[OldTI] = BranchInst::Create(Dest, NewBB); 386 ToClone.push_back(Dest); 595 BasicBlock *Dest = BI->getSuccessor(0); local 596 if (!Dest->getSinglePredecessor()) { 602 assert(!isa<PHINode>(Dest->begin())); 608 // Make all PHI nodes that referred to Dest no [all...] |
H A D | InlineFunction.cpp | 147 BasicBlock *Dest = getInnerResumeDest(); local 150 BranchInst::Create(Dest, Src); 154 addIncomingPHIValuesForInto(Src, Dest);
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H A D | LoopUnroll.cpp | 381 BasicBlock *Dest = Headers[j]; local 391 Dest = LoopExit; 404 Term->setSuccessor(!ContinueOnTrue, Dest); 407 if (Dest != LoopExit) { 420 BranchInst::Create(Dest, Term); 429 BasicBlock *Dest = Term->getSuccessor(0); local 430 if (BasicBlock *Fold = FoldBlockIntoPredecessor(Dest, LI, LPM)) 431 std::replace(Latches.begin(), Latches.end(), Dest, Fold);
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