Searched refs:TM (Results 76 - 100 of 414) sorted by relevance

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/external/strace/linux/sh/
H A Dsyscallent.h48 { 0, TM, sys_break, "break" }, /* 17 */
76 { 1, TM|SI, sys_brk, "brk" }, /* 45 */
121 { 6, TD|TM|SI, sys_mmap, "old_mmap" }, /* 90 */
122 { 2, TM|SI, sys_munmap, "munmap" }, /* 91 */
156 { 3, TM|SI, sys_mprotect, "mprotect" }, /* 125 */
175 { 3, TM, sys_msync, "msync" }, /* 144 */
181 { 1, TM, sys_mlock, "mlock" }, /* 150 */
182 { 2, TM, sys_munlock, "munlock" }, /* 151 */
183 { 1, TM, sys_mlockall, "mlockall" }, /* 152 */
184 { 1, TM, sys_munlockal
[all...]
/external/strace/linux/sh64/
H A Dsyscallent.h46 { 0, TM, sys_break, "break" }, /* 17 */
74 { 1, TM|SI, sys_brk, "brk" }, /* 45 */
119 { 6, TD|TM|SI, sys_mmap, "old_mmap" }, /* 90 */
120 { 2, TM|SI, sys_munmap, "munmap" }, /* 91 */
154 { 3, TM|SI, sys_mprotect, "mprotect" }, /* 125 */
173 { 3, TM, sys_msync, "msync" }, /* 144 */
179 { 1, TM, sys_mlock, "mlock" }, /* 150 */
180 { 2, TM, sys_munlock, "munlock" }, /* 151 */
181 { 1, TM, sys_mlockall, "mlockall" }, /* 152 */
182 { 0, TM, sys_munlockal
[all...]
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
H A DAMDGPURegisterInfo.cpp22 TM(tm),
H A DSIRegisterInfo.h27 AMDGPUTargetMachine &TM; member in struct:llvm::SIRegisterInfo
H A DR600RegisterInfo.h27 AMDGPUTargetMachine &TM; member in struct:llvm::R600RegisterInfo
H A DSIInstrInfo.h26 AMDGPUTargetMachine &TM; member in class:llvm::SIInstrInfo
H A DSIRegisterInfo.cpp23 TM(tm),
/external/llvm/include/llvm/CodeGen/
H A DMachineConstantPool.h135 const TargetMachine &TM; ///< The target machine. member in class:llvm::MachineConstantPool
144 explicit MachineConstantPool(const TargetMachine &TM) argument
145 : TM(TM), PoolAlignment(1) {}
H A DMachineFunctionAnalysis.h28 const TargetMachine &TM; member in struct:llvm::MachineFunctionAnalysis
H A DPasses.h110 TargetMachine *TM; member in class:llvm::TargetPassConfig
133 return *static_cast<TMC*>(TM);
139 CodeGenOpt::Level getOptLevel() const { return TM->getOptLevel(); }
348 FunctionPass *createAtomicExpandLoadLinkedPass(const TargetMachine *TM);
355 createBasicTargetTransformInfoPass(const TargetMachine *TM);
373 FunctionPass *createCodeGenPreparePass(const TargetMachine *TM = nullptr);
546 FunctionPass *createStackProtectorPass(const TargetMachine *TM);
555 FunctionPass *createDwarfEHPass(const TargetMachine *TM);
560 FunctionPass *createSjLjEHPreparePass(const TargetMachine *TM);
/external/llvm/lib/Target/SystemZ/
H A DSystemZ.h109 FunctionPass *createSystemZISelDag(SystemZTargetMachine &TM,
111 FunctionPass *createSystemZElimComparePass(SystemZTargetMachine &TM);
112 FunctionPass *createSystemZShortenInstPass(SystemZTargetMachine &TM);
113 FunctionPass *createSystemZLongBranchPass(SystemZTargetMachine &TM);
/external/mesa3d/src/gallium/drivers/radeon/
H A DAMDGPURegisterInfo.cpp22 TM(tm),
H A DSIRegisterInfo.h27 AMDGPUTargetMachine &TM; member in struct:llvm::SIRegisterInfo
/external/strace/linux/s390/
H A Dsyscallent.h76 { 1, TM|SI, sys_brk, "brk" }, /* 45 */
121 { 6, TD|TM|SI, sys_old_mmap, "mmap" }, /* 90 */
122 { 2, TM|SI, sys_munmap, "munmap" }, /* 91 */
156 { 3, TM|SI, sys_mprotect, "mprotect" }, /* 125 */
175 { 3, TM, sys_msync, "msync" }, /* 144 */
181 { 2, TM, sys_mlock, "mlock" }, /* 150 */
182 { 2, TM, sys_munlock, "munlock" }, /* 151 */
183 { 1, TM, sys_mlockall, "mlockall" }, /* 152 */
184 { 0, TM, sys_munlockall, "munlockall" }, /* 153 */
194 { 5, TM|S
[all...]
/external/strace/linux/sparc/
H A Dsyscallent.h18 { 1, TM|SI, sys_brk, "brk" }, /* 17 */
57 { 6, TD|TM|SI, sys_mmap, "mmap2" }, /* 56 */
66 { 3, TM, sys_msync, "msync" }, /* 65 */
72 { 6, TD|TM|SI, sys_mmap, "mmap" }, /* 71 */
74 { 2, TM|SI, sys_munmap, "munmap" }, /* 73 */
75 { 3, TM|SI, sys_mprotect, "mprotect" }, /* 74 */
76 { 3, TM, sys_madvise, "madvise" }, /* 75 */
79 { 3, TM, sys_mincore, "mincore" }, /* 78 */
193 { 5, TM|SI, sys_remap_file_pages,"remap_file_pages" },/* 192 */
238 { 2, TM, sys_mloc
[all...]
/external/strace/linux/mips/
H A Dsyscallent-compat.h18 { 0, TM, printargs, "svr4_sbreak" }, /* 017 */
115 { 0, TM, printargs, "svr4_mincore" }, /* 0114 */
116 { 0, TD|TM|SI, printargs, "svr4_mmap" }, /* 0115 */
117 { 0, TM|SI, printargs, "svr4_mprotect" }, /* 0116 */
118 { 0, TM|SI, printargs, "svr4_munmap" }, /* 0117 */
230 { 0, TM|SI, printargs, "sysv_brk" }, /* 1017 */
347 { 0, TD|TM|SI, printargs, "sysv_mmap" }, /* 1134 */
348 { 0, TM|SI, printargs, "sysv_munmap" }, /* 1135 */
349 { 0, TM|SI, printargs, "sysv_mprotect" }, /* 1136 */
350 { 0, TM, printarg
[all...]
/external/llvm/lib/Target/Mips/
H A DMipsInstrInfo.h36 MipsTargetMachine &TM; member in class:llvm::MipsInstrInfo
49 explicit MipsInstrInfo(MipsTargetMachine &TM, unsigned UncondBrOpc);
51 static const MipsInstrInfo *create(MipsTargetMachine &TM);
143 const MipsInstrInfo *createMips16InstrInfo(MipsTargetMachine &TM);
144 const MipsInstrInfo *createMipsSEInstrInfo(MipsTargetMachine &TM);
H A DMipsTargetMachine.cpp85 MipsPassConfig(MipsTargetMachine *TM, PassManagerBase &PM) argument
86 : TargetPassConfig(TM, PM) {
168 MipsTargetMachine &TM = getMipsTargetMachine(); local
169 const MipsSubtarget &Subtarget = TM.getSubtarget<MipsSubtarget>();
170 addPass(createMipsDelaySlotFillerPass(TM));
173 addPass(createMipsLongBranchPass(TM));
176 addPass(createMipsConstantIslandPass(TM));
/external/strace/linux/s390x/
H A Dsyscallent.h75 { 1, TM|SI, sys_brk, "brk" }, /* 45 */
120 { 1, TD|TM|SI, sys_old_mmap, "mmap" }, /* 90 */
121 { 2, TM|SI, sys_munmap, "munmap" }, /* 91 */
155 { 3, TM|SI, sys_mprotect, "mprotect" }, /* 125 */
174 { 3, TM, sys_msync, "msync" }, /* 144 */
180 { 2, TM, sys_mlock, "mlock" }, /* 150 */
181 { 2, TM, sys_munlock, "munlock" }, /* 151 */
182 { 1, TM, sys_mlockall, "mlockall" }, /* 152 */
183 { 0, TM, sys_munlockall, "munlockall" }, /* 153 */
193 { 5, TM|S
[all...]
/external/llvm/lib/CodeGen/
H A DDwarfEHPrepare.cpp36 const TargetMachine *TM; member in class:__anon25738::DwarfEHPrepare
46 DwarfEHPrepare(const TargetMachine *TM) argument
47 : FunctionPass(ID), TM(TM), RewindFunction(nullptr) {
63 FunctionPass *llvm::createDwarfEHPass(const TargetMachine *TM) { argument
64 return new DwarfEHPrepare(TM);
121 const TargetLowering *TLI = TM->getTargetLowering();
H A DAtomicExpandLoadLinkedPass.cpp32 const TargetMachine *TM; member in class:__anon25730::AtomicExpandLoadLinked
35 explicit AtomicExpandLoadLinked(const TargetMachine *TM = nullptr)
36 : FunctionPass(ID), TM(TM) {
59 FunctionPass *llvm::createAtomicExpandLoadLinkedPass(const TargetMachine *TM) { argument
60 return new AtomicExpandLoadLinked(TM);
64 if (!TM || !TM->getSubtargetImpl()->enableAtomicExpandLoadLinked())
81 if (!TM->getTargetLowering()->shouldExpandAtomicInIR(Inst))
103 TM
[all...]
/external/llvm/lib/Target/ARM/
H A DARMInstrInfo.cpp105 const ARMTargetMachine *TM = variable
107 if (TM->getRelocationModel() != Reloc::PIC_)
112 unsigned PCAdj = TM->getSubtarget<ARMSubtarget>().isThumb() ? 4 : 8;
116 unsigned Align = TM->getDataLayout()
125 unsigned Opc = TM->getSubtarget<ARMSubtarget>().isThumb2() ?
127 const TargetInstrInfo &TII = *TM->getInstrInfo();
137 Opc = TM->getSubtarget<ARMSubtarget>().isThumb2() ? ARM::tPICADD
H A DARMAsmPrinter.h49 explicit ARMAsmPrinter(TargetMachine &TM, MCStreamer &Streamer) argument
50 : AsmPrinter(TM, Streamer), AFI(nullptr), MCP(nullptr),
52 Subtarget = &TM.getSubtarget<ARMSubtarget>();
/external/llvm/lib/Target/X86/
H A DX86PadShortFunction.cpp54 , Threshold(4), TM(nullptr), TII(nullptr) {}
82 const TargetMachine *TM; member in struct:__anon26201::PadShortFunc
104 TM = &MF.getTarget();
105 if (!TM->getSubtarget<X86Subtarget>().padShortFunctions())
108 TII = TM->getInstrInfo();
198 CyclesToEnd += TII->getInstrLatency(TM->getInstrItineraryData(), MI);
/external/llvm/lib/Target/Sparc/
H A DSparc.h30 FunctionPass *createSparcISelDag(SparcTargetMachine &TM);
31 FunctionPass *createSparcDelaySlotFillerPass(TargetMachine &TM);
32 FunctionPass *createSparcJITCodeEmitterPass(SparcTargetMachine &TM,

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