Searched refs:FirstReg (Results 1 - 7 of 7) sorted by relevance
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FunctionLoweringInfo.cpp | 265 unsigned FirstReg = 0; local
273 if (!FirstReg) FirstReg = R;
276 return FirstReg;
|
| /external/llvm/lib/CodeGen/ |
| H A D | AggressiveAntiDepBreaker.cpp | 484 unsigned FirstReg = 0;
491 if (FirstReg != 0) {
493 State->UnionGroups(FirstReg, Reg);
496 FirstReg = Reg;
500 DEBUG(dbgs() << "->g" << State->GetGroup(FirstReg) << '\n');
|
| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 667 unsigned FirstReg = SwapOps ? FalseReg : TrueReg, local
673 if (MRI.getRegClass(FirstReg)->contains(PPC::R0) ||
674 MRI.getRegClass(FirstReg)->contains(PPC::X0)) {
676 MRI.getRegClass(FirstReg)->contains(PPC::X0) ?
678 unsigned OldFirstReg = FirstReg;
679 FirstReg = MRI.createVirtualRegister(FirstRC);
680 BuildMI(MBB, MI, dl, get(TargetOpcode::COPY), FirstReg)
685 .addReg(FirstReg).addReg(SecondReg)
|
| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| H A D | AArch64InstPrinter.cpp | 1174 if (unsigned FirstReg = MRI.getSubReg(Reg, AArch64::dsub0))
1175 Reg = FirstReg;
1176 else if (unsigned FirstReg = MRI.getSubReg(Reg, AArch64::qsub0))
1177 Reg = FirstReg;
|
| /external/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 1163 unsigned FirstReg = FirstRegs[NumRegs - 1]; local
1166 MCOperand::CreateReg(FirstReg + getVectorListStart() - AArch64::Q0));
1174 unsigned FirstReg = FirstRegs[NumRegs - 1]; local
1177 MCOperand::CreateReg(FirstReg + getVectorListStart() - AArch64::Q0));
2832 int64_t FirstReg = tryMatchVectorRegister(Kind, true); local
2833 if (FirstReg == -1)
2835 int64_t PrevReg = FirstReg;
2894 FirstReg, Count, NumElements, ElementKind, S, getLoc(), getContext()));
|
| /external/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 3541 unsigned FirstReg = Reg; local
3545 FirstReg = Reg = getDRegFromQReg(Reg);
3687 FirstReg = MRI->getMatchingSuperReg(FirstReg, ARM::dsub_0, RC);
3690 Operands.push_back(ARMOperand::CreateVectorList(FirstReg, Count,
3700 FirstReg = MRI->getMatchingSuperReg(FirstReg, ARM::dsub_0, RC);
3702 Operands.push_back(ARMOperand::CreateVectorListAllLanes(FirstReg, Count,
3707 Operands.push_back(ARMOperand::CreateVectorListIndexed(FirstReg, Count,
|
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 1923 unsigned FirstReg = MI->getOperand(RegListIdx).getReg(); local
1944 for (unsigned CurReg = FirstReg - 1; CurReg >= RD0Reg && RegsNeeded;
|
Completed in 2633 milliseconds