| /external/clang/test/FixIt/ |
| H A D | fixit.cpp | 276 struct Shr { struct in namespace:greatergreater
277 template<typename T> Shr(T);
289 (Shr)&t<S<int>>>>=p; // expected-error {{use '> >'}}
292 //(Shr)&t<int>>>=p;
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| /external/chromium_org/v8/src/compiler/ |
| H A D | machine-operator.h | 157 V(Word, Shr) \
|
| /external/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSimplifyDemanded.cpp | 601 Instruction *Shr = cast<Instruction>(I->getOperand(0)); local
602 Value *R = SimplifyShrShlDemandedBits(Shr, I, DemandedMask,
845 Value *InstCombiner::SimplifyShrShlDemandedBits(Instruction *Shr, argument
849 const APInt &ShrOp1 = cast<ConstantInt>(Shr->getOperand(1))->getValue();
853 Value *VarX = Shr->getOperand(0);
869 bool isLshr = (Shr->getOpcode() == Instruction::LShr);
885 if (!Shr->hasOneUse())
899 if (cast<BinaryOperator>(Shr)->isExact())
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| H A D | InstCombineCompares.cpp | 961 Instruction *InstCombiner::FoldICmpShrCst(ICmpInst &ICI, BinaryOperator *Shr, argument
976 if (ICI.isSigned() != (Shr->getOpcode() == Instruction::AShr))
982 if (Shr->getOpcode() == Instruction::AShr &&
983 (!Shr->isExact() || ShAmtVal == TypeBits - 1))
987 Worklist.Add(Shr);
990 ConstantInt::get(Shr->getType(), APInt::getOneBitSet(TypeBits, ShAmtVal));
993 Shr->getOpcode() == Instruction::AShr ?
994 Builder->CreateSDiv(Shr->getOperand(0), DivCst, "", Shr->isExact()) :
995 Builder->CreateUDiv(Shr
[all...] |
| /external/llvm/include/llvm/MC/ |
| H A D | MCExpr.h | 402 Shr, ///< Shift right (arithmetic or logical, depending on target) enumerator in enum:llvm::MCBinaryExpr::Opcode
482 return Create(Shr, LHS, RHS, Ctx);
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| /external/clang/include/clang/AST/ |
| H A D | StmtVisitor.h | 124 BINOP_FALLBACK(Shr)
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| H A D | DataRecursiveASTVisitor.h | 50 OPERATOR(Rem) OPERATOR(Add) OPERATOR(Sub) OPERATOR(Shl) OPERATOR(Shr) \
58 OPERATOR(Shl) OPERATOR(Shr) OPERATOR(And) OPERATOR(Or) OPERATOR(Xor)
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| H A D | RecursiveASTVisitor.h | 50 OPERATOR(Rem) OPERATOR(Add) OPERATOR(Sub) OPERATOR(Shl) OPERATOR(Shr) \
58 OPERATOR(Shl) OPERATOR(Shr) OPERATOR(And) OPERATOR(Or) OPERATOR(Xor)
|
| /external/llvm/lib/MC/ |
| H A D | MCExpr.cpp | 110 case MCBinaryExpr::Shr: OS << ">>"; break;
782 case MCBinaryExpr::Shr: Result = LHS >> RHS; break;
|
| /external/clang/lib/CodeGen/ |
| H A D | CGExprScalar.cpp | 478 HANDLEBINOP(Shr)
3365 COMPOUND_OP(Shr);
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| /external/llvm/lib/Target/R600/ |
| H A D | AMDGPUISelLowering.cpp | 1728 SDValue Shr = DAG.getNode(ISD::SRA, SL, MVT::i64, FractMask, Exp); local
1729 SDValue Not = DAG.getNOT(SL, Shr, MVT::i64);
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| /external/chromium_org/v8/src/ |
| H A D | hydrogen-instructions.h | 142 V(Shr) \
5190 DECLARE_CONCRETE_INSTRUCTION(Shr)
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 2498 SDValue Shr = DAG.getNode(ISD::SRL, dl, MVT::i64, Op0, ShiftConst);
2501 SDValue Or = DAG.getNode(ISD::OR, dl, MVT::i64, And, Shr);
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| H A D | DAGCombiner.cpp | 11270 SDValue Shr = DAG.getNode(ISD::SRA, SDLoc(N0), VT, Shl, ShrAmt); local
11272 return DAG.getNode(ISD::AND, DL, VT, Shr, N3);
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| /external/llvm/lib/MC/MCParser/ |
| H A D | AsmParser.cpp | 1131 Kind = MCBinaryExpr::Shr;
|