/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/radeon/ |
H A D | radeon_state_init.c | 537 ALLOC_STATE( vpt, always, VPT_STATE_SIZE, "VPT/viewport", 0 ); 595 rmesa->hw.vpt.cmd[VPT_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_SE_VPORT_XSCALE); 778 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XSCALE] = 0x00000000; 779 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] = 0x00000000; 780 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YSCALE] = 0x00000000; 781 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] = 0x00000000; 782 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZSCALE] = 0x00000000; 783 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZOFFSET] = 0x00000000;
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H A D | radeon_state.c | 1372 RADEON_STATECHANGE( rmesa, vpt ); 1374 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XSCALE] = sx.ui32; 1375 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] = tx.ui32; 1376 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YSCALE] = sy.ui32; 1377 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] = ty.ui32; 1378 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZSCALE] = sz.ui32; 1379 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZOFFSET] = tz.ui32; 1415 if ( rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] != tx.ui32 || 1416 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] != ty.ui32 ) 1421 RADEON_STATECHANGE( rmesa, vpt ); [all...] |
H A D | radeon_context.h | 313 struct radeon_state_atom vpt; member in struct:r100_hw_state
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H A D | radeon_ioctl.c | 76 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.vpt);
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/external/mesa3d/src/mesa/drivers/dri/radeon/ |
H A D | radeon_state_init.c | 537 ALLOC_STATE( vpt, always, VPT_STATE_SIZE, "VPT/viewport", 0 ); 595 rmesa->hw.vpt.cmd[VPT_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_SE_VPORT_XSCALE); 778 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XSCALE] = 0x00000000; 779 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] = 0x00000000; 780 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YSCALE] = 0x00000000; 781 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] = 0x00000000; 782 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZSCALE] = 0x00000000; 783 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZOFFSET] = 0x00000000;
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H A D | radeon_state.c | 1372 RADEON_STATECHANGE( rmesa, vpt ); 1374 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XSCALE] = sx.ui32; 1375 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] = tx.ui32; 1376 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YSCALE] = sy.ui32; 1377 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] = ty.ui32; 1378 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZSCALE] = sz.ui32; 1379 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZOFFSET] = tz.ui32; 1415 if ( rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] != tx.ui32 || 1416 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] != ty.ui32 ) 1421 RADEON_STATECHANGE( rmesa, vpt ); [all...] |
H A D | radeon_context.h | 313 struct radeon_state_atom vpt; member in struct:r100_hw_state
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H A D | radeon_ioctl.c | 76 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.vpt);
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/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/ |
H A D | r200_state.c | 1565 R200_STATECHANGE( rmesa, vpt ); 1567 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XSCALE] = sx.ui32; 1568 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] = tx.ui32; 1569 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YSCALE] = sy.ui32; 1570 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] = ty.ui32; 1571 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZSCALE] = sz.ui32; 1572 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZOFFSET] = tz.ui32; 1633 if ( rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] != tx.ui32 || 1634 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] != ty.ui32 ) 1639 R200_STATECHANGE( rmesa, vpt ); [all...] |
H A D | r200_state_init.c | 653 ALLOC_STATE( vpt, always, VPT_STATE_SIZE, "VPT/viewport", 0 ); 759 rmesa->hw.vpt.cmd[VPT_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_SE_VPORT_XSCALE); 1056 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XSCALE] = 0x00000000; 1057 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] = 0x00000000; 1058 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YSCALE] = 0x00000000; 1059 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] = 0x00000000; 1060 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZSCALE] = 0x00000000; 1061 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZOFFSET] = 0x00000000;
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H A D | r200_context.h | 489 struct radeon_state_atom vpt; member in struct:r200_hw_state
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H A D | r200_cmdbuf.c | 68 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.vpt );
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/external/mesa3d/src/mesa/drivers/dri/r200/ |
H A D | r200_state.c | 1565 R200_STATECHANGE( rmesa, vpt ); 1567 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XSCALE] = sx.ui32; 1568 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] = tx.ui32; 1569 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YSCALE] = sy.ui32; 1570 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] = ty.ui32; 1571 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZSCALE] = sz.ui32; 1572 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZOFFSET] = tz.ui32; 1633 if ( rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] != tx.ui32 || 1634 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] != ty.ui32 ) 1639 R200_STATECHANGE( rmesa, vpt ); [all...] |
H A D | r200_state_init.c | 653 ALLOC_STATE( vpt, always, VPT_STATE_SIZE, "VPT/viewport", 0 ); 759 rmesa->hw.vpt.cmd[VPT_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_SE_VPORT_XSCALE); 1056 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XSCALE] = 0x00000000; 1057 rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] = 0x00000000; 1058 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YSCALE] = 0x00000000; 1059 rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] = 0x00000000; 1060 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZSCALE] = 0x00000000; 1061 rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZOFFSET] = 0x00000000;
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H A D | r200_context.h | 489 struct radeon_state_atom vpt; member in struct:r200_hw_state
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H A D | r200_cmdbuf.c | 68 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.vpt );
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv30/ |
H A D | nv30_state.c | 386 const struct pipe_viewport_state *vpt) 390 nv30->viewport = *vpt; 385 nv30_set_viewport_state(struct pipe_context *pipe, const struct pipe_viewport_state *vpt) argument
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/external/mesa3d/src/gallium/drivers/nv30/ |
H A D | nv30_state.c | 386 const struct pipe_viewport_state *vpt) 390 nv30->viewport = *vpt; 385 nv30_set_viewport_state(struct pipe_context *pipe, const struct pipe_viewport_state *vpt) argument
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/ |
H A D | nv50_state.c | 876 const struct pipe_viewport_state *vpt) 880 nv50->viewport = *vpt; 875 nv50_set_viewport_state(struct pipe_context *pipe, const struct pipe_viewport_state *vpt) argument
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nvc0/ |
H A D | nvc0_state.c | 771 const struct pipe_viewport_state *vpt) 775 nvc0->viewport = *vpt; 770 nvc0_set_viewport_state(struct pipe_context *pipe, const struct pipe_viewport_state *vpt) argument
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/external/mesa3d/src/gallium/drivers/nv50/ |
H A D | nv50_state.c | 876 const struct pipe_viewport_state *vpt) 880 nv50->viewport = *vpt; 875 nv50_set_viewport_state(struct pipe_context *pipe, const struct pipe_viewport_state *vpt) argument
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/external/mesa3d/src/gallium/drivers/nvc0/ |
H A D | nvc0_state.c | 771 const struct pipe_viewport_state *vpt) 775 nvc0->viewport = *vpt; 770 nvc0_set_viewport_state(struct pipe_context *pipe, const struct pipe_viewport_state *vpt) argument
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