Searched refs:MBB (Results 1 - 25 of 306) sorted by path

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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
H A DAMDGPUAsmPrinter.cpp63 MachineBasicBlock &MBB = *BB; local
64 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
H A DAMDGPUConvertToISA.cpp54 MachineBasicBlock &MBB = *BB; local
55 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
58 TII->convertToISA(MI, MF, MBB.findDebugLoc(I));
H A DAMDGPUInstrInfo.cpp86 MachineBasicBlock &MBB) const {
87 while (iter != MBB.end()) {
100 MachineBasicBlock::iterator skipFlowControl(MachineBasicBlock *MBB) { argument
101 MachineBasicBlock::iterator tmp = MBB->end();
102 if (!MBB->size()) {
103 return MBB->end();
109 if (tmp == MBB->begin()) {
118 return MBB->end();
122 AMDGPUInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, argument
132 AMDGPUInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, argument
204 insertNoop(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const argument
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H A DAMDGPUInstrInfo.h45 MachineBasicBlock &MBB) const;
73 virtual void copyPhysReg(MachineBasicBlock &MBB,
78 void storeRegToStackSlot(MachineBasicBlock &MBB,
83 void loadRegFromStackSlot(MachineBasicBlock &MBB,
114 void insertNoop(MachineBasicBlock &MBB,
H A DAMDGPUMCInstLower.cpp67 const MachineBasicBlock *MBB = MI->getParent(); local
70 while (I != MBB->end() && I->isInsideBundle()) {
H A DAMDILFrameLowering.cpp46 AMDGPUFrameLowering::emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const
H A DAMDILFrameLowering.h42 virtual void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
H A DR600ExpandSpecialInstrs.cpp57 MachineBasicBlock &MBB = *BB; local
58 MachineBasicBlock::iterator I = MBB.begin();
59 while (I != MBB.end()) {
151 BuildMI(MBB, I, MBB.findDebugLoc(I), TII->get(Opcode), DstReg)
H A DR600InstrInfo.cpp49 R600InstrInfo::copyPhysReg(MachineBasicBlock &MBB, argument
58 BuildMI(MBB, MI, DL, get(AMDGPU::MOV))
71 BuildMI(MBB, MI, DL, get(AMDGPU::MOV), DestReg)
163 findFirstPredicateSetterFrom(MachineBasicBlock &MBB, argument
166 while (I != MBB.begin()) {
177 R600InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, argument
186 MachineBasicBlock::iterator I = MBB.end();
187 if (I == MBB.begin())
191 if (I == MBB.begin())
204 if (I == MBB
261 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument
367 isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCyles, unsigned ExtraPredCycles, const BranchProbability &Probability) const argument
387 isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCyles, const BranchProbability &Probability) const argument
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H A DR600InstrInfo.h43 virtual void copyPhysReg(MachineBasicBlock &MBB,
68 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB,
71 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const;
73 unsigned RemoveBranch(MachineBasicBlock &MBB) const;
80 isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCyles,
83 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCyles,
H A DSIInstrInfo.cpp37 SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB, argument
48 BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DestReg)
H A DSIInstrInfo.h33 virtual void copyPhysReg(MachineBasicBlock &MBB,
/external/llvm/include/llvm/CodeGen/
H A DAsmPrinter.h239 void EmitBasicBlockStart(const MachineBasicBlock &MBB) const;
287 isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const;
502 const MachineBasicBlock *MBB, unsigned uid) const;
H A DDFAPacketizer.h117 void PacketizeMIs(MachineBasicBlock *MBB,
133 void endPacket(MachineBasicBlock *MBB, MachineInstr *MI);
142 MachineBasicBlock *MBB) {
141 ignorePseudoInstruction(MachineInstr *I, MachineBasicBlock *MBB) argument
H A DFastISel.h342 void FastEmitBranch(MachineBasicBlock *MBB, DebugLoc DL);
407 /// result in multiple MBB's for one BB. As such, the start of the BB might
408 /// correspond to a different MBB than the end.
H A DFunctionLoweringInfo.h90 /// MBB - The current block.
91 MachineBasicBlock *MBB; member in class:llvm::FunctionLoweringInfo
93 /// MBB - The current insert position inside the current block.
119 /// If the current MBB is a landing pad, the exception pointer and exception
225 MachineModuleInfo *MMI, MachineBasicBlock *MBB);
230 MachineBasicBlock *MBB);
H A DJITCodeEmitter.h281 void StartMachineBasicBlock(MachineBasicBlock *MBB) override = 0;
320 /// MachineBasicBlock, only usable after the label for the MBB has been
324 getMachineBasicBlockAddress(MachineBasicBlock *MBB) const override = 0;
H A DLexicalScopes.h170 bool dominates(DebugLoc DL, MachineBasicBlock *MBB);
H A DLiveIntervalAnalysis.h144 /// instruction to the end of its MBB.
237 void insertMBBInMaps(MachineBasicBlock *MBB) { argument
238 Indexes->insertMBBInMaps(MBB);
239 assert(unsigned(MBB->getNumber()) == RegMaskBlocks.size() &&
320 void repairIntervalsInRange(MachineBasicBlock *MBB,
H A DLivePhysRegs.h114 /// \brief Adds all live-in registers of basic block @p MBB.
115 void addLiveIns(const MachineBasicBlock *MBB) { argument
116 for (MachineBasicBlock::livein_iterator LI = MBB->livein_begin(),
117 LE = MBB->livein_end(); LI != LE; ++LI)
121 /// \brief Adds all live-out registers of basic block @p MBB.
122 void addLiveOuts(const MachineBasicBlock *MBB) { argument
123 for (MachineBasicBlock::const_succ_iterator SI = MBB->succ_begin(),
124 SE = MBB->succ_end(); SI != SE; ++SI)
H A DLiveRangeEdit.h188 /// instruction into MBB before MI. The new instruction is mapped, but
191 SlotIndex rematerializeAt(MachineBasicBlock &MBB,
H A DLiveVariables.h103 /// findKill - Find a kill instruction in MBB. Return NULL if none is found.
104 MachineInstr *findKill(const MachineBasicBlock *MBB) const;
106 /// isLiveIn - Is Reg live in to MBB? This means that Reg is live through
107 /// MBB, or it is killed in MBB. If Reg is only used by PHI instructions in
108 /// MBB, it is not considered live in.
109 bool isLiveIn(const MachineBasicBlock &MBB,
278 void HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB,
281 bool isLiveIn(unsigned Reg, const MachineBasicBlock &MBB) { argument
282 return getVarInfo(Reg).isLiveIn(MBB, Re
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H A DMachineBasicBlock.h408 /// transferSuccessors - Transfers all the successors from MBB to this
418 /// isPredecessor - Return true if the specified MBB is a predecessor of this
420 bool isPredecessor(const MachineBasicBlock *MBB) const;
422 /// isSuccessor - Return true if the specified MBB is a successor of this
424 bool isSuccessor(const MachineBasicBlock *MBB) const;
426 /// isLayoutSuccessor - Return true if the specified MBB will be emitted
428 /// falling through, control will transfer to the specified MBB. Note
429 /// that MBB need not be a successor at all, for example if this block
431 bool isLayoutSuccessor(const MachineBasicBlock *MBB) const;
446 /// SkipPHIsAndLabels - Return the first instruction in MBB afte
770 MachineBasicBlock &MBB; member in class:llvm::MachineInstrSpan
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H A DMachineBlockFrequencyInfo.h1 //===- MachineBlockFrequencyInfo.h - MBB Frequency Analysis -*- C++ -*-----===//
51 BlockFrequency getBlockFreq(const MachineBasicBlock *MBB) const;
63 const MachineBasicBlock *MBB) const;
H A DMachineBranchProbabilityInfo.h60 uint32_t getSumForBlock(const MachineBasicBlock *MBB, uint32_t &Scale) const;
68 MachineBasicBlock *getHotSucc(MachineBasicBlock *MBB) const;

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