Searched refs:rn (Results 1 - 25 of 78) sorted by last modified time

1234

/external/wpa_supplicant_8/hostapd/src/drivers/
H A Ddriver_nl80211.c7820 struct rtnl_neigh *rn; local
7824 rn = rtnl_neigh_alloc();
7825 if (!rn)
7828 rtnl_neigh_set_family(rn, AF_BRIDGE);
7829 rtnl_neigh_set_ifindex(rn, bss->ifindex);
7832 rtnl_neigh_put(rn);
7835 rtnl_neigh_set_lladdr(rn, nl_addr);
7837 err = rtnl_neigh_delete(drv->rtnl_sk, rn, 0);
7848 rtnl_neigh_put(rn);
/external/wpa_supplicant_8/src/drivers/
H A Ddriver_nl80211.c7820 struct rtnl_neigh *rn; local
7824 rn = rtnl_neigh_alloc();
7825 if (!rn)
7828 rtnl_neigh_set_family(rn, AF_BRIDGE);
7829 rtnl_neigh_set_ifindex(rn, bss->ifindex);
7832 rtnl_neigh_put(rn);
7835 rtnl_neigh_set_lladdr(rn, nl_addr);
7837 err = rtnl_neigh_delete(drv->rtnl_sk, rn, 0);
7848 rtnl_neigh_put(rn);
/external/wpa_supplicant_8/wpa_supplicant/src/drivers/
H A Ddriver_nl80211.c7820 struct rtnl_neigh *rn; local
7824 rn = rtnl_neigh_alloc();
7825 if (!rn)
7828 rtnl_neigh_set_family(rn, AF_BRIDGE);
7829 rtnl_neigh_set_ifindex(rn, bss->ifindex);
7832 rtnl_neigh_put(rn);
7835 rtnl_neigh_set_lladdr(rn, nl_addr);
7837 err = rtnl_neigh_delete(drv->rtnl_sk, rn, 0);
7848 rtnl_neigh_put(rn);
/external/wpa_supplicant_8/wpa_supplicant/
H A Dwpa_supplicant.c3282 const char *rn)
3287 while (rn && iface) {
3289 if (radio && os_strcmp(rn, radio->name) == 0) {
3291 wpa_s->ifname, rn);
3300 wpa_s->ifname, rn ? rn : "N/A");
3305 if (rn)
3306 os_strlcpy(radio->name, rn, sizeof(radio->name));
3538 const char *ifname, *driver, *rn; local
3572 rn
3281 radio_add_interface(struct wpa_supplicant *wpa_s, const char *rn) argument
[all...]
/external/vixl/src/a64/
H A Dassembler-a64.cc545 const Register& rn,
547 AddSub(rd, rn, operand, LeaveFlags, ADD);
552 const Register& rn,
554 AddSub(rd, rn, operand, SetFlags, ADD);
558 void Assembler::cmn(const Register& rn, argument
560 Register zr = AppropriateZeroRegFor(rn);
561 adds(zr, rn, operand);
566 const Register& rn,
568 AddSub(rd, rn, operand, LeaveFlags, SUB);
573 const Register& rn,
544 add(const Register& rd, const Register& rn, const Operand& operand) argument
551 adds(const Register& rd, const Register& rn, const Operand& operand) argument
565 sub(const Register& rd, const Register& rn, const Operand& operand) argument
572 subs(const Register& rd, const Register& rn, const Operand& operand) argument
579 cmp(const Register& rn, const Operand& operand) argument
597 adc(const Register& rd, const Register& rn, const Operand& operand) argument
604 adcs(const Register& rd, const Register& rn, const Operand& operand) argument
611 sbc(const Register& rd, const Register& rn, const Operand& operand) argument
618 sbcs(const Register& rd, const Register& rn, const Operand& operand) argument
638 and_(const Register& rd, const Register& rn, const Operand& operand) argument
645 ands(const Register& rd, const Register& rn, const Operand& operand) argument
652 tst(const Register& rn, const Operand& operand) argument
654 ands(AppropriateZeroRegFor(rn), rn, operand); local
658 bic(const Register& rd, const Register& rn, const Operand& operand) argument
665 bics(const Register& rd, const Register& rn, const Operand& operand) argument
672 orr(const Register& rd, const Register& rn, const Operand& operand) argument
679 orn(const Register& rd, const Register& rn, const Operand& operand) argument
686 eor(const Register& rd, const Register& rn, const Operand& operand) argument
693 eon(const Register& rd, const Register& rn, const Operand& operand) argument
700 lslv(const Register& rd, const Register& rn, const Register& rm) argument
709 lsrv(const Register& rd, const Register& rn, const Register& rm) argument
718 asrv(const Register& rd, const Register& rn, const Register& rm) argument
727 rorv(const Register& rd, const Register& rn, const Register& rm) argument
737 bfm(const Register& rd, const Register& rn, unsigned immr, unsigned imms) argument
748 sbfm(const Register& rd, const Register& rn, unsigned immr, unsigned imms) argument
759 ubfm(const Register& rd, const Register& rn, unsigned immr, unsigned imms) argument
770 extr(const Register& rd, const Register& rn, const Register& rm, unsigned lsb) argument
781 csel(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
789 csinc(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
797 csinv(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
805 csneg(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
827 cinc(const Register &rd, const Register &rn, Condition cond) argument
833 cinv(const Register &rd, const Register &rn, Condition cond) argument
839 cneg(const Register &rd, const Register &rn, Condition cond) argument
845 ConditionalSelect(const Register& rd, const Register& rn, const Register& rm, Condition cond, ConditionalSelectOp op) argument
856 ccmn(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond) argument
864 ccmp(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond) argument
872 DataProcessing3Source(const Register& rd, const Register& rn, const Register& rm, const Register& ra, DataProcessing3SourceOp op) argument
881 mul(const Register& rd, const Register& rn, const Register& rm) argument
889 madd(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
897 mneg(const Register& rd, const Register& rn, const Register& rm) argument
905 msub(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
913 umaddl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
923 smaddl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
933 umsubl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
943 smsubl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
953 smull(const Register& rd, const Register& rn, const Register& rm) argument
962 sdiv(const Register& rd, const Register& rn, const Register& rm) argument
978 udiv(const Register& rd, const Register& rn, const Register& rm) argument
987 rbit(const Register& rd, const Register& rn) argument
993 rev16(const Register& rd, const Register& rn) argument
999 rev32(const Register& rd, const Register& rn) argument
1006 rev(const Register& rd, const Register& rn) argument
1012 clz(const Register& rd, const Register& rn) argument
1018 cls(const Register& rd, const Register& rn) argument
1238 fmov(const FPRegister& fd, const Register& rn) argument
1486 scvtf(const FPRegister& fd, const Register& rn, unsigned fbits) argument
1498 ucvtf(const FPRegister& fd, const Register& rn, unsigned fbits) argument
1583 AddSub(const Register& rd, const Register& rn, const Operand& operand, FlagsUpdate S, AddSubOp op) argument
1620 AddSubWithCarry(const Register& rd, const Register& rn, const Operand& operand, FlagsUpdate S, AddSubWithCarryOp op) argument
1644 Logical(const Register& rd, const Register& rn, const Operand& operand, LogicalOp op) argument
1680 LogicalImmediate(const Register& rd, const Register& rn, unsigned n, unsigned imm_s, unsigned imm_r, LogicalOp op) argument
1694 ConditionalCompare(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond, ConditionalCompareOp op) argument
1712 DataProcessing1Source(const Register& rd, const Register& rn, DataProcessing1SourceOp op) argument
1747 EmitShift(const Register& rd, const Register& rn, Shift shift, unsigned shift_amount) argument
1770 EmitExtendShift(const Register& rd, const Register& rn, Extend extend, unsigned left_shift) argument
1807 DataProcShiftedRegister(const Register& rd, const Register& rn, const Operand& operand, FlagsUpdate S, Instr op) argument
1821 DataProcExtendedRegister(const Register& rd, const Register& rn, const Operand& operand, FlagsUpdate S, Instr op) argument
[all...]
H A Dassembler-a64.h739 const Register& rn,
744 const Register& rn,
748 void cmn(const Register& rn, const Operand& operand);
752 const Register& rn,
757 const Register& rn,
761 void cmp(const Register& rn, const Operand& operand);
773 const Register& rn,
778 const Register& rn,
783 const Register& rn,
788 const Register& rn,
[all...]
H A Dmacro-assembler-a64.cc50 const Register& rn,
53 LogicalMacro(rd, rn, operand, AND);
58 const Register& rn,
61 LogicalMacro(rd, rn, operand, ANDS);
65 void MacroAssembler::Tst(const Register& rn, argument
68 Ands(AppropriateZeroRegFor(rn), rn, operand); local
73 const Register& rn,
76 LogicalMacro(rd, rn, operand, BIC);
81 const Register& rn,
49 And(const Register& rd, const Register& rn, const Operand& operand) argument
57 Ands(const Register& rd, const Register& rn, const Operand& operand) argument
72 Bic(const Register& rd, const Register& rn, const Operand& operand) argument
80 Bics(const Register& rd, const Register& rn, const Operand& operand) argument
88 Orr(const Register& rd, const Register& rn, const Operand& operand) argument
96 Orn(const Register& rd, const Register& rn, const Operand& operand) argument
104 Eor(const Register& rd, const Register& rn, const Operand& operand) argument
112 Eon(const Register& rd, const Register& rn, const Operand& operand) argument
120 LogicalMacro(const Register& rd, const Register& rn, const Operand& operand, LogicalOp op) argument
386 Ccmp(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond) argument
399 Ccmn(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond) argument
412 ConditionalCompareMacro(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond, ConditionalCompareOp op) argument
434 Csel(const Register& rd, const Register& rn, const Operand& operand, Condition cond) argument
472 Add(const Register& rd, const Register& rn, const Operand& operand) argument
484 Adds(const Register& rd, const Register& rn, const Operand& operand) argument
496 Sub(const Register& rd, const Register& rn, const Operand& operand) argument
508 Subs(const Register& rd, const Register& rn, const Operand& operand) argument
520 Cmn(const Register& rn, const Operand& operand) argument
522 Adds(AppropriateZeroRegFor(rn), rn, operand); local
526 Cmp(const Register& rn, const Operand& operand) argument
528 Subs(AppropriateZeroRegFor(rn), rn, operand); local
600 AddSubMacro(const Register& rd, const Register& rn, const Operand& operand, FlagsUpdate S, AddSubOp op) argument
624 Adc(const Register& rd, const Register& rn, const Operand& operand) argument
632 Adcs(const Register& rd, const Register& rn, const Operand& operand) argument
640 Sbc(const Register& rd, const Register& rn, const Operand& operand) argument
648 Sbcs(const Register& rd, const Register& rn, const Operand& operand) argument
672 AddSubWithCarryMacro(const Register& rd, const Register& rn, const Operand& operand, FlagsUpdate S, AddSubWithCarryOp op) argument
[all...]
H A Dmacro-assembler-a64.h100 const Register& rn,
103 const Register& rn,
106 const Register& rn,
109 const Register& rn,
112 const Register& rn,
115 const Register& rn,
118 const Register& rn,
121 const Register& rn,
123 void Tst(const Register& rn, const Operand& operand);
125 const Register& rn,
348 Asr(const Register& rd, const Register& rn, unsigned shift) argument
354 Asr(const Register& rd, const Register& rn, const Register& rm) argument
389 Bfi(const Register& rd, const Register& rn, unsigned lsb, unsigned width) argument
398 Bfxil(const Register& rd, const Register& rn, unsigned lsb, unsigned width) argument
439 Cinc(const Register& rd, const Register& rn, Condition cond) argument
445 Cinv(const Register& rd, const Register& rn, Condition cond) argument
451 Cls(const Register& rd, const Register& rn) argument
457 Clz(const Register& rd, const Register& rn) argument
463 Cneg(const Register& rd, const Register& rn, Condition cond) argument
479 Csinc(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
490 Csinv(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
501 Csneg(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
520 Extr(const Register& rd, const Register& rn, const Register& rm, unsigned lsb) argument
637 Fmov(FPRegister fd, Register rn) argument
772 Lsl(const Register& rd, const Register& rn, unsigned shift) argument
778 Lsl(const Register& rd, const Register& rn, const Register& rm) argument
785 Lsr(const Register& rd, const Register& rn, unsigned shift) argument
791 Lsr(const Register& rd, const Register& rn, const Register& rm) argument
798 Madd(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
809 Mneg(const Register& rd, const Register& rn, const Register& rm) argument
816 Mov(const Register& rd, const Register& rn) argument
835 Msub(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
846 Mul(const Register& rd, const Register& rn, const Register& rm) argument
857 Rbit(const Register& rd, const Register& rn) argument
868 Rev(const Register& rd, const Register& rn) argument
874 Rev16(const Register& rd, const Register& rn) argument
880 Rev32(const Register& rd, const Register& rn) argument
892 Ror(const Register& rd, const Register& rn, const Register& rm) argument
899 Sbfiz(const Register& rd, const Register& rn, unsigned lsb, unsigned width) argument
908 Sbfx(const Register& rd, const Register& rn, unsigned lsb, unsigned width) argument
917 Scvtf(const FPRegister& fd, const Register& rn, unsigned fbits = 0) argument
922 Sdiv(const Register& rd, const Register& rn, const Register& rm) argument
929 Smaddl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
940 Smsubl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
951 Smull(const Register& rd, const Register& rn, const Register& rm) argument
977 Sxtb(const Register& rd, const Register& rn) argument
983 Sxth(const Register& rd, const Register& rn) argument
989 Sxtw(const Register& rd, const Register& rn) argument
1005 Ubfiz(const Register& rd, const Register& rn, unsigned lsb, unsigned width) argument
1014 Ubfx(const Register& rd, const Register& rn, unsigned lsb, unsigned width) argument
1023 Ucvtf(const FPRegister& fd, const Register& rn, unsigned fbits = 0) argument
1028 Udiv(const Register& rd, const Register& rn, const Register& rm) argument
1035 Umaddl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
1046 Umsubl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
1067 Uxtb(const Register& rd, const Register& rn) argument
1073 Uxth(const Register& rd, const Register& rn) argument
1079 Uxtw(const Register& rd, const Register& rn) argument
[all...]
H A Dsimulator-a64.cc1150 int32_t rn = wreg(instr->Rn()); local
1152 if ((rn == kWMinInt) && (rm == -1)) {
1158 result = rn / rm;
1163 int64_t rn = xreg(instr->Rn()); local
1165 if ((rn == kXMinInt) && (rm == -1)) {
1171 result = rn / rm;
1176 uint32_t rn = static_cast<uint32_t>(wreg(instr->Rn())); local
1182 result = rn / rm;
1187 uint64_t rn = static_cast<uint64_t>(xreg(instr->Rn())); local
1193 result = rn / r
[all...]
/external/vixl/test/
H A Dtest-simulator-a64.cc167 const Register& rn,
/external/valgrind/main/none/tests/arm/
H A Dv6intARM.stdout.exp25 adds r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, carryin 0, cpsr 0x40000000 Z
26 adds r0, r1, r2 :: rd 0x00000001 rm 0x00000000, rn 0x00000001, carryin 0, cpsr 0x00000000
27 adds r0, r1, r2 :: rd 0x00000001 rm 0x00000001, rn 0x00000000, carryin 0, cpsr 0x00000000
28 adds r0, r1, r2 :: rd 0x00000002 rm 0x00000001, rn 0x00000001, carryin 0, cpsr 0x00000000
29 adds r0, r1, r2 :: rd 0xffffffff rm 0x00000000, rn 0xffffffff, carryin 0, cpsr 0x80000000 N
30 adds r0, r1, r2 :: rd 0x00000000 rm 0x00000001, rn 0xffffffff, carryin 0, cpsr 0x60000000 ZC
31 adds r0, r1, r2 :: rd 0x80000000 rm 0x7fffffff, rn 0x00000001, carryin 0, cpsr 0x90000000 N V
32 adds r0, r1, r2 :: rd 0x7fffffff rm 0x80000000, rn 0xffffffff, carryin 0, cpsr 0x30000000 CV
33 adds r0, r1, r2 :: rd 0x80000000 rm 0x80000000, rn 0x00000000, carryin 0, cpsr 0x80000000 N
35 adcs r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn
[all...]
H A Dv6intThumb.stdout.exp2 cmp r3, r6 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, c:v-in 0, cpsr 0x60000000 ZC
3 cmp r3, r6 :: rd 0x00000000 rm 0x00000001, rn 0x00000000, c:v-in 0, cpsr 0x20000000 C
4 cmp r3, r6 :: rd 0x00000001 rm 0x00000000, rn 0x00000001, c:v-in 0, cpsr 0x80000000 N
5 cmp r3, r6 :: rd 0x00000000 rm 0xffffffff, rn 0x00000000, c:v-in 0, cpsr 0xa0000000 N C
6 cmp r3, r6 :: rd 0xffffffff rm 0x00000000, rn 0xffffffff, c:v-in 0, cpsr 0x00000000
7 cmp r3, r6 :: rd 0x80000000 rm 0x00000000, rn 0x80000000, c:v-in 0, cpsr 0x90000000 N V
8 cmp r3, r6 :: rd 0x00000000 rm 0x80000000, rn 0x00000000, c:v-in 0, cpsr 0xa0000000 N C
9 cmp r3, r6 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, c:v-in 0, cpsr 0x60000000 ZC
10 cmp r3, r6 :: rd 0x00000000 rm 0x00000001, rn 0x00000000, c:v-in 0, cpsr 0x20000000 C
11 cmp r3, r6 :: rd 0x00000001 rm 0x00000000, rn
[all...]
H A Dv6media.stdout.exp2 mul r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, carryin 0, cpsr 0x00000000 ge[3:0]=0000
3 mul r0, r1, r2 :: rd 0x00000000 rm 0xffffffff, rn 0x00000000, carryin 0, cpsr 0x00000000 ge[3:0]=0000
4 mul r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0xffffffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000
5 mul r0, r1, r2 :: rd 0x00000001 rm 0xffffffff, rn 0xffffffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000
6 mul r0, r1, r2 :: rd 0x00000001 rm 0x7fffffff, rn 0x7fffffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000
7 mul r0, r1, r2 :: rd 0xfffe0001 rm 0x0000ffff, rn 0x0000ffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000
9 mla r0, r1, r2, r3 :: rd 0x00000001 rm 0x00000000, rn 0x00000000 rs 0x00000001, carryin 0, cpsr 0x00000000 ge[3:0]=0000
10 mla r0, r1, r2, r3 :: rd 0x00000001 rm 0xffffffff, rn 0x00000000 rs 0x00000001, carryin 0, cpsr 0x00000000 ge[3:0]=0000
11 mla r0, r1, r2, r3 :: rd 0x00000001 rm 0x00000000, rn 0xffffffff rs 0x00000001, carryin 0, cpsr 0x00000000 ge[3:0]=0000
12 mla r0, r1, r2, r3 :: rd 0x00000002 rm 0xffffffff, rn
[all...]
/external/srec/srec_jni/
H A Dandroid_speech_srec_Recognizer.cpp192 const char* rn = env->GetStringUTFChars(ruleName, 0); local
193 checkEsrError(env, SR_RecognizerSetupRule((SR_Recognizer*)recognizer, (SR_Grammar*)grammar, rn));
194 env->ReleaseStringUTFChars(ruleName, rn);
206 const char* rn = env->GetStringUTFChars(ruleName, 0); local
207 checkEsrError(env, SR_RecognizerActivateRule((SR_Recognizer*)recognizer, (SR_Grammar*)grammar, rn, weight));
208 env->ReleaseStringUTFChars(ruleName, rn);
213 const char* rn = env->GetStringUTFChars(ruleName, 0); local
214 checkEsrError(env, SR_RecognizerDeactivateRule((SR_Recognizer*)recognizer, (SR_Grammar*)grammar, rn));
215 env->ReleaseStringUTFChars(ruleName, rn);
226 const char* rn local
[all...]
/external/qemu/disas/
H A Darm.c1746 int rn = (given >> 16) & 0xf; local
1750 func (stream, "[%s", arm_regnames[rn]);
1759 if (rn == 15)
2075 const char *rn = arm_regnames [(given >> 16) & 0xf]; local
2082 func (stream, "[%s], %c%s", rn, ubit ? '+' : '-', rm);
2094 func (stream, "[%s, %c%s", rn, ubit ? '+' : '-', rm);
2288 int rn = ((given >> 16) & 0xf); local
2304 func (stream, "}, [%s", arm_regnames[rn]);
2318 int rn = ((given >> 16) & 0xf); local
2379 func (stream, "}, [%s", arm_regnames[rn]);
2393 int rn = ((given >> 16) & 0xf); local
[all...]
H A Dmips.c2794 #define mips16_reg_names(rn) mips_gpr_names[mips16_to_32_reg_map[rn]]
/external/qemu/target-arm/
H A Dop_helper.c35 uint32_t rn, uint32_t maxindex)
42 table = (uint64_t *)&env->vfp.regs[rn];
503 const int rn = (insn >> 16) & 0xf; local
508 uint32_t addr = env->regs[rn];
515 addr = env->regs[rn] + (1 << size) * reg;
517 addr = env->regs[rn] + (1 << size);
34 neon_tbl(CPUARMState *env, uint32_t ireg, uint32_t def, uint32_t rn, uint32_t maxindex) argument
H A Dtranslate.c1175 static inline void gen_op_iwmmxt_movq_wRn_M0(int rn) argument
1177 iwmmxt_store_reg(cpu_M0, rn);
1180 static inline void gen_op_iwmmxt_movq_M0_wRn(int rn) argument
1182 iwmmxt_load_reg(cpu_M0, rn);
1185 static inline void gen_op_iwmmxt_orq_M0_wRn(int rn) argument
1187 iwmmxt_load_reg(cpu_V1, rn);
1191 static inline void gen_op_iwmmxt_andq_M0_wRn(int rn) argument
1193 iwmmxt_load_reg(cpu_V1, rn);
1197 static inline void gen_op_iwmmxt_xorq_M0_wRn(int rn) argument
1199 iwmmxt_load_reg(cpu_V1, rn);
1308 gen_op_iwmmxt_addl_M0_wRn(int rn) argument
2753 uint32_t rd, rn, rm, op, i, n, offset, delta_d, delta_m, bank_mask; local
3905 int rd, rn, rm; local
4496 int rd, rn, rm; local
6575 unsigned int cond, insn, val, op1, i, shift, rm, rs, rn, rd, sh; local
7932 uint32_t rd, rn, rm, rs; local
9001 uint32_t val, insn, op, rm, rn, rd, shift, cond; local
[all...]
/external/qemu/target-mips/
H A Dtranslate.c2907 const char * __attribute__((unused)) rn = "invalid"; local
2917 rn = "Index";
2922 rn = "MVPControl";
2927 rn = "MVPConf0";
2932 rn = "MVPConf1";
2942 rn = "Random";
2947 rn = "VPEControl";
2952 rn = "VPEConf0";
2957 rn = "VPEConf1";
2962 rn
3484 const char * __attribute__((unused)) rn = "invalid"; local
4080 const char *rn = "invalid"; local
4646 const char *rn = "invalid"; local
[all...]
/external/qemu/util/
H A Dhost-utils.c45 LL rl, rm, rn, rh, a0, b0; local
53 rn.ll = (uint64_t)a0.l.high * b0.l.low;
56 c = (uint64_t)rl.l.high + rm.l.low + rn.l.low;
59 c = c + rm.l.high + rn.l.high + rh.l.low;
/external/pcre/dist/sljit/
H A DsljitNativeARM_32.c64 #define RN(rn) (reg_map[rn] << 16)
H A DsljitNativeARM_64.c54 #define RN(rn) (reg_map[rn] << 5)
H A DsljitNativeARM_T2_32.c54 #define RN3(rn) (reg_map[rn] << 3)
61 #define SET_REGS44(rd, rn) \
62 ((reg_map[rn] << 3) | (reg_map[rd] & 0x7) | ((reg_map[rd] & 0x8) << 4))
70 #define RN4(rn) (reg_map[rn] << 16)
/external/opencv/cv/src/
H A Dcvhough.cpp211 int rn, tn; /* number of rho and theta discrete values */ local
254 rn = cvFloor( sqrt( (double)w * w + (double)h * h ) * irho );
270 CV_CALL( caccum = (uchar*)cvAlloc( rn * tn * sizeof( caccum[0] )));
271 memset( caccum, 0, rn * tn * sizeof( caccum[0] ));
323 assert( i < rn * tn );
335 for( ri = 0; ri < rn; ri++ )
346 if( count * 100 > rn * tn )
356 for( ri = 0; ri < rn; ri++ )
H A Dcvkdtree.cpp120 int rn = results->rows * results->cols; local
127 inbounds.begin() + std::min((int)inbounds.size(), rn),

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