Searched refs:mir (Results 1 - 25 of 49) sorted by relevance

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/art/compiler/dex/
H A Dpost_opt_passes.cc30 MIR* mir = bb->first_mir_insn; local
32 while (mir != nullptr) {
33 MIR* next = mir->next;
35 Instruction::Code opcode = mir->dalvikInsn.opcode;
38 bb->RemoveMIR(mir);
41 mir = next;
H A Dmir_optimization.cc59 MIR* mir; local
61 for (mir = bb->first_mir_insn; mir != nullptr; mir = mir->next) {
63 if (mir->ssa_rep == nullptr) {
67 uint64_t df_attributes = GetDataFlowAttributes(mir);
69 MIR::DecodedInstruction* d_insn = &mir->dalvikInsn;
81 SetConstant(mir->ssa_rep->defs[0], vB);
84 SetConstant(mir
120 AdvanceMIR(BasicBlock** p_bb, MIR* mir) argument
145 FindMoveResult(BasicBlock* bb, MIR* mir) argument
200 SelectKind(MIR* mir) argument
823 MIR* mir = bb->last_mir_insn; local
1805 MIR* mir = NewMIR(); local
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H A Dmir_graph.cc707 // TODO: will need to snapshot stack image and use that as the mir context identification.
921 uint64_t MIRGraph::GetDataFlowAttributes(MIR* mir) { argument
922 DCHECK(mir != nullptr);
923 Instruction::Code opcode = mir->dalvikInsn.opcode;
998 const MIR* mir; local
1001 for (mir = bb->first_mir_insn; mir; mir = mir->next) {
1002 int opcode = mir
1090 AppendMIR(MIR* mir) argument
1142 PrependMIR(MIR* mir) argument
1153 MIR* mir = *it; local
1165 FindPreviousMIR(MIR* mir) argument
1211 RemoveMIR(MIR* mir) argument
1259 MIR* mir = first_mir_insn; local
1299 DisassembleExtendedInstr(const MIR* mir, std::string* decoded_mir) argument
1501 GetDalvikDisassembly(const MIR* mir) argument
1739 NewMemCallInfo(BasicBlock* bb, MIR* mir, InvokeType type, bool is_range) argument
1773 MIR* mir = new (arena_) MIR(); local
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H A Dlocal_value_numbering.cc489 const MIR* mir = fall_through_bb->first_mir_insn; local
490 DCHECK(mir != nullptr);
492 if ((mir->dalvikInsn.FlagsOf() & Instruction::kInvoke) != 0) {
493 HandleInvokeArgs(mir, lvn);
1027 uint16_t LocalValueNumbering::MarkNonAliasingNonNull(MIR* mir) { argument
1028 uint16_t res = GetOperandValue(mir->ssa_rep->defs[0]);
1069 void LocalValueNumbering::HandleNullCheck(MIR* mir, uint16_t reg) { argument
1074 LOG(INFO) << "Removing null check for 0x" << std::hex << mir->offset;
1076 mir->optimization_flags |= MIR_IGNORE_NULL_CHECK;
1083 void LocalValueNumbering::HandleRangeCheck(MIR* mir, uint16_ argument
1099 HandleDivZeroCheck(MIR* mir, uint16_t reg) argument
1113 HandlePutObject(MIR* mir) argument
1133 HandleInvokeArgs(const MIR* mir, const LocalValueNumbering* mir_lvn) argument
1152 HandlePhi(MIR* mir) argument
1209 HandleConst(MIR* mir, uint32_t value) argument
1222 HandleConstWide(MIR* mir, uint64_t value) argument
1234 HandleAGet(MIR* mir, uint16_t opcode) argument
1258 HandleAPut(MIR* mir, uint16_t opcode) argument
1296 HandleIGet(MIR* mir, uint16_t opcode) argument
1332 HandleIPut(MIR* mir, uint16_t opcode) argument
1401 HandleSGet(MIR* mir, uint16_t opcode) argument
1439 HandleSPut(MIR* mir, uint16_t opcode) argument
1489 HandleInvokeOrClInitOrAcquireOp(MIR* mir) argument
1503 GetValueNumber(MIR* mir) argument
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H A Dmir_dataflow.cc986 MIR* mir; local
998 for (mir = bb->first_mir_insn; mir != nullptr; mir = mir->next) {
999 uint64_t df_attributes = GetDataFlowAttributes(mir);
1000 MIR::DecodedInstruction* d_insn = &mir->dalvikInsn;
1039 HandleExtended(use_v, def_v, live_in_v, mir->dalvikInsn);
1075 void MIRGraph::AllocateSSAUseData(MIR *mir, int num_uses) { argument
1076 mir
1083 AllocateSSADefData(MIR *mir, int num_defs) argument
1092 DataFlowSSAFormat35C(MIR* mir) argument
1105 DataFlowSSAFormat3RC(MIR* mir) argument
1117 DataFlowSSAFormatExtended(MIR* mir) argument
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H A Dgvn_dead_code_elimination.cc90 void GvnDeadCodeElimination::VRegChains::AddMIRWithDef(MIR* mir, int v_reg, bool wide, argument
93 mir_data_.emplace_back(mir);
122 inline void GvnDeadCodeElimination::VRegChains::AddMIRWithoutDef(MIR* mir) { argument
123 mir_data_.emplace_back(mir);
152 DCHECK_EQ(static_cast<int>(last_data->mir->dalvikInsn.opcode), static_cast<int>(kMirOpNop));
365 SSARepresentation* ssa_rep = mir_data_[c].mir->ssa_rep;
380 SSARepresentation* ssa_rep = mir_data_[c].mir->ssa_rep;
393 SSARepresentation* ssa_rep = mir_data_[c].mir->ssa_rep;
411 MIR* mir = mir_data_[c].mir; local
508 KillMIR(MIR* mir) argument
514 ChangeBinOp2AddrToPlainBinOp(MIR* mir) argument
1036 RecordMIR(MIR* mir) argument
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H A Dgvn_dead_code_elimination.h63 : mir(m), uses_all_vregs(false), must_keep(false), is_move(false), is_move_src(false),
73 MIR* mir; member in struct:art::GvnDeadCodeElimination::MIRData
74 bool uses_all_vregs : 1; // If mir uses all vregs, uses in mir->ssa_rep are irrelevant.
93 void AddMIRWithDef(MIR* mir, int v_reg, bool wide, uint16_t new_value);
94 void AddMIRWithoutDef(MIR* mir);
132 static void KillMIR(MIR* mir);
133 static void ChangeBinOp2AddrToPlainBinOp(MIR* mir);
149 bool RecordMIR(MIR* mir);
H A Dlocal_value_numbering.h85 uint16_t GetValueNumber(MIR* mir);
307 uint16_t MarkNonAliasingNonNull(MIR* mir);
311 void HandleNullCheck(MIR* mir, uint16_t reg);
312 void HandleRangeCheck(MIR* mir, uint16_t array, uint16_t index);
313 void HandleDivZeroCheck(MIR* mir, uint16_t reg);
314 void HandlePutObject(MIR* mir);
316 void HandleInvokeArgs(const MIR* mir, const LocalValueNumbering* mir_lvn);
317 uint16_t HandlePhi(MIR* mir);
318 uint16_t HandleConst(MIR* mir, uint32_t value);
319 uint16_t HandleConstWide(MIR* mir, uint64_
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H A Dtype_inference.cc317 void TypeInference::CheckCastData::ProcessCheckCast(MIR* mir) { argument
318 auto mir_it = check_cast_map_.find(mir);
320 auto sreg_it = split_sreg_data_.find(mir->ssa_rep->uses[0]);
423 MIR* mir = bb->first_mir_insn; local
425 for (; mir != main_mirs_end && static_cast<int>(mir->dalvikInsn.opcode) == kMirOpPhi;
426 mir = mir->next) {
430 size_t num_uses = mir->ssa_rep->num_uses;
431 const int32_t* uses = mir
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H A Dmir_graph.h410 void AppendMIR(MIR* mir);
413 void PrependMIR(MIR* mir);
418 MIR* FindPreviousMIR(MIR* mir);
421 bool RemoveMIR(MIR* mir);
547 MIR* mir; member in struct:art::CallInfo
599 * @param mir sparse switch, packed switch, of fill-array-data
603 const uint16_t* GetTable(MIR* mir, uint32_t table_offset) const { argument
604 return GetInsns(mir->m_unit_index) + mir->offset + static_cast<int32_t>(table_offset);
700 const MirIFieldLoweringInfo& GetIFieldLoweringInfo(MIR* mir) cons
873 GetRawSrc(MIR* mir, int num) argument
879 GetRawDest(MIR* mir) argument
885 GetDest(MIR* mir) argument
891 GetSrc(MIR* mir, int num) argument
897 GetDestWide(MIR* mir) argument
903 GetSrcWide(MIR* mir, int low) argument
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H A Dmir_analysis.cc1002 for (MIR* mir = tbb->first_mir_insn; mir != nullptr; mir = mir->next) {
1003 if (MIR::DecodedInstruction::IsPseudoMirOp(mir->dalvikInsn.opcode)) {
1007 uint16_t flags = kAnalysisAttributes[mir->dalvikInsn.opcode];
1222 for (MIR* mir = bb->first_mir_insn; mir != nullptr; mir = mir
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H A Dglobal_value_numbering.h127 uint16_t GetIFieldId(MIR* mir) { argument
128 return GetMirGraph()->GetGvnIFieldId(mir);
132 uint16_t GetSFieldId(MIR* mir) { argument
133 return GetMirGraph()->GetGvnSFieldId(mir);
H A Dssa_transformation.cc508 for (MIR* mir = bb->first_mir_insn; mir != nullptr; mir = mir->next) {
509 if (mir->dalvikInsn.opcode != static_cast<Instruction::Code>(kMirOpPhi))
511 int ssa_reg = mir->ssa_rep->defs[0];
517 AllocateSSAUseData(mir, num_uses);
518 int* uses = mir->ssa_rep->uses;
520 mir->meta.phi_incoming = incoming;
/art/test/040-miranda/src/
H A DMain.java24 MirandaClass mir = new MirandaClass();
26 System.out.println(" inInterface: " + mir.inInterface());
27 System.out.println(" inInterface2: " + mir.inInterface2());
28 System.out.println(" inAbstract: " + mir.inAbstract());
31 MirandaAbstract mira = mir;
/art/test/126-miranda-multidex/src/
H A DMain.java24 MirandaClass mir = new MirandaClass();
26 System.out.println(" inInterface: " + mir.inInterface());
27 System.out.println(" inInterface2: " + mir.inInterface2());
28 System.out.println(" inAbstract: " + mir.inAbstract());
31 MirandaAbstract mira = mir;
/art/compiler/dex/quick/
H A Dmir_to_lir.cc242 bool Mir2Lir::GenSpecialIGet(MIR* mir, const InlineMethod& special) { argument
284 GenPrintLabel(mir);
310 bool Mir2Lir::GenSpecialIPut(MIR* mir, const InlineMethod& special) { argument
358 GenPrintLabel(mir);
374 bool Mir2Lir::GenSpecialIdentity(MIR* mir, const InlineMethod& special) { argument
384 GenPrintLabel(mir);
394 bool Mir2Lir::GenSpecialCase(BasicBlock* bb, MIR* mir, const InlineMethod& special) { argument
396 current_dalvik_offset_ = mir->offset;
405 DCHECK_EQ(mir->dalvikInsn.opcode, Instruction::RETURN_VOID);
409 return_mir = mir;
476 CompileDalvikInstruction(MIR* mir, BasicBlock* bb, LIR* label_list) argument
1136 HandleExtendedMethodMIR(BasicBlock* bb, MIR* mir) argument
1200 GenPrintLabel(MIR* mir) argument
1212 MIR* mir; local
1317 MIR* mir = bb->first_mir_insn; local
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H A Dgen_common.cc674 void Mir2Lir::GenFillArrayData(MIR* mir, DexOffset table_offset, RegLocation rl_src) { argument
676 const uint16_t* table = mir_graph_->GetTable(mir, table_offset);
681 uint32_t table_offset_from_start = mir->offset + static_cast<int32_t>(table_offset);
685 void Mir2Lir::GenSput(MIR* mir, RegLocation rl_src, OpSize size) { argument
686 const MirSFieldLoweringInfo& field_info = mir_graph_->GetSFieldLoweringInfo(mir);
687 DCHECK_EQ(SPutMemAccessType(mir->dalvikInsn.opcode), field_info.MemAccessType());
701 r_base = GenGetOtherTypeForSgetSput(field_info, mir->optimization_flags);
703 (mir->optimization_flags & MIR_CLASS_IS_INITIALIZED) == 0) {
727 MarkGCCard(mir->optimization_flags, rl_src.reg, r_base);
762 void Mir2Lir::GenSget(MIR* mir, RegLocatio argument
862 GenIGet(MIR* mir, int opt_flags, OpSize size, Primitive::Type type, RegLocation rl_dest, RegLocation rl_obj) argument
941 GenIPut(MIR* mir, int opt_flags, OpSize size, RegLocation rl_src, RegLocation rl_obj) argument
2159 GenSmallPackedSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) argument
2212 GenPackedSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) argument
2227 GenSmallSparseSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) argument
2244 GenSparseSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) argument
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H A Dcodegen_util.cc804 MIR* mir = entry.second; local
805 UpdateReferenceVRegs(mir, prev_mir, references);
807 prev_mir = mir;
824 MIR* mir = entry.second; local
825 UpdateReferenceVRegs(mir, prev_mir, references);
829 prev_mir = mir;
836 MIR* mir = entry.second; local
837 UpdateReferenceVRegs(mir, prev_mir, references);
845 prev_mir = mir;
1356 void Mir2Lir::GenMachineSpecificExtendedMethodMIR(BasicBlock* bb, MIR* mir) { argument
1397 UpdateReferenceVRegsLocal(MIR* mir, MIR* prev_mir, BitVector* references) argument
1419 UpdateReferenceVRegs(MIR* mir, MIR* prev_mir, BitVector* references) argument
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H A Dmir_to_lir.h233 MIR* switch_mir; // The switch mir.
780 virtual void AnalyzeMIR(RefCounts* core_counts, MIR* mir, uint32_t weight);
823 void GenFillArrayData(MIR* mir, DexOffset table_offset, RegLocation rl_src);
824 void GenSput(MIR* mir, RegLocation rl_src, OpSize size);
827 void GenSget(MIR* mir, RegLocation rl_dest, OpSize size, Primitive::Type type);
828 void GenIGet(MIR* mir, int opt_flags, OpSize size, Primitive::Type type,
830 void GenIPut(MIR* mir, int opt_flags, OpSize size,
1063 void CompileDalvikInstruction(MIR* mir, BasicBlock* bb, LIR* label_list);
1064 virtual void HandleExtendedMethodMIR(BasicBlock* bb, MIR* mir);
1342 virtual void GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, boo
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/art/compiler/dex/quick/x86/
H A Dtarget_x86.cc1437 void X86Mir2Lir::GenMachineSpecificExtendedMethodMIR(BasicBlock* bb, MIR* mir) { argument
1438 switch (static_cast<ExtendedMIROpcode>(mir->dalvikInsn.opcode)) {
1440 ReserveVectorRegisters(mir);
1443 ReturnVectorRegisters(mir);
1446 GenConst128(mir);
1449 GenMoveVector(mir);
1452 GenMultiplyVector(mir);
1455 GenAddVector(mir);
1458 GenSubtractVector(mir);
1461 GenShiftLeftVector(mir);
1501 ReserveVectorRegisters(MIR* mir) argument
1519 ReturnVectorRegisters(MIR* mir) argument
1536 GenConst128(MIR* mir) argument
1552 AppendOpcodeWithConst(X86OpCode opcode, int reg, MIR* mir) argument
1589 GenMoveVector(MIR* mir) argument
1705 GenMultiplyVector(MIR* mir) argument
1739 GenAddVector(MIR* mir) argument
1774 GenSubtractVector(MIR* mir) argument
1809 GenShiftByteVector(MIR* mir) argument
1853 GenShiftLeftVector(MIR* mir) argument
1882 GenSignedShiftRightVector(MIR* mir) argument
1910 GenUnsignedShiftRightVector(MIR* mir) argument
1939 GenAndVector(MIR* mir) argument
1948 GenOrVector(MIR* mir) argument
1957 GenXorVector(MIR* mir) argument
1984 GenAddReduceVector(MIR* mir) argument
2133 GenReduceVector(MIR* mir) argument
2251 GenSetVector(MIR* mir) argument
2326 GenPackedArrayGet(BasicBlock* bb, MIR* mir) argument
2331 GenPackedArrayPut(BasicBlock* bb, MIR* mir) argument
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H A Dcodegen_x86.h268 void GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, bool is_double) OVERRIDE;
269 void GenFusedLongCmpBranch(BasicBlock* bb, MIR* mir) OVERRIDE;
270 void GenSelect(BasicBlock* bb, MIR* mir) OVERRIDE;
280 void GenLargePackedSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) OVERRIDE;
281 void GenLargeSparseSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) OVERRIDE;
379 void AnalyzeMIR(RefCounts* core_counts, MIR* mir, uint32_t weight) OVERRIDE;
502 void GenShiftByteVector(MIR* mir);
507 void AppendOpcodeWithConst(X86OpCode opcode, int reg, MIR* mir);
547 * @param mir The extended MIR for reservation.
549 void ReserveVectorRegisters(MIR* mir);
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H A Dquick_assemble_x86_test.cc202 MIR* mir = cu_->mir_graph->NewMIR(); local
203 mir->dalvikInsn.opcode = opcode;
204 mir->dalvikInsn.vA = 0; // Destination and source.
205 mir->dalvikInsn.vB = 1; // Source.
208 mir->dalvikInsn.vC = (vector_type << 16) | vector_size; // Type size.
209 (m2l->*f)(mir);
H A Dutility_x86.cc957 void X86Mir2Lir::AnalyzeMIR(RefCounts* core_counts, MIR* mir, uint32_t weight) { argument
959 Mir2Lir::AnalyzeMIR(core_counts, mir, weight);
963 int opcode = mir->dalvikInsn.opcode;
982 uses_pc_rel_load = AnalyzeFPInstruction(opcode, mir);
987 if (mir_graph_->GetTable(mir, mir->dalvikInsn.vB)[1] > kSmallSwitchThreshold) {
1001 OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16);
1010 if (mir_graph_->GetMethodLoweringInfo(mir).IsIntrinsic()) {
1011 uses_pc_rel_load = AnalyzeInvokeStaticIntrinsic(mir);
1016 Mir2Lir::AnalyzeMIR(core_counts, mir, weigh
1026 AnalyzeFPInstruction(int opcode, MIR* mir) argument
1067 AnalyzeInvokeStaticIntrinsic(MIR* mir) argument
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/art/compiler/dex/quick/mips/
H A Dcall_mips.cc35 bool MipsMir2Lir::GenSpecialCase(BasicBlock* bb, MIR* mir, const InlineMethod& special) { argument
37 UNUSED(bb, mir, special);
72 void MipsMir2Lir::GenLargeSparseSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) { argument
73 const uint16_t* table = mir_graph_->GetTable(mir, table_offset);
77 tab_rec->switch_mir = mir;
145 void MipsMir2Lir::GenLargePackedSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) { argument
146 const uint16_t* table = mir_graph_->GetTable(mir, table_offset);
150 tab_rec->switch_mir = mir;
/art/compiler/dex/quick/arm/
H A Dtarget_arm.cc990 void ArmMir2Lir::GenMachineSpecificExtendedMethodMIR(BasicBlock* bb, MIR* mir) { argument
992 DCHECK(MIR::DecodedInstruction::IsPseudoMirOp(mir->dalvikInsn.opcode));
996 switch (static_cast<ExtendedMIROpcode>(mir->dalvikInsn.opcode)) {
998 rl_dest = mir_graph_->GetDest(mir);
999 rl_src[0] = mir_graph_->GetSrc(mir, 0);
1000 rl_src[1] = mir_graph_->GetSrc(mir, 1);
1001 rl_src[2]= mir_graph_->GetSrc(mir, 2);
1005 rl_dest = mir_graph_->GetDest(mir);
1006 rl_src[0] = mir_graph_->GetSrc(mir, 0);
1007 rl_src[1] = mir_graph_->GetSrc(mir,
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