Searched refs:Op1 (Results 1 - 25 of 89) sorted by relevance

1234

/external/llvm/lib/Target/XCore/Disassembler/
H A DXCoreDisassembler.cpp241 Decode2OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2) { argument
253 Op1 = (Op1High << 2) | fieldFromInstruction(Insn, 2, 2);
259 Decode3OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2, argument
268 Op1 = (Op1High << 2) | fieldFromInstruction(Insn, 4, 2);
347 unsigned Op1, Op2; local
348 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
352 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder);
360 unsigned Op1, Op2; local
361 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
365 Inst.addOperand(MCOperand::CreateImm(Op1));
373 unsigned Op1, Op2; local
386 unsigned Op1, Op2; local
400 unsigned Op1, Op2; local
413 unsigned Op1, Op2; local
426 unsigned Op1, Op2; local
511 unsigned Op1, Op2; local
525 unsigned Op1, Op2; local
539 unsigned Op1, Op2, Op3; local
552 unsigned Op1, Op2, Op3; local
565 unsigned Op1, Op2, Op3; local
578 unsigned Op1, Op2, Op3; local
591 unsigned Op1, Op2, Op3; local
605 unsigned Op1, Op2, Op3; local
620 unsigned Op1, Op2, Op3; local
634 unsigned Op1, Op2, Op3; local
648 unsigned Op1, Op2, Op3, Op4, Op5, Op6; local
682 unsigned Op1, Op2, Op3, Op4, Op5; local
702 unsigned Op1, Op2, Op3; local
721 unsigned Op1, Op2, Op3; local
[all...]
/external/llvm/lib/Transforms/InstCombine/
H A DInstCombineMulDivRem.cpp170 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
175 if (Value *V = SimplifyMulInst(Op0, Op1, DL, TLI, DT, AC))
182 if (match(Op1, m_AllOnes())) {
232 if (ConstantInt *CI = dyn_cast<ConstantInt>(Op1)) {
258 if (isa<Constant>(Op1)) {
273 Value *Mul = Builder->CreateMul(C1, Op1);
277 return BinaryOperator::CreateAdd(Builder->CreateMul(X, Op1), Mul);
283 if (Value *Op1v = dyn_castNegVal(Op1)) {
287 match(Op1, m_NSWSub(m_Value(), m_Value())))
296 Value *Op1C = Op1;
525 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
780 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
950 foldUDivPow2Cst(Value *Op0, Value *Op1, const BinaryOperator &I, InstCombiner &IC) argument
961 foldUDivNegCst(Value *Op0, Value *Op1, const BinaryOperator &I, InstCombiner &IC) argument
970 foldUDivShl(Value *Op0, Value *Op1, const BinaryOperator &I, InstCombiner &IC) argument
993 visitUDivOperand(Value *Op0, Value *Op1, const BinaryOperator &I, SmallVectorImpl<UDivFoldAction> &Actions, unsigned Depth = 0) argument
1033 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
1106 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
1204 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
1338 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
1370 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
1405 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
1480 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
[all...]
H A DInstCombineShifts.cpp26 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
34 if (SelectInst *SI = dyn_cast<SelectInst>(Op1))
38 if (Constant *CUI = dyn_cast<Constant>(Op1))
46 if (Op1->hasOneUse() && match(Op1, m_SRem(m_Value(A), m_Power2(B)))) {
50 Op1->getName());
321 Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, Constant *Op1, argument
326 if (ConstantDataVector *CV = dyn_cast<ConstantDataVector>(Op1))
328 else if (ConstantVector *CV = dyn_cast<ConstantVector>(Op1))
331 COp1 = dyn_cast<ConstantInt>(Op1);
[all...]
H A DInstCombineAddSub.cpp1506 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
1511 if (Value *V = SimplifySubInst(Op0, Op1, I.hasNoSignedWrap(),
1520 if (Value *V = dyn_castNegVal(Op1)) {
1523 if (const auto *BO = dyn_cast<BinaryOperator>(Op1)) {
1529 if (cast<Constant>(Op1)->isNotMinSignedValue() && I.hasNoSignedWrap())
1537 return BinaryOperator::CreateXor(Op0, Op1);
1541 return BinaryOperator::CreateNot(Op1);
1546 if (match(Op1, m_Not(m_Value(X))))
1550 if (SelectInst *SI = dyn_cast<SelectInst>(Op1))
1556 if (match(Op1, m_Ad
1693 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
[all...]
H A DInstCombineAndOrXor.cpp892 Value *Op0 = LHS->getOperand(0), *Op1 = LHS->getOperand(1); local
895 return getNewICmpValue(isSigned, Code, Op0, Op1, Builder);
1207 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
1212 if (Value *V = SimplifyAndInst(Op0, Op1, DL, TLI, DT, AC))
1227 if (ConstantInt *AndRHS = dyn_cast<ConstantInt>(Op1)) {
1334 if (Value *Op1NotVal = dyn_castNotVal(Op1))
1335 if (Op0->hasOneUse() && Op1->hasOneUse()) {
1345 match(Op1, m_Not(m_And(m_Value(C), m_Value(D)))) &&
1350 if (match(Op1, m_Or(m_Value(A), m_Value(B))) &&
1358 Value *tmpOp1 = Op1;
1794 Value *Op0 = LHS->getOperand(0), *Op1 = LHS->getOperand(1); local
2145 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
2532 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
2816 Value *Op0 = LHS->getOperand(0), *Op1 = LHS->getOperand(1); local
[all...]
H A DInstCombineCompares.cpp2491 /// \brief Check if the order of \p Op0 and \p Op1 as operand in an ICmpInst
2498 /// \return true if Op0 and Op1 should be swapped.
2500 const Value * Op1) {
2505 // Count every uses of both Op0 and Op1 in a subtract.
2525 if (BinOp->getOperand(Op1Idx) != Op1)
2650 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
2652 unsigned Op1Cplxity = getComplexity(Op1);
2659 swapMayExposeCSEOpportunities(Op0, Op1))) {
2661 std::swap(Op0, Op1);
2665 if (Value *V = SimplifyICmpInst(I.getPredicate(), Op0, Op1, D
2499 swapMayExposeCSEOpportunities(const Value * Op0, const Value * Op1) argument
3121 Value *Op1 = nullptr, *Op2 = nullptr; local
3944 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
[all...]
H A DInstructionCombining.cpp193 BinaryOperator *Op1 = dyn_cast<BinaryOperator>(I.getOperand(1)); local
226 if (Op1 && Op1->getOpcode() == Opcode) {
228 Value *B = Op1->getOperand(0);
229 Value *C = Op1->getOperand(1);
268 if (Op1 && Op1->getOpcode() == Opcode) {
270 Value *B = Op1->getOperand(0);
271 Value *C = Op1->getOperand(1);
289 if (Op0 && Op1
535 BinaryOperator *Op1 = dyn_cast<BinaryOperator>(RHS); local
669 Value *Op0 = SO, *Op1 = ConstOperand; local
1331 GetElementPtrInst *Op1 = dyn_cast<GetElementPtrInst>(PN->getOperand(0)); local
[all...]
/external/llvm/lib/Target/XCore/
H A DXCoreSelectionDAGInfo.h31 SDValue Op1, SDValue Op2,
/external/llvm/lib/Analysis/
H A DInstructionSimplify.cpp170 if (BinaryOperator *Op1 = dyn_cast<BinaryOperator>(RHS))
171 if (Op1->getOpcode() == OpcodeToExpand) {
173 Value *A = LHS, *B = Op1->getOperand(0), *C = Op1->getOperand(1);
207 BinaryOperator *Op1 = dyn_cast<BinaryOperator>(RHS); local
229 if (Op1 && Op1->getOpcode() == Opcode) {
231 Value *B = Op1->getOperand(0);
232 Value *C = Op1->getOperand(1);
271 if (Op1
530 SimplifyAddInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const Query &Q, unsigned MaxRecurse) argument
586 SimplifyAddInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const DataLayout &DL, const TargetLibraryInfo *TLI, const DominatorTree *DT, AssumptionCache *AC, const Instruction *CxtI) argument
662 SimplifySubInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const Query &Q, unsigned MaxRecurse) argument
779 SimplifySubInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const DataLayout &DL, const TargetLibraryInfo *TLI, const DominatorTree *DT, AssumptionCache *AC, const Instruction *CxtI) argument
789 SimplifyFAddInst(Value *Op0, Value *Op1, FastMathFlags FMF, const Query &Q, unsigned MaxRecurse) argument
831 SimplifyFSubInst(Value *Op0, Value *Op1, FastMathFlags FMF, const Query &Q, unsigned MaxRecurse) argument
867 SimplifyFMulInst(Value *Op0, Value *Op1, FastMathFlags FMF, const Query &Q, unsigned MaxRecurse) argument
895 SimplifyMulInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
958 SimplifyFAddInst(Value *Op0, Value *Op1, FastMathFlags FMF, const DataLayout &DL, const TargetLibraryInfo *TLI, const DominatorTree *DT, AssumptionCache *AC, const Instruction *CxtI) argument
967 SimplifyFSubInst(Value *Op0, Value *Op1, FastMathFlags FMF, const DataLayout &DL, const TargetLibraryInfo *TLI, const DominatorTree *DT, AssumptionCache *AC, const Instruction *CxtI) argument
976 SimplifyFMulInst(Value *Op0, Value *Op1, FastMathFlags FMF, const DataLayout &DL, const TargetLibraryInfo *TLI, const DominatorTree *DT, AssumptionCache *AC, const Instruction *CxtI) argument
985 SimplifyMulInst(Value *Op0, Value *Op1, const DataLayout &DL, const TargetLibraryInfo *TLI, const DominatorTree *DT, AssumptionCache *AC, const Instruction *CxtI) argument
995 SimplifyDiv(Instruction::BinaryOps Opcode, Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1081 SimplifySDivInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1089 SimplifySDivInst(Value *Op0, Value *Op1, const DataLayout &DL, const TargetLibraryInfo *TLI, const DominatorTree *DT, AssumptionCache *AC, const Instruction *CxtI) argument
1099 SimplifyUDivInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1107 SimplifyUDivInst(Value *Op0, Value *Op1, const DataLayout &DL, const TargetLibraryInfo *TLI, const DominatorTree *DT, AssumptionCache *AC, const Instruction *CxtI) argument
1115 SimplifyFDivInst(Value *Op0, Value *Op1, FastMathFlags FMF, const Query &Q, unsigned) argument
1134 SimplifyFDivInst(Value *Op0, Value *Op1, FastMathFlags FMF, const DataLayout &DL, const TargetLibraryInfo *TLI, const DominatorTree *DT, AssumptionCache *AC, const Instruction *CxtI) argument
1145 SimplifyRem(Instruction::BinaryOps Opcode, Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1206 SimplifySRemInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1214 SimplifySRemInst(Value *Op0, Value *Op1, const DataLayout &DL, const TargetLibraryInfo *TLI, const DominatorTree *DT, AssumptionCache *AC, const Instruction *CxtI) argument
1224 SimplifyURemInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1232 SimplifyURemInst(Value *Op0, Value *Op1, const DataLayout &DL, const TargetLibraryInfo *TLI, const DominatorTree *DT, AssumptionCache *AC, const Instruction *CxtI) argument
1240 SimplifyFRemInst(Value *Op0, Value *Op1, FastMathFlags FMF, const Query &, unsigned) argument
1259 SimplifyFRemInst(Value *Op0, Value *Op1, FastMathFlags FMF, const DataLayout &DL, const TargetLibraryInfo *TLI, const DominatorTree *DT, AssumptionCache *AC, const Instruction *CxtI) argument
1297 SimplifyShift(unsigned Opcode, Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1335 SimplifyRightShift(unsigned Opcode, Value *Op0, Value *Op1, bool isExact, const Query &Q, unsigned MaxRecurse) argument
1366 SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const Query &Q, unsigned MaxRecurse) argument
1383 SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const DataLayout &DL, const TargetLibraryInfo *TLI, const DominatorTree *DT, AssumptionCache *AC, const Instruction *CxtI) argument
1393 SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact, const Query &Q, unsigned MaxRecurse) argument
1407 SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact, const DataLayout &DL, const TargetLibraryInfo *TLI, const DominatorTree *DT, AssumptionCache *AC, const Instruction *CxtI) argument
1418 SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact, const Query &Q, unsigned MaxRecurse) argument
1441 SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact, const DataLayout &DL, const TargetLibraryInfo *TLI, const DominatorTree *DT, AssumptionCache *AC, const Instruction *CxtI) argument
1493 SimplifyAndOfICmps(ICmpInst *Op0, ICmpInst *Op1) argument
1545 SimplifyAndInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1642 SimplifyAndInst(Value *Op0, Value *Op1, const DataLayout &DL, const TargetLibraryInfo *TLI, const DominatorTree *DT, AssumptionCache *AC, const Instruction *CxtI) argument
1652 SimplifyOrOfICmps(ICmpInst *Op0, ICmpInst *Op1) argument
1704 SimplifyOrInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1830 SimplifyOrInst(Value *Op0, Value *Op1, const DataLayout &DL, const TargetLibraryInfo *TLI, const DominatorTree *DT, AssumptionCache *AC, const Instruction *CxtI) argument
1840 SimplifyXorInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1887 SimplifyXorInst(Value *Op0, Value *Op1, const DataLayout &DL, const TargetLibraryInfo *TLI, const DominatorTree *DT, AssumptionCache *AC, const Instruction *CxtI) argument
[all...]
H A DConstantFolding.cpp616 /// One of Op0/Op1 is a constant expression.
621 Constant *Op1,
634 computeKnownBits(Op1, KnownZero1, KnownOne1, DL);
640 // All the bits of Op1 that the 'and' could be masking are already zero.
641 return Op1;
658 if (IsConstantOffsetFromGlobal(Op1, GV2, Offs2, DL) && GV1 == GV2) {
1597 if (ConstantFP *Op1 = dyn_cast<ConstantFP>(Operands[0])) {
1600 double Op1V = getValueAsDouble(Op1);
1603 if (Op2->getType() != Op1->getType())
1611 APFloat V1 = Op1
620 SymbolicallyEvaluateBinop(unsigned Opc, Constant *Op0, Constant *Op1, const DataLayout &DL) argument
[all...]
/external/llvm/include/llvm/Target/
H A DTargetSelectionDAGInfo.h58 SDValue Op1, SDValue Op2,
75 SDValue Op1, SDValue Op2,
91 SDValue Op1, SDValue Op2,
105 SDValue Op1, SDValue Op2,
146 SDValue Op1, SDValue Op2,
56 EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument
73 EmitTargetCodeForMemmove(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument
89 EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, MachinePointerInfo DstPtrInfo) const argument
103 EmitTargetCodeForMemcmp(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, MachinePointerInfo Op1PtrInfo, MachinePointerInfo Op2PtrInfo) const argument
144 EmitTargetCodeForStrcmp(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, MachinePointerInfo Op1PtrInfo, MachinePointerInfo Op2PtrInfo) const argument
/external/llvm/lib/Target/ARM/
H A DARMSelectionDAGInfo.h54 SDValue Op1, SDValue Op2,
/external/llvm/lib/Target/BPF/MCTargetDesc/
H A DBPFMCCodeEmitter.cpp155 const MCOperand Op1 = MI.getOperand(1); local
156 assert(Op1.isReg() && "First operand is not register.");
157 Encoding = MRI.getEncodingValue(Op1.getReg());
/external/llvm/lib/Target/Hexagon/
H A DHexagonExpandPredSpillCode.cpp101 MachineOperand &Op1 = MI->getOperand(1); local
112 NewMI->addOperand(Op1);
144 MachineOperand &Op1 = MI->getOperand(1); local
154 NewMI->addOperand(Op1);
186 MachineOperand &Op1 = MI->getOperand(1); local
195 NewMI->addOperand(Op1);
223 MachineOperand &Op1 = MI->getOperand(1); local
233 NewMI->addOperand(Op1);
/external/llvm/lib/Target/Sparc/
H A DSparcISelDAGToDAG.cpp200 SDValue Op0, Op1; local
205 if (!SelectADDRrr(Op, Op0, Op1))
206 SelectADDRri(Op, Op0, Op1);
211 OutOps.push_back(Op1);
/external/llvm/lib/Transforms/Scalar/
H A DScalarizer.cpp74 Value *operator()(IRBuilder<> &Builder, Value *Op0, Value *Op1, argument
76 return Builder.CreateFCmp(FCI.getPredicate(), Op0, Op1, Name);
85 Value *operator()(IRBuilder<> &Builder, Value *Op0, Value *Op1, argument
87 return Builder.CreateICmp(ICI.getPredicate(), Op0, Op1, Name);
96 Value *operator()(IRBuilder<> &Builder, Value *Op0, Value *Op1, argument
98 return Builder.CreateBinOp(BO.getOpcode(), Op0, Op1, Name);
376 Scatterer Op1 = scatter(&I, I.getOperand(1)); local
378 assert(Op1.size() == NumElems && "Mismatched binary operation");
382 Res[Elem] = Split(Builder, Op0[Elem], Op1[Elem],
395 Scatterer Op1 local
543 Scatterer Op1 = scatter(&SVI, SVI.getOperand(1)); local
[all...]
H A DCorrelatedValuePropagation.cpp172 Constant *Op1 = dyn_cast<Constant>(C->getOperand(1));
173 if (!Op1) return false;
179 C->getOperand(0), Op1, *PI,
186 C->getOperand(0), Op1, *PI,
/external/llvm/include/llvm/CodeGen/
H A DFastISel.h342 bool Op0IsKill, unsigned Op1, bool Op1IsKill);
360 unsigned Op0, bool Op0IsKill, unsigned Op1,
396 bool Op0IsKill, unsigned Op1, bool Op1IsKill);
402 bool Op0IsKill, unsigned Op1, bool Op1IsKill,
427 bool Op0IsKill, unsigned Op1, bool Op1IsKill,
434 bool Op0IsKill, unsigned Op1, bool Op1IsKill,
H A DISDOpcodes.h849 CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger);
855 CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger);
H A DSelectionDAG.h627 SDValue getCALLSEQ_END(SDValue Chain, SDValue Op1, SDValue Op2, argument
632 Ops.push_back(Op1);
880 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2);
881 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
883 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
885 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
894 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT, SDValue Op1);
896 SDValue Op1, SDValue Op2);
898 SDValue Op1, SDValue Op2, SDValue Op3);
909 EVT VT2, SDValue Op1);
[all...]
/external/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp711 SDValue Op1 = Op.getOperand(1); local
715 && Op1.getValueType() == Op2.getValueType() && "Invalid type");
747 Op1 = DAG.getNode(ISD::BITCAST, DL, MaskTy, Op1);
754 Op1 = DAG.getNode(ISD::AND, DL, MaskTy, Op1, Mask);
756 SDValue Val = DAG.getNode(ISD::OR, DL, MaskTy, Op1, Op2);
888 SDValue Op1 = Op.getOperand(1); local
903 TLI.getBooleanContents(Op1.getValueType()) !=
910 if (VT.getSizeInBits() != Op1
[all...]
H A DFastISel.cpp405 unsigned Op1 = getRegForValue(I->getOperand(1)); local
406 if (!Op1)
411 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, Op1IsKill,
465 unsigned Op1 = getRegForValue(I->getOperand(1)); local
466 if (!Op1) // Unhandled operand. Halt "fast" selection and bail.
472 ISDOpcode, Op0, Op0IsKill, Op1, Op1IsKill);
1618 bool /*Op0IsKill*/, unsigned /*Op1*/,
1644 bool /*Op0IsKill*/, unsigned /*Op1*/,
1742 bool Op0IsKill, unsigned Op1,
1748 Op1
1740 fastEmitInst_rr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) argument
1764 fastEmitInst_rrr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, unsigned Op2, bool Op2IsKill) argument
1861 fastEmitInst_rri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm) argument
1887 fastEmitInst_rrii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm1, uint64_t Imm2) argument
[all...]
/external/llvm/lib/Target/X86/
H A DX86FloatingPoint.cpp1151 unsigned Op1 = getFPReg(MI->getOperand(NumOperands-1)); local
1153 bool KillsOp1 = MI->killsRegister(X86::FP0+Op1);
1160 if (Op0 != TOS && Op1 != TOS) { // No operand at TOS?
1168 moveToTop(Op1, I);
1169 TOS = Op1;
1191 assert((TOS == Op0 || TOS == Op1) && (KillsOp0 || KillsOp1) &&
1198 bool updateST0 = (TOS == Op0 && !KillsOp1) || (TOS == Op1 && !KillsOp0);
1216 unsigned NotTOS = (TOS == Op0) ? Op1 : Op0;
1224 if (KillsOp0 && KillsOp1 && Op0 != Op1) {
1249 unsigned Op1 local
1275 unsigned Op1 = getFPReg(MI->getOperand(2)); local
[all...]
/external/llvm/lib/Target/SystemZ/
H A DSystemZISelDAGToDAG.cpp398 // The base or index of AM is equivalent to Op0 + Op1, where IsBase selects
399 // between the base and index. Try to fold Op1 into AM's displacement.
401 SDValue Op0, uint64_t Op1) {
403 int64_t TestDisp = AM.Disp + Op1;
425 SDValue Op1 = N.getOperand(1); local
428 unsigned Op1Code = Op1->getOpcode();
431 return expandAdjDynAlloc(AM, IsBase, Op1);
436 return expandDisp(AM, IsBase, Op1,
440 cast<ConstantSDNode>(Op1)->getSExtValue());
442 if (IsBase && expandIndex(AM, Op0, Op1))
400 expandDisp(SystemZAddressingMode &AM, bool IsBase, SDValue Op0, uint64_t Op1) argument
1103 SDValue Op1 = Node->getOperand(1); local
[all...]
/external/llvm/include/llvm/Transforms/Utils/
H A DBuildLibCalls.h85 /// (e.g. 'fmin'). This function is known to take type matching 'Op1' and
86 /// 'Op2' and return one value with the same type. If 'Op1/Op2' are long
87 /// double, 'l' is added as the suffix of name, if 'Op1/Op2' are float, we
89 Value *EmitBinaryFloatFnCall(Value *Op1, Value *Op2, StringRef Name,

Completed in 3863 milliseconds

1234