Searched refs:bitsLT (Results 1 - 25 of 40) sorted by relevance

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/external/llvm/include/llvm/CodeGen/
H A DValueTypes.h211 /// bitsLT - Return true if this has less bits than VT.
212 bool bitsLT(EVT VT) const { function in struct:llvm::EVT
H A DMachineValueType.h542 bool bitsLT(MVT VT) const { function
/external/llvm/lib/Target/ARM/
H A DARMSelectionDAGInfo.cpp93 else if (Src.getValueType().bitsLT(MVT::i32))
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
H A DValueTypes.h547 /// bitsLT - Return true if this has less bits than VT.
548 bool bitsLT(EVT VT) const { function in struct:llvm::EVT
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
H A DFastISel.cpp273 if (IdxVT.bitsLT(PtrVT)) {
627 else if (SrcVT.bitsLT(MVT::i32))
975 if (DstVT.bitsLT(SrcVT))
H A DLegalizeTypesGeneric.cpp189 if (Idx.getValueType().bitsLT(TLI.getPointerTy()))
H A DTargetLowering.cpp693 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16.
990 if (DestVT.bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16.
1027 if (VT.bitsLT(MinVT))
2216 else if (Op0.getValueType().bitsLT(VT))
H A DDAGCombiner.cpp4211 if (Op.getValueType().bitsLT(VT)) {
4229 if (X.getValueType().bitsLT(VT)) {
4459 if (X.getValueType().bitsLT(VT)) {
4752 EVT.bitsLT(cast<VTSDNode>(N0.getOperand(1))->getVT())) {
4861 if (N0.getOperand(0).getValueType().bitsLT(VT))
5601 if (VT.bitsLT(In.getValueType()))
7610 if (N2.getValueType().bitsLT(SCC.getValueType()))
H A DSelectionDAG.cpp2498 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2514 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2531 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2568 .bitsLT(VT.getScalarType()))
3644 if (VT.bitsLT(LargestVT)) {
4177 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4335 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
H A DLegalizeDAG.cpp1859 if (EltVT.bitsLT(Node->getOperand(i).getValueType().getScalarType())) {
2506 } else if (DestVT.bitsLT(MVT::f64)) {
H A DLegalizeVectorTypes.cpp2531 assert(StVT.bitsLT(ValOp.getValueType()));
/external/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp1154 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16.
1557 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16.
1592 if (VT.bitsLT(MinVT))
/external/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeTypesGeneric.cpp231 assert(OldEltVT.bitsLT(OldVT) && "Result type smaller then element type!");
H A DSelectionDAG.cpp2872 SVT = (SVT.bitsLT(Op.getValueType()) ? Op.getValueType() : SVT);
3063 assert(Operand.getValueType().bitsLT(VT) &&
3076 assert(Operand.getValueType().bitsLT(VT) &&
3092 assert(Operand.getValueType().bitsLT(VT) &&
3109 assert(Operand.getValueType().bitsLT(VT) &&
3142 .bitsLT(VT.getScalarType()))
3412 if (LegalSVT.bitsLT(VT.getScalarType()))
4572 if (VT.bitsLT(LargestVT)) {
5094 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
5272 assert(SVT.getScalarType().bitsLT(V
[all...]
H A DLegalizeDAG.cpp1324 if (EltVT.bitsLT(Node->getOperand(i).getValueType().getScalarType())) {
2321 } else if (DestVT.bitsLT(MVT::f64)) {
3008 if (NewEltVT.bitsLT(EltVT)) {
4255 assert(NewEltVT.bitsLT(EltVT) && "not handled");
4288 assert(NewEltVT.bitsLT(EltVT) && "not handled");
4335 assert(NewEltVT.bitsLT(EltVT) && "not handled");
H A DFastISel.cpp328 if (IdxVT.bitsLT(PtrVT)) {
1657 if (DstVT.bitsLT(SrcVT))
H A DDAGCombiner.cpp6304 if (VT.bitsLT(Op.getValueType()))
6344 if (SrcVT.bitsLT(VT)) {
6356 if (SrcVT.bitsLT(VT)) {
6376 if (X.getValueType().bitsLT(VT)) {
6618 if (X.getValueType().bitsLT(VT)) {
6961 EVT.bitsLT(cast<VTSDNode>(N0.getOperand(1))->getVT()))
7094 if (N0.getOperand(0).getValueType().bitsLT(VT))
9230 if (VT.bitsLT(In.getValueType()))
12315 if (ResultVT.bitsLT(VecEltVT))
12441 if (NVT.bitsLT(LV
[all...]
H A DLegalizeVectorTypes.cpp1486 if (N->getValueType(0).bitsLT(N->getOperand(0)->getValueType(0)))
1493 if (N->getValueType(0).bitsLT(N->getOperand(0)->getValueType(0)))
3791 assert(StVT.bitsLT(ValOp.getValueType()));
/external/swiftshader/third_party/LLVM/lib/Transforms/Scalar/
H A DCodeGenPrepare.cpp376 if (SrcVT.bitsLT(DstVT)) return false;
/external/swiftshader/third_party/LLVM/include/llvm/Target/
H A DTargetLowering.h1304 return VT.bitsLT(MinVT) ? MinVT : VT;
/external/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp1426 if (MemVT.bitsLT(MVT::i32))
1572 ExtType != ISD::NON_EXTLOAD && MemVT.bitsLT(MVT::i32)) {
1827 if (VT.bitsLT(MVT::i32))
H A DSIISelLowering.cpp465 if (VT.bitsLT(MVT::i32))
/external/llvm/include/llvm/Target/
H A DTargetLowering.h2704 return VT.bitsLT(MinVT) ? MinVT : VT;
/external/swiftshader/third_party/LLVM/lib/Target/X86/
H A DX86FastISel.cpp1957 if (DstVT.bitsLT(SrcVT))
/external/llvm/lib/Target/X86/
H A DX86FastISel.cpp3443 if (DstVT.bitsLT(SrcVT))

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