Searched defs:rt2 (Results 1 - 17 of 17) sorted by relevance

/external/e2fsprogs/lib/ss/
H A Drequest_tbl.c55 register ssrt **rt1, **rt2; local
60 for (rt2 = rt1; *rt1; rt1++) {
62 *rt2++ = *rt1;
66 *rt2 = (ssrt *)NULL;
/external/libnl/lib/route/
H A Dneightbl.c258 char rt[32], rt2[32]; local
263 nl_msec2str(pa->ntp_retrans_time, rt2, sizeof(rt2)));
/external/vixl/src/aarch32/
H A Dmacro-assembler-aarch32.cc1677 Register rt2,
1686 temps.Include(rt, rt2);
1689 ldrd(rt, rt2, MemOperandComputationHelper(cond, scratch, location, mask));
1693 Assembler::Delegate(type, instruction, cond, rt, rt2, location);
1898 Register rt2,
1919 if (((rt.GetCode() + 1) % kNumberOfRegisters) != rt2.GetCode()) {
1950 if (!rt2.Is(rn)) temps.Include(rt2);
1965 rt2,
1975 if (!rt2
1673 Delegate(InstructionType type, InstructionCondRRL instruction, Condition cond, Register rt, Register rt2, Location* location) argument
1894 Delegate(InstructionType type, InstructionCondRRMop instruction, Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
[all...]
H A Dassembler-aarch32.cc4676 Register rt2,
4685 ((!rt.IsPC() && !rt2.IsPC() && !rn.IsPC()) || AllowUnpredictable())) {
4686 EmitT32_32(0xe8d000ffU | (rt.GetCode() << 12) | (rt2.GetCode() << 8) |
4693 if ((((rt.GetCode() + 1) % kNumberOfRegisters) == rt2.GetCode()) &&
4695 ((((rt.GetCode() & 1) == 0) && !rt2.IsPC() && !rn.IsPC()) ||
4703 Delegate(kLdaexd, &Assembler::ldaexd, cond, rt, rt2, operand);
5564 Register rt2,
5575 ((!rt.IsPC() && !rt2.IsPC()) || AllowUnpredictable())) {
5578 EmitT32_32(0xe9500000U | (rt.GetCode() << 12) | (rt2.GetCode() << 8) |
5586 ((!rt.IsPC() && !rt2
4674 ldaexd(Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
5562 ldrd(Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
5714 ldrd(Condition cond, Register rt, Register rt2, Location* location) argument
5787 ldrd_info(Condition cond, Register rt, Register rt2, Location* location, const struct ReferenceInfo** info) argument
5867 ldrexd(Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
11008 stlexd(Condition cond, Register rd, Register rt, Register rt2, const MemOperand& operand) argument
11656 strd(Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
11844 strexd(Condition cond, Register rd, Register rt, Register rt2, const MemOperand& operand) argument
20780 vmov(Condition cond, Register rt, Register rt2, DRegister rm) argument
20803 vmov(Condition cond, DRegister rm, Register rt, Register rt2) argument
20826 vmov( Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1) argument
20852 vmov( Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2) argument
[all...]
H A Dassembler-aarch32.h299 Register rt2,
319 Register rt2,
359 Register rt2,
549 Register rt2,
554 Register rt2);
556 Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1);
558 Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2);
849 Register /*rt2*/,
909 Register /*rt2*/,
1045 Register /*rt2*/,
2258 ldaexd(Register rt, Register rt2, const MemOperand& operand) argument
2413 ldrd(Register rt, Register rt2, const MemOperand& operand) argument
2423 ldrd(Register rt, Register rt2, Location* location) argument
2439 ldrexd(Register rt, Register rt2, const MemOperand& operand) argument
3254 stlexd(Register rd, Register rt, Register rt2, const MemOperand& operand) argument
3407 strd(Register rt, Register rt2, const MemOperand& operand) argument
3432 strexd(Register rd, Register rt, Register rt2, const MemOperand& operand) argument
4885 vmov(Register rt, Register rt2, DRegister rm) argument
4888 vmov(DRegister rm, Register rt, Register rt2) argument
4892 vmov(Register rt, Register rt2, SRegister rm, SRegister rm1) argument
4898 vmov(SRegister rm, SRegister rm1, Register rt, Register rt2) argument
[all...]
H A Ddisasm-aarch32.cc1595 Register rt2,
1599 << ", " << rt2 << ", "
1730 Register rt2,
1734 << ", " << rt2 << ", "
1740 Register rt2,
1744 << ", " << rt2 << ", "
1766 Register rt2,
1770 << ", " << rt2 << ", "
2976 Register rt2,
2980 << ", " << rt << ", " << rt2 << ", "
1593 ldaexd(Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
1728 ldrd(Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
1738 ldrd(Condition cond, Register rt, Register rt2, Location* location) argument
1764 ldrexd(Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
2973 stlexd(Condition cond, Register rd, Register rt, Register rt2, const MemOperand& operand) argument
3095 strd(Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
3123 strexd(Condition cond, Register rd, Register rt, Register rt2, const MemOperand& operand) argument
5243 vmov(Condition cond, Register rt, Register rt2, DRegister rm) argument
5252 vmov(Condition cond, DRegister rm, Register rt, Register rt2) argument
5258 << ", " << rt << ", " << rt2; local
5261 vmov( Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1) argument
5268 vmov( Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2) argument
5272 << ", " << rm1 << ", " << rt << ", " << rt2; local
10051 unsigned rt2 = (instr >> 8) & 0xf; local
10149 unsigned rt2 = (instr >> 8) & 0xf; local
10175 unsigned rt2 = (instr >> 8) & 0xf; local
10258 unsigned rt2 = (instr >> 8) & 0xf; local
10277 unsigned rt2 = (instr >> 8) & 0xf; local
10479 unsigned rt2 = (instr >> 8) & 0xf; local
10572 unsigned rt2 = (instr >> 8) & 0xf; local
10603 unsigned rt2 = (instr >> 8) & 0xf; local
10633 unsigned rt2 = (instr >> 8) & 0xf; local
10661 unsigned rt2 = (instr >> 8) & 0xf; local
10691 unsigned rt2 = (instr >> 8) & 0xf; local
10719 unsigned rt2 = (instr >> 8) & 0xf; local
10749 unsigned rt2 = (instr >> 8) & 0xf; local
22643 unsigned rt2 = (instr >> 16) & 0xf; local
22660 unsigned rt2 = (instr >> 16) & 0xf; local
22791 unsigned rt2 = (instr >> 16) & 0xf; local
22808 unsigned rt2 = (instr >> 16) & 0xf; local
65436 unsigned rt2 = (instr >> 16) & 0xf; local
65458 unsigned rt2 = (instr >> 16) & 0xf; local
65611 unsigned rt2 = (instr >> 16) & 0xf; local
65633 unsigned rt2 = (instr >> 16) & 0xf; local
[all...]
H A Dmacro-assembler-aarch32.h617 void Ldrd(Condition cond, Register rt, Register rt2, RawLiteral* literal) { argument
619 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
626 bool can_encode = ldrd_info(cond, rt, rt2, literal, &info);
634 ldrd(cond, rt, rt2, literal);
637 void Ldrd(Register rt, Register rt2, RawLiteral* literal) { argument
638 Ldrd(al, rt, rt2, literal);
776 // Generic Ldrd(rt, rt2, data)
777 void Ldrd(Condition cond, Register rt, Register rt2, uint64_t v) { argument
779 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
784 Ldrd(cond, rt, rt2, litera
787 Ldrd(Register rt, Register rt2, T v) argument
1900 Ldaexd(Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
1913 Ldaexd(Register rt, Register rt2, const MemOperand& operand) argument
2120 Ldrd(Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
2133 Ldrd(Register rt, Register rt2, const MemOperand& operand) argument
2162 Ldrexd(Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
2175 Ldrexd(Register rt, Register rt2, const MemOperand& operand) argument
4223 Stlexd(Condition cond, Register rd, Register rt, Register rt2, const MemOperand& operand) argument
4238 Stlexd(Register rd, Register rt, Register rt2, const MemOperand& operand) argument
4450 Strd(Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
4463 Strd(Register rt, Register rt2, const MemOperand& operand) argument
4501 Strexd(Condition cond, Register rd, Register rt, Register rt2, const MemOperand& operand) argument
4516 Strexd(Register rd, Register rt, Register rt2, const MemOperand& operand) argument
7744 Vmov(Condition cond, Register rt, Register rt2, DRegister rm) argument
7754 Vmov(Register rt, Register rt2, DRegister rm) argument
7756 Vmov(Condition cond, DRegister rm, Register rt, Register rt2) argument
7766 Vmov(DRegister rm, Register rt, Register rt2) argument
7768 Vmov( Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1) argument
7780 Vmov(Register rt, Register rt2, SRegister rm, SRegister rm1) argument
7784 Vmov( Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2) argument
7796 Vmov(SRegister rm, SRegister rm1, Register rt, Register rt2) argument
[all...]
/external/v8/src/arm64/
H A Dassembler-arm64-inl.h896 const CPURegister& rt2) {
897 DCHECK(AreSameSizeAndType(rt, rt2));
898 USE(rt2);
920 const CPURegister& rt2) {
921 DCHECK(AreSameSizeAndType(rt, rt2));
922 USE(rt2);
895 LoadPairOpFor(const CPURegister& rt, const CPURegister& rt2) argument
919 StorePairOpFor(const CPURegister& rt, const CPURegister& rt2) argument
H A Dassembler-arm64.cc1578 const CPURegister& rt2,
1580 LoadStorePair(rt, rt2, src, LoadPairOpFor(rt, rt2));
1585 const CPURegister& rt2,
1587 LoadStorePair(rt, rt2, dst, StorePairOpFor(rt, rt2));
1592 const Register& rt2,
1595 LoadStorePair(rt, rt2, src, LDPSW_x);
1600 const CPURegister& rt2,
1603 // 'rt' and 'rt2' ca
1577 ldp(const CPURegister& rt, const CPURegister& rt2, const MemOperand& src) argument
1584 stp(const CPURegister& rt, const CPURegister& rt2, const MemOperand& dst) argument
1591 ldpsw(const Register& rt, const Register& rt2, const MemOperand& src) argument
1599 LoadStorePair(const CPURegister& rt, const CPURegister& rt2, const MemOperand& addr, LoadStorePairOp op) argument
[all...]
H A Dmacro-assembler-arm64.cc594 const CPURegister& rt2,
607 LoadStorePair(rt, rt2, addr, op);
614 LoadStorePair(rt, rt2, MemOperand(temp), op);
616 LoadStorePair(rt, rt2, MemOperand(base), op);
621 LoadStorePair(rt, rt2, MemOperand(base), op);
593 LoadStorePairMacro(const CPURegister& rt, const CPURegister& rt2, const MemOperand& addr, LoadStorePairOp op) argument
/external/vixl/src/aarch64/
H A Dassembler-aarch64.cc947 const CPURegister& rt2,
949 LoadStorePair(rt, rt2, src, LoadPairOpFor(rt, rt2));
954 const CPURegister& rt2,
956 LoadStorePair(rt, rt2, dst, StorePairOpFor(rt, rt2));
969 const CPURegister& rt2,
972 // 'rt' and 'rt2' can only be aliased for stores.
973 VIXL_ASSERT(((op & LoadStorePairLBit) == 0) || !rt.Is(rt2));
974 VIXL_ASSERT(AreSameSizeAndType(rt, rt2));
946 ldp(const CPURegister& rt, const CPURegister& rt2, const MemOperand& src) argument
953 stp(const CPURegister& rt, const CPURegister& rt2, const MemOperand& dst) argument
968 LoadStorePair(const CPURegister& rt, const CPURegister& rt2, const MemOperand& addr, LoadStorePairOp op) argument
997 ldnp(const CPURegister& rt, const CPURegister& rt2, const MemOperand& src) argument
1004 stnp(const CPURegister& rt, const CPURegister& rt2, const MemOperand& dst) argument
1011 LoadStorePairNonTemporal(const CPURegister& rt, const CPURegister& rt2, const MemOperand& addr, LoadStorePairNonTemporalOp op) argument
1267 stxp(const Register& rs, const Register& rt, const Register& rt2, const MemOperand& dst) argument
1278 ldxp(const Register& rt, const Register& rt2, const MemOperand& src) argument
1332 stlxp(const Register& rs, const Register& rt, const Register& rt2, const MemOperand& dst) argument
1343 ldaxp(const Register& rt, const Register& rt2, const MemOperand& src) argument
[all...]
H A Dassembler-aarch64.h1071 const CPURegister& rt2,
1076 const CPURegister& rt2,
1084 const CPURegister& rt2,
1089 const CPURegister& rt2,
1125 const Register& rt2,
1129 void ldxp(const Register& rt, const Register& rt2, const MemOperand& src);
1152 const Register& rt2,
1156 void ldaxp(const Register& rt, const Register& rt2, const MemOperand& src);
2615 static Instr Rt2(CPURegister rt2) { argument
2616 VIXL_ASSERT(rt2
[all...]
H A Dmacro-assembler-aarch64.cc1885 const CPURegister& rt2,
1903 LoadStorePair(rt, rt2, addr, op);
1910 LoadStorePair(rt, rt2, MemOperand(temp), op);
1912 LoadStorePair(rt, rt2, MemOperand(base), op);
1917 LoadStorePair(rt, rt2, MemOperand(base), op);
1884 LoadStorePairMacro(const CPURegister& rt, const CPURegister& rt2, const MemOperand& addr, LoadStorePairOp op) argument
H A Dsimulator-aarch64.cc1431 unsigned rt2 = instr->GetRt2(); local
1440 // 'rt' and 'rt2' can only be aliased for stores.
1441 VIXL_ASSERT(((op & LoadStorePairLBit) == 0) || (rt != rt2));
1448 WriteWRegister(rt2, Memory::Read<uint32_t>(address2), NoRegLog);
1453 WriteSRegister(rt2, Memory::Read<float>(address2), NoRegLog);
1458 WriteXRegister(rt2, Memory::Read<uint64_t>(address2), NoRegLog);
1463 WriteDRegister(rt2, Memory::Read<double>(address2), NoRegLog);
1468 WriteQRegister(rt2, Memory::Read<qreg_t>(address2), NoRegLog);
1473 WriteXRegister(rt2, Memory::Read<int32_t>(address2), NoRegLog);
1478 Memory::Write<uint32_t>(address2, ReadWRegister(rt2));
1554 unsigned rt2 = instr->GetRt2(); local
4180 int rt2 = (rt + 1) % kNumberOfVRegisters; local
4189 int rt2 = (rt + 1) % kNumberOfVRegisters; local
4199 int rt2 = (rt + 1) % kNumberOfVRegisters; local
4225 int rt2 = (rt + 1) % kNumberOfVRegisters; local
[all...]
H A Dmacro-assembler-aarch64.h59 V(Ldp, CPURegister&, rt, rt2, LoadPairOpFor(rt, rt2)) \
60 V(Stp, CPURegister&, rt, rt2, StorePairOpFor(rt, rt2)) \
61 V(Ldpsw, CPURegister&, rt, rt2, LDPSW_x)
781 const CPURegister& rt2,
1472 void Ldaxp(const Register& rt, const Register& rt2, const MemOperand& src) { argument
1474 VIXL_ASSERT(!rt.Aliases(rt2));
1476 ldaxp(rt, rt2, src);
1494 const CPURegister& rt2,
1493 Ldnp(const CPURegister& rt, const CPURegister& rt2, const MemOperand& src) argument
1581 Ldxp(const Register& rt, const Register& rt2, const MemOperand& src) argument
1877 Stlxp(const Register& rs, const Register& rt, const Register& rt2, const MemOperand& dst) argument
1909 Stnp(const CPURegister& rt, const CPURegister& rt2, const MemOperand& dst) argument
1916 Stxp(const Register& rs, const Register& rt, const Register& rt2, const MemOperand& dst) argument
[all...]
/external/webrtc/webrtc/p2p/base/
H A Dp2ptransportchannel_unittest.cc184 const std::string& rt2, const std::string& rp2, int wait)
186 local_type2(lt2), local_proto2(lp2), remote_type2(rt2),
181 Result(const std::string& lt, const std::string& lp, const std::string& rt, const std::string& rp, const std::string& lt2, const std::string& lp2, const std::string& rt2, const std::string& rp2, int wait) argument
/external/annotation-tools/annotation-file-utilities/
H A Dannotation-file-utilities.jarMETA-INF/ META-INF/MANIFEST.MF annotations/ annotations/el/ annotations/field/ annotations/io/ annotations/io/classfile/ ...

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