Searched refs:stencil (Results 176 - 200 of 310) sorted by relevance

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/external/deqp/framework/common/
H A DtcuTextureUtil.hpp117 void clearStencil (const PixelBufferAccess& access, int stencil);
157 * \brief Depth-stencil utilities
163 //! for combined depth stencil accesses and for sampler set to sample stencil returns
164 //! stencil access. Identity for non-combined formats.
/external/kernel-headers/original/uapi/drm/
H A Dmga_drm.h144 unsigned int stencil; member in struct:__anon9237
/external/libdrm/include/drm/
H A Dmga_drm.h140 unsigned int stencil; member in struct:__anon11252
/external/mesa3d/src/gallium/drivers/freedreno/
H A Dfreedreno_context.h269 const union pipe_color_union *color, double depth, unsigned stencil);
/external/mesa3d/src/gallium/drivers/ilo/
H A Dilo_state.h292 struct ilo_state_cc_stencil_info stencil; member in struct:ilo_dsa_state
H A Dilo_blitter_blt.c252 /* no W-tiling nor separate stencil support */
312 /* no W-tiling nor separate stencil support */
512 double depth, unsigned stencil,
565 val = util_pack_z_stencil(zs->format, depth, stencil);
509 ilo_blitter_blt_clear_zs(struct ilo_blitter *blitter, struct pipe_surface *zs, unsigned clear_flags, double depth, unsigned stencil, unsigned x, unsigned y, unsigned width, unsigned height) argument
/external/mesa3d/src/gallium/drivers/nouveau/nv50/
H A Dnv50_context.h253 double depth, unsigned stencil);
/external/mesa3d/src/gallium/drivers/virgl/
H A Dvirgl_encode.h107 double depth, unsigned stencil);
/external/mesa3d/src/gallium/include/pipe/
H A Dp_state.h278 unsigned enabled:1; /**< stencil[0]: stencil enabled, stencil[1]: two-side enabled */
299 struct pipe_stencil_state stencil[2]; /**< [0] = front, [1] = back */ member in struct:pipe_depth_stencil_alpha_state
360 struct pipe_surface *zsbuf; /**< Z/stencil buffer */
399 * depth stencil attachment point.
/external/mesa3d/src/gallium/tools/trace/
H A Ddump_state.py317 if not state.stencil[i].enabled:
318 del state.stencil[i].func
651 def clear(self, buffers, color, depth, stencil):
657 def clear_depth_stencil(self, dst, clear_flags, depth, stencil, dstx, dsty, width, height):
/external/mesa3d/src/gallium/auxiliary/vl/
H A Dvl_compositor.c536 dsa.stencil[i].enabled = 0;
537 dsa.stencil[i].func = PIPE_FUNC_ALWAYS;
538 dsa.stencil[i].fail_op = PIPE_STENCIL_OP_KEEP;
539 dsa.stencil[i].zpass_op = PIPE_STENCIL_OP_KEEP;
540 dsa.stencil[i].zfail_op = PIPE_STENCIL_OP_KEEP;
541 dsa.stencil[i].valuemask = 0;
542 dsa.stencil[i].writemask = 0;
/external/mesa3d/src/gallium/drivers/ddebug/
H A Ddd_draw.c431 DUMP_M(hex, info, stencil);
1264 unsigned stencil)
1274 call.info.clear.stencil = stencil;
1277 pipe->clear(pipe, buffers, color, depth, stencil);
1304 double depth, unsigned stencil, unsigned dstx,
1315 pipe->clear_depth_stencil(pipe, dst, clear_flags, depth, stencil,
1262 dd_context_clear(struct pipe_context *_pipe, unsigned buffers, const union pipe_color_union *color, double depth, unsigned stencil) argument
1302 dd_context_clear_depth_stencil(struct pipe_context *_pipe, struct pipe_surface *dst, unsigned clear_flags, double depth, unsigned stencil, unsigned dstx, unsigned dsty, unsigned width, unsigned height, bool render_condition_enabled) argument
/external/mesa3d/src/gallium/drivers/llvmpipe/
H A Dlp_setup.c432 * both color and depth-stencil are being cleared when there's
473 unsigned stencil,
487 zsvalue = util_pack64_z_stencil(format, depth, stencil);
508 * both color and depth-stencil are being cleared when there's
540 unsigned stencil,
553 if (!lp_setup_try_clear_zs(setup, depth, stencil, flagszs)) {
556 if (!lp_setup_try_clear_zs(setup, depth, stencil, flagszs))
471 lp_setup_try_clear_zs(struct lp_setup_context *setup, double depth, unsigned stencil, unsigned flags) argument
537 lp_setup_clear( struct lp_setup_context *setup, const union pipe_color_union *color, double depth, unsigned stencil, unsigned flags ) argument
/external/mesa3d/src/gallium/drivers/r600/
H A Devergreen_state.c413 dsa->valuemask[0] = state->stencil[0].valuemask;
414 dsa->valuemask[1] = state->stencil[1].valuemask;
415 dsa->writemask[0] = state->stencil[0].writemask;
416 dsa->writemask[1] = state->stencil[1].writemask;
423 /* stencil */
424 if (state->stencil[0].enabled) {
426 db_depth_control |= S_028800_STENCILFUNC(state->stencil[0].func); /* translates straight */
427 db_depth_control |= S_028800_STENCILFAIL(r600_translate_stencil_op(state->stencil[0].fail_op));
428 db_depth_control |= S_028800_STENCILZPASS(r600_translate_stencil_op(state->stencil[0].zpass_op));
429 db_depth_control |= S_028800_STENCILZFAIL(r600_translate_stencil_op(state->stencil[
[all...]
/external/mesa3d/src/gallium/drivers/radeonsi/
H A Dsi_state.c934 * infeered state between dsa and stencil ref
990 R600_ERR("Unknown stencil op %d", s_op);
1009 dsa->stencil_ref.valuemask[0] = state->stencil[0].valuemask;
1010 dsa->stencil_ref.valuemask[1] = state->stencil[1].valuemask;
1011 dsa->stencil_ref.writemask[0] = state->stencil[0].writemask;
1012 dsa->stencil_ref.writemask[1] = state->stencil[1].writemask;
1019 /* stencil */
1020 if (state->stencil[0].enabled) {
1022 db_depth_control |= S_028800_STENCILFUNC(state->stencil[0].func);
1023 db_stencil_control |= S_02842C_STENCILFAIL(si_translate_stencil_op(state->stencil[
[all...]
/external/deqp/external/vulkancts/framework/vulkan/
H A DvkTypeUtil.inl333 inline VkClearDepthStencilValue makeClearDepthStencilValue (float depth, deUint32 stencil)
337 res.stencil = stencil;
/external/mesa3d/src/gallium/drivers/trace/
H A Dtr_context.c1265 unsigned stencil)
1281 trace_dump_arg(uint, stencil);
1283 pipe->clear(pipe, buffers, color, depth, stencil);
1324 unsigned stencil,
1340 trace_dump_arg(uint, stencil);
1347 pipe->clear_depth_stencil(pipe, dst, clear_flags, depth, stencil,
1261 trace_context_clear(struct pipe_context *_pipe, unsigned buffers, const union pipe_color_union *color, double depth, unsigned stencil) argument
1320 trace_context_clear_depth_stencil(struct pipe_context *_pipe, struct pipe_surface *dst, unsigned clear_flags, double depth, unsigned stencil, unsigned dstx, unsigned dsty, unsigned width, unsigned height, bool render_condition_enabled) argument
/external/mesa3d/src/mesa/drivers/dri/i965/
H A Dbrw_sampler_state.c221 /* depth and stencil have only one component */
310 bool stencil = format == MESA_FORMAT_S_UINT8 || is_stencil_sampling; local
312 _mesa_get_format_bits(format, stencil ? GL_STENCIL_BITS : GL_RED_BITS);
/external/mesa3d/src/mesa/swrast/
H A Ds_zoom.c356 * Zoom/write stencil values.
362 const GLubyte stencil[])
386 zoomedVals[i] = stencil[j];
360 _swrast_write_zoomed_stencil_span(struct gl_context *ctx, GLint imgX, GLint imgY, GLint width, GLint spanX, GLint spanY, const GLubyte stencil[]) argument
/external/skia/src/gpu/vk/
H A DGrVkPipeline.cpp426 const GrStencilSettings& stencil,
445 setup_depth_stencil_state(stencil, &depthStencilInfo);
H A DGrVkPipelineState.cpp573 const GrStencilSettings& stencil,
585 stencil.genKey(&b);
H A DGrVkResourceProvider.cpp61 const GrStencilSettings& stencil,
69 return GrVkPipeline::Create(fGpu, pipeline, stencil, primProc, shaderStageInfo,
60 createPipeline(const GrPipeline& pipeline, const GrStencilSettings& stencil, const GrPrimitiveProcessor& primProc, VkPipelineShaderStageCreateInfo* shaderStageInfo, int shaderStageCount, GrPrimitiveType primitiveType, const GrVkRenderPass& renderPass, VkPipelineLayout layout) argument
/external/skqp/src/gpu/vk/
H A DGrVkPipeline.cpp426 const GrStencilSettings& stencil,
445 setup_depth_stencil_state(stencil, &depthStencilInfo);
H A DGrVkPipelineState.cpp573 const GrStencilSettings& stencil,
585 stencil.genKey(&b);
H A DGrVkResourceProvider.cpp61 const GrStencilSettings& stencil,
69 return GrVkPipeline::Create(fGpu, pipeline, stencil, primProc, shaderStageInfo,
60 createPipeline(const GrPipeline& pipeline, const GrStencilSettings& stencil, const GrPrimitiveProcessor& primProc, VkPipelineShaderStageCreateInfo* shaderStageInfo, int shaderStageCount, GrPrimitiveType primitiveType, const GrVkRenderPass& renderPass, VkPipelineLayout layout) argument

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