| 42b73955808d7b33cf8f65fc8b4abe53aeaba135 |
|
20-Feb-2017 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: fix UINT/SINT clamping for 10-bit formats on <= CIK
The same PS epilog workaround as for 8-bit integer formats is required,
since the CB doesn't do clamping.
Fixes GL45-CTS.gtf32.GL3Tests.packed_pixels.packed_pixels*.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 066a117be77fdc2b29c8eafabb4e2c2fa902a18e)
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 651861d8624f91c5ba052a2117a0e63b3139bd16 |
|
20-Jan-2017 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: handle first_non_void correctly in si_create_vertex_elements
This fixes R11G11B10_FLOAT, because it's in the category of "OTHER",
meaning that it doesn't have any channel description.
Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit eac7df43ca05abd9992b305e078e88fe7b7f8c91)
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 1cc5774e5e7b268017af9527c1e1af1185c9745a |
|
18-Jan-2017 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: fix texture gather on stencil textures
At least on VI, texture gather doesn't work with a 24_8 data format, so
use 8_8_8_8 and a modified swizzle instead.
A bit of background: When creating a GL_STENCIL_INDEX8 texture, we select
the X24S8 pipe format because we don't support stencil-only render targets
properly. With mip-mapping this can lead to a setup where the tiling is
incompatible with stencil texturing, and a flushed stencil texture is
used. For the flushed stencil, a literal X24S8 is used because there were
issues with an 8bpp DB->CB copy.
Longer term, it would be good if we could get away from these workarounds,
i.e. properly support an S8 format for stencil-only rendering and flushed
stencil. Since stencil texturing is somewhat rare, it's not a high
priority.
Fixes GL45-CTS.texture_cube_map_array.sampling.
Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
(cherry picked from commit 3cd092c41508dde2e6259f09df1736911a828548)
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 50a607cf70073d5980b07f73f38bd991b68f7029 |
|
19-Jan-2017 |
Zachary Michaels <zmichaels@oblong.com> |
radeonsi: Always leave poly_offset in a valid state
This commit makes si_update_poly_offset set poly_offset to NULL if
uses_poly_offset is false. This way poly_offset either points into the
currently queued rasterizer, or it is NULL.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99451
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit d7d32b3bfe86bd89d94d59393907bce1cb9dab7c)
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| c67a2793b369637c2b65263415a856c41f5e099e |
|
17-Jan-2017 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: determine in advance which VBOs should be added to the buffer list
v2: now it should be correct
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| b9b9540a604883e620de872537b89d47d4bceb68 |
|
17-Jan-2017 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: reject invalid vertex buffer indices at state creation
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a1c84842710268793c4a8de3cad8db95b6f37a82 |
|
02-Jan-2017 |
Ilia Mirkin <imirkin@alum.mit.edu> |
gallium: add flags parameter to texture barrier
This is so that we can differentiate between flushing any framebuffer
reading caches from regular sampler caches.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| d5234156097ec34d77d7159ddfdb0b7fdaa7e3b0 |
|
06-Jan-2017 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement GL_FIXED vertex format
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 018fb2ecb3d962cfd732bab5f0d700c6419cd1d2 |
|
06-Jan-2017 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement 32-bit SNORM/UNORM/SSCALED/USCALED vertex formats
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 44e9b67229c91d6741e4284cff4ea23cc350ed18 |
|
06-Jan-2017 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: make fix_fetch 64-bit
v2: add u_bit_consecutive64
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 3b98a5dc4749646122f227730ccb37304507ee85 |
|
26-Dec-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't wait for compute shaders in texture_barrier
it doesn't interact with compute shaders in any way
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| eca57f85ee1f47b32daa641a19d8d386c58eb1de |
|
15-Dec-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: fix gl_ClipDistance and gl_ClipVertex for points
The clipper hardware doesn't consider points as primitives that can be
clipped. Simply setting the corresponding cull bits works, and should not
have an adverse effect on other primitive types according to the hardware
team.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 3778a10d37cd0676ae6af03a059d7e80eb059245 |
|
09-Dec-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: only set VS_OUT_MISC_SIDE_BUS_ENA when the misc vector is used
Should have no effect (other than perhaps on power consumption), but
Vulkan does this.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 018ead426666d7d58517976e37f80f5de4a677cd |
|
19-Dec-2016 |
Junwei Zhang <Jerry.Zhang@amd.com> |
radeonsi: add Polaris12 support (v3)
v2: use gfxip names for llvm 4.0+
v3: use tonga for llvm <= 3.8, drop gfxip name,
we can just change that we change the other asics.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| c81a89f66277fe7d9cb2353f39ccdae31efe2a12 |
|
10-Dec-2016 |
Grazvydas Ignotas <notasas@gmail.com> |
radeonsi: fix release build unused variable warnings
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 6caa558ca677941f9a2f0570563b51fbe88cd1b9 |
|
02-Dec-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: check for sampler state CSO corruption
It really happens.
v2: declare "magic" in debug builds only
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v1)
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 5e5573b1bf8565f38e9b770b5357d069e80ff00d |
|
26-Nov-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: disable RB+ blend optimizations for dual source blending
This fixes dual source blending on Stoney. The fix was copied from Vulkan.
The problem was discovered during internal testing.
Cc: 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| ff50c44a5fb4411715da828af5b8706c8a456d26 |
|
26-Nov-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: set CB_BLEND1_CONTROL.ENABLE for dual source blending
copied from Vulkan
Cc: 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 87b208a54e67b6b01845efa2ec20a96963399920 |
|
26-Nov-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: always set all blend registers
better safe than sorry
Cc: 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| fc9f7fc9d0e642579e494206f4ca9552e50b2c12 |
|
23-Nov-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: set the smallest possible CB_TARGET_MASK
better safe than sorry; set_framebuffer_state always makes this dirty
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| bf75ef3f9201e11bb08a4d03dab20d5ff86f1ebc |
|
15-Nov-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: remove all varyings for depth-only rendering or rasterization off
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| ed3190b3f3a776fc8c75b1e6130a88079166d115 |
|
13-Nov-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't export ClipVertex and ClipDistance[] if clipping is disabled
This is the first user of optimized monolithic shader variants.
Cull distances can't be disabled by states.
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 6d5c2a8b5c33122682d801f9b14a70e3d3d9a5cc |
|
13-Nov-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: split the shader key into 3 logical parts
key->part.*: prolog and epilog flags only
key->as_{ls,es}: special flags
key->mono.*: flags for monolithic compilation only
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| d4e9f409e93391fb56b12e6933123198df7ac4bc |
|
13-Nov-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix culling if clip & cull distances are used at the same time
Fixed piglits:
- arb_cull_distance/clip-cull-3
- arb_cull_distance/clip-cull-4
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 9d8db805ef6d10bc3b7c6a91963c86ab3874ebf8 |
|
13-Nov-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: clean up si_emit_clip_regs
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 9882ed85bd603bf729c6d56c7f1922a477159b36 |
|
15-Nov-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: emit sample locations also when nr_samples == 1
Since the state tracker now enables MSAA in the hardware for the case
nr_samples == 1 as well, we need to set sample locations correctly for
this case.
The Polaris override is still needed for the non-MSAA case (when
nr_samples == 0).
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 70454f5b55d72c86d9a73bb149f20f66ae43ded7 |
|
15-Nov-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: allow sample mask export for single-sample framebuffers
This fixes GL45-CTS.sample_variables.mask.*.samples_1.*.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 6403a9e0740409f8e410b115d48db3a1324aae2c |
|
08-Nov-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: fix a subtle bounds checking corner case with 3-component attributes
I'm also sending out a piglit test, gl-2.0/vertexattribpointer-size-3,
which exposes this corner case.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 50c95d0c546139cb9fd8bafe7d873ce1f35f16b3 |
|
08-Nov-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: reject some 3-component formats as buffer textures
Fixes parts of GL45-CTS.gtf32.GL3Tests.packed_pixels.packed_pixels_pbo.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 2c875158e2763d57e5dae8892af96a894bdb7dc9 |
|
02-Nov-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: fix vertex fetches for 2_10_10_10 formats
The hardware always treats the alpha channel as unsigned, so add a shader
workaround. This is rare enough that we'll just build a monolithic vertex
shader.
The SINT case cannot actually happen in OpenGL, but I've included it for
completeness since it's just a mix of the other cases.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| e3697b4be6667ca5da997ce4e204e071332f8ee2 |
|
26-Oct-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: remove r600_surface::level_info
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| bf4d102ea3419ade6759bf9c3ad9d40c7f9b3c27 |
|
26-Oct-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: add radeon_surf::is_linear
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 692f2640ab0c4c923a5ba12ff8526d2d1a3eefb1 |
|
26-Oct-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: replace radeon_surf_info::dcc_enabled with num_dcc_levels
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| e24dc4316487eeaa6ee8aa5c709546d814e96f03 |
|
25-Oct-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: set VGT_GS_ONCHIP_CNTL on CIK and later
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Cc: 11.2 12.0 13.0 <mesa-stable@lists.freedesktop.org>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 37659071b870d3456df5c5a4f996c9fd4f1930d9 |
|
24-Oct-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: don't do (fmask.size && cmask.size)
fmask implies that cmask is present too.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| b5118fe0543400295be5b1a65a5001882498831e |
|
23-Oct-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: stop using some input fields from radeon_surface
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a2ea653a498a55a37a7f139d486694969c6aecef |
|
16-Sep-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: remove cb0_is_integer handling
st/mesa does this for us.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 2e74e8ead99dec2563f0d298a135020ed34a7175 |
|
13-Oct-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: clear DB_RENDER_OVERRIDE
Vulkan doesn't set these fields even though it doesn't use HiS.
HiS is disabled by programming DB_SRESULTS_COMPARE_STATEn to 0.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| d4d9ec55c589156df4edc227a86b4a8c41048d58 |
|
11-Oct-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement TC-compatible HTILE
so that decompress blits aren't needed and depth texturing needs less
memory bandwidth.
Z16 and Z24 are promoted to Z32_FLOAT by the driver, because TC-compatible
HTILE only supports Z32_FLOAT. This doubles memory footprint for Z16.
The format promotion is not visible to state trackers.
This is part of TC-compatible renderbuffer compression, which has 3 parts:
DCC, HTILE, FMASK. Only TC-compatible FMASK compression is missing now.
I don't see a measurable increase in performance though.
(I tested Talos Principle and DiRT: Showdown, the latter is improved by
0.5%, which is almost noise, and it originally used layered Z16,
so at least we know that Z16 promoted to Z32F isn't slower now)
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 40e1f7e09bf1bc9b8ed6f847562bbb7154025420 |
|
10-Oct-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use TC write-back instead of full cache invalidation
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 65a4d55a9ff12b44655803da10112d3b1b42ce13 |
|
10-Oct-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't invalidate VMEM L1 for memory barriers for index buffers
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 8c6ea5a6ffddd94cbdd5071d18b323f2e63b98c7 |
|
02-Oct-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: remove unnecessary #includes
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 7ce19d90143875367f23240192d438065dc297fa |
|
02-Oct-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't set sampler buffer offsets in create_sampler_view
do it at bind time, so that pipe_sampler_view is immutable with regard to
buffer reallocations and we don't have to remember all existing buffer
views.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| e43bd861e8182bd93c54631185e6018fc243aea3 |
|
02-Oct-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: track buffer bind history
similar to gl_buffer_object::UsageHistory
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| b523a9ddc5447ce03c686154ebbc5b1229e5d0a4 |
|
02-Oct-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: drop support for NULL sampler views
not used anymore. It was used when the polygon stipple texture was constant.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f92113c5a1c1e928a2f50c78866f43eff4cd6630 |
|
01-Oct-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't check PIPE_BARRIER_MAPPED_BUFFER
Caches are always flushed at IB boundary.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 51b57a9b5a42f20e460c9ff34887cddb6c42a9ec |
|
14-Sep-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: add save_qbo_state
Save compute shader state that will be used for the ARB_query_buffer_object
implementation.
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a67d81580b520aa6adf6c06ef29f27692b1aebe5 |
|
08-Sep-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: remove the cache_flush atom
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 5981ab544562c667c882526c31a6f8c2ce6eba12 |
|
07-Sep-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium: remove PIPE_BIND_TRANSFER_READ/WRITE
not used in any useful way
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 0d7ec8b7d0554382d5af6c59a69ca9672d2583cd |
|
26-Aug-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: remove VPORT_ZMIN/ZMAX from init config states
It's part of the viewport state now.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 687c4be9cf61df18e5318f918a32e24d0a2aca0e |
|
26-Aug-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: set VPORT_ZMIN/MAX registers correctly
Calculate depth ranges from viewport states and
pipe_rasterizer_state::clip_halfz.
The evergreend.h change is required to silence a warning.
This fixes this recently updated piglit: arb_depth_clamp/depth-clamp-range
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 21de3be8e62b2b093569a99550e6356ed2f106b4 |
|
22-Aug-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix texture format reinterpretation with DCC
DCC is limited in how texture formats can be reinterpreted using texture
views. If we get a view format that is incompatible with the initial
texture format with respect to DCC, disable DCC.
There is a new piglit which tests all format combinations.
What works and what doesn't was deduced by looking at the piglit failures.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a4fa21505883ec9eef905079a5160d07ffc67ae7 |
|
19-Aug-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix cubemaps viewed as 2D
This fixes: GL43-CTS.texture_view.view_sampling
v2: fix a typo, merge both if statements
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Dave Airlie <airlied@redhat.com> (v1)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (v1)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a14c50bceb6b201e361b2cf6e3f453359d510284 |
|
21-Aug-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: set more sampler settings
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f235dc08ac1dcde6eff87597914583f5b2b9aa70 |
|
13-May-2016 |
Dave Airlie <airlied@redhat.com> |
radeonsi: add support for cull distances. (v1.1)
This should be all that is required for cull distances to work
on radeonsi.
v1.1: whitespace cleanup, add docs fix clipdist_mask usage.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 57a8991020ae28c13b535c4d0547b46daaa1c83f |
|
12-Aug-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix up buffer descriptor upper-bound checking
st/mesa does this too, so we're safe.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 7cd256ce7e4bad680bb77d033cf5dd662abab2dd |
|
12-Aug-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium: change pipe_sampler_view::first_element/last_element -> offset/size
This is required by OpenGL. Our hardware supports this.
Example: Bind RGBA32F with offset = 4 bytes.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97305
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 9812a50ae682ac386c5745a3de978376aea861e7 |
|
10-Aug-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: simplify CB_TARGET_MASK logic
we can now rely on CB_COLORn_INFO to disable empty slots.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 2d2b384066cb19d18592a974e4fe4ca16635103d |
|
10-Aug-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't set CB_COLOR1_INFO for dual src blending
Vulkan doesn't do this. The reason may be that CB_COLOR1_INFO.SOURCE_FORMAT
from NI was moved to SPI_SHADER_COL_FORMAT for SI.
I asked CB guys about this 2 days ago and they still haven't replied.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| e722b90bc9dae7438cbd3beaff439f45e2470ccc |
|
10-Aug-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: eliminate PS OUT[1] if dual src blending is off and CB1 is not bound
All VP DX9 ports benefit from this.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 9c63fd90561c32bccd905d8e0abf4864941f359a |
|
09-Aug-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: set CB_COLORn_INFO.ROUND_MODE
just do what the register spec says
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 667ad9fa3e1ab0fef930e320298e0d98d6109aea |
|
09-Aug-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: set CB_COLORn_INFO.SIMPLE_FLOAT
This can help enable some blend optimizations (see the register spec).
Vulkan always sets this.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 36057ff12a148f401490f82fce8c6670cadb039e |
|
09-Aug-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: disallow MIN/MAX blend equations for dual source blending
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 947e0614d091c260651e4f3d6209bd6bcc2cfa0d |
|
09-Aug-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: only set dual source blending for MRT0
This is the proper fix for Overlord and Witcher 2 hangs.
The hang condition is that 1 app must write to MRT0 and MRT1 from a pixel
shader while MRT1 is disabled in CB_TARGET_MASK (does this generate
unflushable pixel quads? I don't know), and another app (e.g. Glamor)
must enable dual source blending in both MRT0 and MRT1. The hw gets
confused, which leads to corruption and hangs.
Cc: 12.0 11.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| c15a9dec298940c918403353c6830f4f71115592 |
|
02-Aug-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: skip unnecessary si_update_shaders calls
Small decrease in draw call overhead.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f755da0f2f8609e603b50424aa254358eb72fa25 |
|
16-Jul-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: fix Polaris MSAA regression
The regression was introduced by commit d938b8c. The problem here is that in
order to use the small primitive filter, we need to explicitly set the sample
locations to 0. But the DB doesn't properly process the change of sample
locations without a flush, and so we can end up with incorrect Z values.
Instead of doing a flush, just disable the small primitive filter when MSAA
is force-disabled.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96908
Cc: 12.0 <mesa-stable@lists.freedesktop.org>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 65d48fcf8c0821365e0e81347894326847039328 |
|
10-Jul-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: silence Coverity warning
Coverity's analysis is too weak to understand that
r600_init_flushed_depth(_, _, NULL) only returns true when
flushed_depth_texture was assigned a non-NULL value.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| b479c47a9ce11048601c56c9e69222ad75c71458 |
|
08-Jul-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: fix bad assertion in si_emit_sample_mask
The blitter sets mask == 1, which is fine since it doesn't use smoothing.
Fixes a regression introduced in commit 5bcfbf91.
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 5bcfbf91e53e4f66310fc4ab63a7caf931a1e45c |
|
06-Jul-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: catch a potential state tracker error with non-MSAA FBs
At least st/mesa ensures this, so I'd rather not handle deviations in radeonsi.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| d938b8c0bf32ab5f0103ac68071c4cc467846108 |
|
06-Jul-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: explicitly choose center locations for 1xAA on Polaris
Unlike SC, the small primitive filter does not automatically use center
locations in 1xAA mode, so this is needed to avoid artifacts caused by
the small primitive filter discarding triangles that it shouldn't.
As a side effect of how the effective number of samples is now calculated,
this patch also avoids submitting the sample locations for line/poly smoothing
when they're not really needed.
Cc: 12.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 18cc825fb9c599781074c3b008814714e8efd7a7 |
|
29-Jun-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: sample from flushed depth texture when required
Note that this has no effect yet. A case where can_sample_z/s can be false
in radeonsi will be added in a later patch.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f2eb34f82f074284b691d568d26426a1f633d5f0 |
|
30-Jun-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
gallium/radeon: replace is_flushing_texture with db_compatible
This is a left-over of when I considered generalizing the separate stencil
support. I do prefer the new name since it emphasizes what flushing vs.
non-flushing means from a functional point-of-view, namely special handling
of the texture format.
v2: adjust r600_init_color_surface as well
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 49e3c74cdd0da5abd6cad1fb14af6cc0d85d76c9 |
|
21-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: add a heuristic enabling DCC for scanout surfaces (v2)
DCC for displayable surfaces is allocated in a separate buffer and is
enabled or disabled based on PS invocations from 2 frames ago (to let
queries go idle) and the number of slow clears from the current frame.
At least an equivalent of 5 fullscreen draws or slow clears must be done
to enable DCC. (PS invocations / (width * height) + num_slow_clears >= 5)
Pipeline statistic queries are always active if a color buffer that can
have separate DCC is bound, even if separate DCC is disabled. That means
the window color buffer is always monitored and DCC is enabled only when
the situation is right.
The tracking of per-texture queries in r600_common_context is quite ugly,
but I don't see a better way.
The first fast clear always enables DCC. DCC decompression can disable it.
A later fast clear can enable it again. Enable/disable typically happens
only once per frame.
The impact is expected to be negligible because games usually don't have
a high level of overdraw. DCC usually activates when too much blending
is happening (smoke rendering) or when testing glClear performance and
CMASK isn't supported (Stoney).
v2: rename stuff, add assertions
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 9124457bff70686ea804d7e35fb63bea5db5a8a2 |
|
21-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: add state setup for a separate DCC buffer
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| ebb9c7d7c48c78f3a50654ec6385d9065c1eb7b7 |
|
21-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: unreference framebuffer state with set_framebuffer_state
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 0c135a773fafaf6707fb2cf6fff5d0d95727ea2f |
|
29-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't advertise multisample shader images
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 9a71bf88582164413a021a2fc26c894512bd52af |
|
28-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: enable CU0 in each SE for LS-HS execution
Offchip-only tessellation allows this.
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 4b11ef23b4c064a6db5fae313b4e2e6bf027c7e1 |
|
28-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use conformant line rasterization
AA lines are not completely correct (see TODO), but everything else
should be.
+ 3 linestipple piglits
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| c1dbc563f4a6a6b3438e97a2418922c22c1e77bf |
|
08-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: set PA_SU_SMALL_PRIM_FILTER_CNTL register on Polaris
This was missing.
Cc: 12.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| d93bacc1fa4bf1d6d358da3615b00305e8518f33 |
|
21-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: make si_is_format_supported static
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Vedran Miletić <vedran@miletic.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 3eacbc52d51789f7c58dfe5ca1317962eb9d1a6a |
|
21-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: boolean -> bool, TRUE -> true, FALSE -> false
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Vedran Miletić <vedran@miletic.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| be7957b156e30ffe9fb647b58ba00e236e498c3f |
|
14-Jun-2016 |
Axel Davy <axel.davy@ens.fr> |
radeonsi: Implement POLYGON_OFFSET_UNITS_UNSCALED
Empirical tests show that the polygon offset
behaviour is entirely determined by the content of
the PA_SU_POLY_OFFSET states, and not by the depth buffer
format bound.
PA_SU_POLY_OFFSET seems to directly set the parameters of
the polygon offset formula, and setting 0 for
PA_SU_POLY_OFFSET_DB_FMT_CNTL (ie setting the unorm depth
bias behaviour with a scale of 2^0 = 1.0f) gives the unscaled
behaviour.
Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| ff5abe9d90d0db7b50ec0b1f52ce3a2f766ecfd7 |
|
14-Jun-2016 |
Axel Davy <axel.davy@ens.fr> |
radeonsi: move PA_SU_POLY_OFFSET_DB_FMT_CNTL to poly offset states
Emit PA_SU_POLY_OFFSET_DB_FMT_CNTL with rasterizer poly_offset states.
This will be useful to implement
PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED.
Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 28d0d0c5b4ba9e636b540fafa3b9b2157e848757 |
|
24-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix fractional odd tessellation spacing for Polaris
ported from Vulkan (and no source explains why this is needed)
Cc: 12.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 0d638f4b3d2ff9c5a00828bd3d6743d1a70cf8be |
|
24-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: set some VGT context registers on SI-CI
the kernel sets them, but other UMDs can change them
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 8f3ef4e8b800ba7d14cd10250382a01f0bb829b0 |
|
23-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: optimize rendering to linear color buffers
loosely ported from Vulkan
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| e4b22c9fa1a443eb250bd11e41c5c9ad054484cb |
|
23-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: set almost optimal settings in SC_MODE_CNTL_1
ported from Vulkan
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 603c073ec2b0ae4be82326992f11d39be45f54c8 |
|
23-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: let drivers specify SC_MODE_CNTL_1 fields
radeonsi will set more fields
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| ae0d2d15cc5d4f63bf5f5dccad557db3c2eef9f0 |
|
23-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: disable complicated point clipping against user clip planes
Nothing in the GL spec says that we should expand points to triangles.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 1167905c41d4594153d6649c0cade96a83831cbd |
|
17-Jun-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: use trapezoid distribution for tess on Fiji and Polaris
This yields a small performance improvement in Unigine Heaven.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 32fd92e028b4148f892b0640f83ac536b759f90a |
|
17-Jun-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: emit PA_SC_RASTER_CONFIG_1 only once
It is the same for all SEs.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| c95175581e983642dc4b23d059e6eaff5b79d2db |
|
17-Jun-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: fix calculation of valid RB mask per SE
The old calculation treated too many RBs as disabled.
Cc: 11.0 11.1 11.2 12.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f39439d1666481bd1316e865eb3507a2a397f346 |
|
07-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: re-enable PBO ReadPixels acceleration
disabled by 4f1cccf570112f93265a4cace504eb763fa8f73e
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 7c6e88b6430b3a805f982c7f8b34d1f79a8fc09c |
|
06-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: allow MSAA resolving into a texture that has DCC enabled
Since DCC is enabled almost everywhere now, it's important not to disable
this fast path.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| c06246501ed9c095a3fa9f8fe2a5dadd1df55271 |
|
06-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't enable DCC in the sampler if first_level doesn't have it
If first_level > 0 and DCC is disabled for that level, let's skip DCC
reads entirely.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| aa7fe7044328039903993dde6edb32b7953ae9b0 |
|
03-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add per-level dcc_enabled flags
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 60e93ddd0675e525333ae928e94be31b973409de |
|
03-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: compute DCC register parameters in si_emit_framebuffer_state
This will get more complicated with mipmapped DCC or when DCC is enabled
after allocation.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| ba4a2840c7fb52169400420fd94c655b2b229f7e |
|
03-Jun-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: add si_set_rw_buffer to be used for internal descriptors
So that callers outside of si_descriptors.c need to worry less about the
details of descriptor handling.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 095803a37aa67361fc68604e81f858f31ae59b1b |
|
02-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: add support for sharing textures with DCC between processes
v2: use a function for calculating WORD1 of bo metadata
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| b0335842999f8b9bd357deae8fdf003d4c845149 |
|
18-May-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: set some colorbuffer register fields at emit time
to allow reallocating the texture storage with different parameters
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 95c5bbae66af3ca1f805d94f6fe8d8e4ba2c9c43 |
|
17-May-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: set some image descriptor fields at bind time
mainly the fields that can change by reallocating a texture and changing
the tile mode
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| bd85e4a041c13c0c8a6a9abc7d15d1ceede42cea |
|
23-May-2016 |
Alex Deucher <alexander.deucher@amd.com> |
radeonsi: fix the raster config setup for 1 RB iceland chips
I didn't realize there were 1 and 2 RB variants when this code
was originally added.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: 11.1 11.2 12.0 <mesa-stable@lists.freedesktop.org>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 35818129a676502415a5f502ccd2759646066921 |
|
31-May-2016 |
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> |
radeonsi: Decompress DCC textures in a render feedback loop.
By using a counter to quickly reject textures that are not
bound to a framebuffer, the performance impact when binding
sampler_views/images is not too large.
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| cbe3421f05b1a99df6df0fc93d7ce7d5071af02f |
|
31-May-2016 |
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> |
radeonsi: Add counter to check if a texture is bound to a framebuffer.
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 43d7305a405c82e81c9b7b3cc4958169b13777bb |
|
12-Apr-2016 |
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> |
radeonsi: Allow TES distribution between shader engines.
The R_028B50_VGT_TESS_DISTRIBUTION value is copied from
amdgpu-pro. Smaller values in the ACCUM fields seem to
decrease the performance advantage from this patch, higher
values don't seem to matter.
v2: Add distribution mode field enums.
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 11e49871352cdb5d0fa5338a0be4995f7393b06f |
|
07-Mar-2016 |
Axel Davy <axel.davy@ens.fr> |
radeonsi: Mixed colorbuffer formats are unsupported
Besides depth/stencil, the hardware doesn't support
mixed formats.
The GL state tracker doesn't make use of them.
Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 47b390fe45e5e6f982c60b58985892438959cd8e |
|
17-May-2016 |
Jan Vesely <jano.vesely@gmail.com> |
Treewide: Remove Elements() macro
Signed-off-by: Jan Vesely <jano.vesely@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 498a40cae8023a8461e7cfe95cb837a0aa459337 |
|
22-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: only expose *_init_*dma_functions from (S)DMA files
just normalizing the interfaces
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 146927ce7b7c45be57655af505e8f21e90ae3928 |
|
30-Apr-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: fix some reported undefined left-shifts
One of these is an unsigned bitfield, which I suspect is a false positive, but
gcc 5.3.1 complains about it with -fsanitize=undefined.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 901f57dff543f89c03c9e1e4eb4bdd79c16cbeb7 |
|
03-May-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: set DECOMPRESS_Z_ON_FLUSH if nr_samples >= 4
Vulkan always sets this. It only affects in-place Z decompression.
This is recommended for performance, but what app uses MSAA depth
texturing?
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 02f90cef7d4c5417da31bea6c098bc06b9c4e035 |
|
01-May-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: remove unused tile mode getters
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| c3ca54aee9386f827615162b20f0688726ee2ebe |
|
01-May-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: just read tile mode arrays in DB setup
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 155ce496031888e7d1388c755775233544644eec |
|
29-Apr-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: fix PIPE_FORMAT_R11G11B10_FLOAT handling
That format has first_non_void < 0. This fixes a regression in piglit
arb_shader_image_load_store-semantics that was introduced by commit 76b8c5cc602,
while hopefully still shutting Coverity up (and failing in a more obvious way
if a similar error should re-appear).
Reviewed-by: Jakob Sinclair <sinclair.jakob@openmailbox.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 92f6af2c4a360c6e499ead0fdfbd57e63615e9bb |
|
22-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: drop support for LINEAR_GENERAL layout
Unused. All texture imports use LINEAR_ALIGNED regardless of what
the DDX does.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 76b8c5cc602eda19c91b842b02f84564c18e79a6 |
|
25-Apr-2016 |
Jakob Sinclair <sinclair.jakob@openmailbox.org> |
radeonsi: check if value is negative
Fixes a Coverity defect by adding checks to see if a value is negative
before using it to index an array. By checking the value first it makes
the code a bit safer but overall should not have a big impact.
CID: 1355598
Signed-off-by: Jakob Sinclair <sinclair.jakob@openmailbox.org>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 8c43c06e0463515c1339d44cbb8f78169e6a06fb |
|
23-Apr-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: work around an MSAA fast stencil clear problem
A piglit test (arb_texture_multisample-stencil-clear) has been sent.
This problem was discovered analyzing
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93767
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 514c5b5f4b692e2596341e08797c4f6dc8cdfe00 |
|
26-Apr-2016 |
Oded Gabbay <oded.gabbay@gmail.com> |
radeonsi: fix build error because of missing param
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 2242dbe11d56b05ede7a928a9973adda4b145ad7 |
|
21-Mar-2016 |
Oded Gabbay <oded.gabbay@gmail.com> |
r600g/radeonsi: send endian info to format translation functions
Because r600 GPUs can't do swap in their DB unit, we need to disable
endianess swapping for textures that are handled by DB.
There are four format translation functions in r600g driver:
- r600_translate_texformat
- r600_colorformat_endian_swap
- r600_translate_colorformat
- r600_translate_colorswap
This patch adds a new parameters to those functions, called
"do_endian_swap". When running in a big-endian machine, the calling
functions will check whether the texture/color is handled by DB -
"rtex->is_depth && !rtex->is_flushing_texture" - and if so, they will
send FALSE through this parameter. Otherwise, they will send TRUE.
The translation functions, in specific cases, will look at this parameter
and configure the swapping accordingly.
v4:
evergreen_init_color_surface_rat() is only used by compute and don't
handle DB surfaces, so just sent hard-coded FALSE to translation
functions when called by it.
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| fb523cb6ad3ffef22ab4b9cce9e53859c17c5739 |
|
16-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium: merge PIPE_SWIZZLE_* and UTIL_FORMAT_SWIZZLE_*
Use PIPE_SWIZZLE_* everywhere.
Use X/Y/Z/W/0/1 instead of RED, GREEN, BLUE, ALPHA, ZERO, ONE.
The new enum is called pipe_swizzle.
Acked-by: Jose Fonseca <jfonseca@vmware.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 3138a28ff2a6a7c9bbf315538412f84b549d694a |
|
19-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move default tess level constant buffer to RW buffers
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 302bec24bd67cb21c39e9db872afe946994547a7 |
|
19-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move sample positions constant buffer to RW buffers
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 860b658b97f859ee7d0dd076a8ac0332601ffa65 |
|
19-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move clip plane constant buffer to RW buffers
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 698821bda32eb9958e105c38087b49b6f307128d |
|
19-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: rework polygon stippling to use constant buffer instead of texture
add it to the RW_BUFFERS descriptor array
now the slot masks don't have to have 64 bits
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f45f54e14ac54460f2785bc14fc1f9220a0a763d |
|
21-Apr-2016 |
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> |
radeonsi: Use defines for CONTEXT_CONTROL instead of magic values.
v2: Use field names provided by Nicolai.
v3: Updated to use CONTEXT_CONTROL prefix.
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 7a92c0842892bf55a82b7d95ab5a3b7dfbb83407 |
|
27-Mar-2016 |
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> |
radeonsi: do not do two full flushes on every compute dispatch
v2: Add more CS_PARTIAL_FLUSH events.
Essentially every place with waits on finishing for pixel shaders
also has a write after read hazard with compute shaders.
Invalidating L2 waits implicitly on pixel and compute shaders,
so, we don't need a CS_PARTIAL_FLUSH for switching FBO.
v3: Add CS_PARTIAL_FLUSH events even if we already have INV_GLOBAL_L2.
According to Marek the INV_GLOBAL_L2 events don't wait for compute
shaders to finish, so wait for them explicitly.
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| aaf5be4a29b4537b7e298c3ddf889180f3b4d855 |
|
13-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: disable hw ETC2 on Polaris
not supported by hw directly, but it's still fully supported by the driver
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 04f15e491f8ecd0bce59e2de5e501ed3fd157c62 |
|
11-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: add an env variable to force a level of aniso filtering
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 8e70a58af394a8699aecdaad6e406a9183ce2090 |
|
12-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix a critical SI hang since PIPELINESTAT_START/STOP was added
For some reason unknown to me, SI hangs if the event is written after
CONTEXT_CONTROL.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a191e6b719848a17963f185954f1696fa5a2bcb1 |
|
12-Apr-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: fix bounds check in si_create_vertex_elements
This was triggered by
dEQP-GLES3.functional.vertex_array_objects.all_attributes
Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 2ca5566ed7847f5a56d055fd6530382c55012663 |
|
10-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move scissor and viewport states into gallium/radeon
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Grigori Goronzy <greg@chown.ath.cx>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| db00f6cc9cdef551e1069a6d5cf6171565cc0ace |
|
10-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use guard band clipping
Guard band clipping speeds up rasterization for primitives that are
partially off-screen. This change in particular results in small
framerate improvements in a wide range of games.
Started by Grigori Goronzy <greg@chown.ath.cx>.
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Grigori Goronzy <greg@chown.ath.cx>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| cb21f8a97cdd5ae240aecdfa417b60b2c0dd6789 |
|
10-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: compute scissor from viewport in set_viewport_states
and clamp it right before emitting. This is a prerequisite for computing
the guard band.
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Grigori Goronzy <greg@chown.ath.cx>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| b0d4469519bf07c4051af8eb86ab71647fb1eb61 |
|
07-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: disable aniso filtering for non-mipmap textures on SI-CI
The closed driver does this, but it looks at base_level and last_level
and uses a conditional assignment, which LLVM can't generate on SGPRs.
That led me to invent this solution that abuses the image descriptor.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| ddd33431c54379ecf0dce71078e34a07be82e2fc |
|
08-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: clean up aniso state translation
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f7420ef5b4640a92a5aaa57341c59e0d4185a4a0 |
|
07-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: enable some sampler fields to match the closed driver
copied from the Vulkan driver
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| b82893f93ab0f92dd44444e4a311fa253f423226 |
|
08-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: move pipeline stat context flags to common code
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 466aa5718594a1188460856840be324f84553730 |
|
07-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix mask checking when emitting scissors and viewports
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Grigori Goronzy <greg@chown.ath.cx>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f3eebb84ebd4c1dd7bd9b69b0b65273635443740 |
|
07-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement and rely on set_active_query_state
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 1cd19ebc4a892ada69f9085892441c00674b2764 |
|
03-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: do per-pixel clipping based on viewport states
In other words, vport scissors are derived from viewport states.
If the scissor test is enabled, the intersection of both is used.
The guard band will disable clipping, so we have to clip per-pixel.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 5fac4887d865305f919e1d23cdb3a6f6d7043884 |
|
07-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: disable perfect ZPASS counts for PIPE_QUERY_OCCLUSION_PREDICATE
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 1156cad405eb380f065086710df114ed40e767b9 |
|
20-Mar-2016 |
Edward O'Callaghan <eocallaghan@alterapraxis.com> |
radeonsi: Improve assert info out of si_set_framebuffer_state()
Lets give the developer a little hand if we are going to assert
on a zero literal at the end of a branch.
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| bb1bd0ddd70706c765053bc84deecac77d9b2349 |
|
20-Mar-2016 |
Edward O'Callaghan <eocallaghan@alterapraxis.com> |
radeonsi: Allow 16 samples MSAA mode for PIPE_FORMAT_NONE
For ARB_framebuffer_no_attachment; A is_format_supported() query
with 'PIPE_FORMAT_NONE' passed implies a query of the number of
samples supported from the framebuffer with no attachment.
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 7eb5e5b8b4ae51be367050df48d3a9398694d3bc |
|
14-Jan-2016 |
Christian König <christian.koenig@amd.com> |
radeonsi: ignore PIPE_BIND_LINEAR in si_is_format_supported v2
Linear layout should work for all not compressed or depth/stencil formats.
v2: restrict it a bit more
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 42e442d888ce2d3dcb95350d17c298791f5d76cc |
|
04-Nov-2015 |
Sonny Jiang <sonny.jiang@amd.com> |
radeonsi: add support for Polaris (v2)
v2: Polaris chips should be defined after Stoney
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> (v1)
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> (v1)
Signed-off-by: Leo Liu <leo.liu@amd.com> (v2 diff)
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v2 diff)
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a8f5d11426af0eeadf6977c3d8f3a76afe8f03c5 |
|
17-Mar-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: cache flush/invalidation for missing PIPE_BARRIER_*_BUFFER bits (v2)
This fixes arb_shader_image_load_store-host-mem-barrier.
v2: flush TC L2 for index buffers on <= CIK (Marek)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| b8ec20551506204bf9aa794efae6f978499c34f6 |
|
22-Mar-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix 2D array MSAA failures since image support landed
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 43f5ce1d20dac94d83d6d6c31b88b4227316877d |
|
13-Mar-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: implement MemoryBarrier (v2)
v2: invalidate both constant and VMEM/TC L1 for constant buffers (Marek)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| e85cf35a6516c44e33663fcd9637c6b434bb63ee |
|
07-Feb-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: implement set_shader_images (v2)
Whether DCC is disabled depends on the access flags with which the image
is bound: image_load supports DCC, but store and atomic don't.
v2: remove an unnecessary masking of images->desc.enabled_mask
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| ec74deeb2466689a0eca52f290d5f9e44af6a97b |
|
25-Feb-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: set amdgpu metadata before exporting a texture
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| ff7e9412be9d1f5fdfedefb179483cc43b276c89 |
|
06-Feb-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: extract the texture descriptor computation into its own function
This will allow this code to be re-used for shader images.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 1197c69bdd4d2c99a2e05944af18488d7a3425be |
|
06-Feb-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: extract the buffer descriptor computation into its own function
This will allow it to be re-used for shader image descriptors.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 2bf8ee34b8098ebeda82e21cc93919dc923531a1 |
|
06-Feb-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: remove resource field from si_sampler_view
view->resource is redundant with view->base.texture, so get rid of it.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 1e48ec7571cb36b4ee5660f8066c7905a3432969 |
|
21-Oct-2015 |
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> |
radeonsi: add DCC decompression (v2)
This is currently not needed but will be necessary when we have
features that do not work with DCC enabled, such as image stores
and sharing non-scanout surfaces.
v2: Marek: rebase, remove decompression from si_flush_resource (not needed)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| b744ac9f44099e1b50d335dc9bdc0950ab7ec374 |
|
21-Feb-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: allocate DCC in the same backing buffer as the texture
To allow sharing textures with DCC enabled.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 914d4967d723c58ec073eef677237798c2dc9751 |
|
02-Mar-2016 |
Oded Gabbay <oded.gabbay@gmail.com> |
radeonsi: Do colorformat endian swap for PIPE_USAGE_STAGING
There is an old if statement (dated to 2011) that prevented doing
endian swap for colorformat, in case the buffer is marked as
PIPE_USAGE_STAGING.
This is now wrong because st_ReadPixels() reads into a destination
texture that is marked with PIPE_USAGE_STAGING. Therefore, even if
the texture is rendered correctly to the monitor, when reading it
back we get unswapped/wrong values.
This patch makes the check_rgba() function in gl-1.0-readpixsanity
piglit test pass in big-endian.
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| d0f3b524cdb8489a6872ba3639a13813de221fc2 |
|
22-Feb-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use re-Z
This can increase perf for shaders that kill pixels (kill, alpha-test,
alpha-to-coverage).
v2: add comments
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| dc2745619459171ee8e5367c1d126d4695e92691 |
|
26-Jan-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: separate out shader key bits for prologs & epilogs
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 276621da451ae93321de05bf63baaf20ee2f32ca |
|
30-Jan-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: set num_banks in the winsys
amdgpu doesn't have to set this, because radeonsi gets it from tile mode
arrays by default.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 1e864d73799cfbcb29c4f22722b908bc39643347 |
|
30-Jan-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: rename & reorder members of radeon_info
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 0d68b91220475620424869810d618ff3225c03d4 |
|
17-Jan-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: rework RB+ for Stoney
This fixes it.
States which also need to be taken into account:
- SPI color formats - each down-conversion format supports only a limited set
of SPI formats
- whether MSAA resolving and logic op are enabled
These need special handling:
- blending
- disabled channels
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 066d76c2f46ecf2e2c02705687738afe7fee8d13 |
|
23-Dec-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: rename cb_target_mask state to cb_render_state
and rename a variable in the function.
SX_PS_DOWNCONVERT will be emitted here.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 5f0f9a5619fbbcf9a0edf529455100581341ae04 |
|
28-Jan-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: treat intensity render targets exactly like red
The motivation is to simplify the Stoney RB+ code.
Intensity is already treated as red except here.
No piglit regressions.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| cd9c07e7cdff5a38fd0de48626baecb5a9013846 |
|
22-Jan-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add ETC1 support for Stoney
It's a subset of ETC2. Tested.
For more information, see page 42 and onward:
http://www.graphicshardware.org/previous/www_2007/presentations/strom-etc2-gh07.pdf
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 5944f3d2fc8ee3d0b9865865443d2ecfdb19bd1a |
|
20-Jan-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: enable late VS allocation (v3)
v2: take the number of CUs into account
v3: change in LS allocation
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 97648229e4005111a553b78df27dc131f11a8277 |
|
19-Jan-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: allow using all CUs for tessellation and on-chip GS (v2)
v2: After more discussion with hw teams, the kernel already contains the
optimal settings allowing us to use all CUs.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a9d5842ec0ff3c620000852f75060ccc2cf8ec44 |
|
03-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add ETC2 support for Stoney
Tested and working.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f6360de8c02a52e29c2f6f65b94fd981ffd3851f |
|
15-Jan-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use all SPI color formats
because not using SPI_SHADER_32_ABGR doubles fill rate.
We should also get optimal performance if alpha isn't needed or blending
isn't enabled.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 8667a1aea2ac3fee9b1b663132dc1bea8ec21cda |
|
11-Jan-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use SPI_SHADER_COL_FORMAT fields instead of export_16bpc
This does change the behavior slightly:
If a shader writes COLOR[i] and that color buffer isn't bound,
the shader will export MRT_NULL instead and discard the IR tree that
calculates the output. The only exception is alpha-to-coverage, which
requires an alpha export.
v2: - update a comment about 16BPC
- account for MRTZ when when fixing alpha-test/kill
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 0446ea9d084f5e72f7ea23f806a9723c94dd3685 |
|
15-Jan-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't enable blending if colormask == 0
most likely useless, but doesn't hurt
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 73e7c5fd7f9b9054d39495ef4087c7e0ceeaedaa |
|
20-Dec-2015 |
Dave Airlie <airlied@redhat.com> |
radeonsi: fix viewport clipping handling. (v2)
If oViewport is written, vertex reuse need to be turned off.
If oViewport is constant, vertex reuse is fine, and VPORT_PROVOKE_DISABLE
need to be set. (We don't know if oViewport is constant so we
skip this.)
Fixes: arb_viewport_array-render-viewport-2 and some CTS tests.
v2: drop writing to provoke disable, drop write in initial
state.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 1a24f443b492972eec8f01ffb36d0ae300acd7c8 |
|
10-Dec-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement fast stencil clear
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 8ee96ce83479693ab602964e0f157a2a51677005 |
|
08-Dec-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: re-enable Hyper-Z for stencil
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| de887ba90ce077a0243269aa0c72a1ab0d2d3ff4 |
|
01-Dec-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement RB+ for Stoney (v2)
v2: fix dual source blending
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 51603af3901b2e401d2009ec27b99996fc9ccffb |
|
10-Dec-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use tgsi_shader_info::colors_written
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 13eb5f596bc8ece3d1805b388aa53917e6158d7b |
|
04-Dec-2015 |
Edward O'Callaghan <eocallaghan@alterapraxis.com> |
gallium/drivers: Sanitize NULL checks into canonical form
Use NULL tests of the form `if (ptr)' or `if (!ptr)'.
They do not depend on the definition of the symbol NULL.
Further, they provide the opportunity for the accidental
assignment, are clear and succinct.
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 84fbb0aff98d6e90e4759bbe701c9484e569c869 |
|
21-Nov-2015 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: rename fmask::pitch -> pitch_in_pixels
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 00f554abba8c0f3b65af94365c15109c3b858486 |
|
13-Nov-2015 |
Alex Deucher <alexander.deucher@amd.com> |
radeonsi: enable optimal raster config setting for fiji (v2)
Requires proper kernel tiling configuration so check the tiling
config registers.
v2: send the right version of the patch
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: mesa-stable@lists.freedesktop.org
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 5b37d8b50cfc9a390f8320557a332a3c75b91953 |
|
13-Nov-2015 |
Alex Deucher <alexander.deucher@amd.com> |
radeonsi: use proper GRBM_GFX_INDEX offset for CI+
The offset is different on CI and newer.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 12596cfd4cea4cff2bc067876d5ff25c54cdc874 |
|
07-Nov-2015 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: atomize render condition (SET_PREDICATION)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 6cc8f6c6a72b1aab7bb506deb220e04ae50d8c2b |
|
07-Nov-2015 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: inline the r600_rings structure
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| c6012a6650c894e57dba51f8e336f134aad13d61 |
|
06-Nov-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: rename cache flushing flags once more
KCACHE, TC L1 and TC L2 are renamed to:
- SMEM L1
- VMEM L1
- GLOBAL L2
You can easily tell what they are used for now.
Shaders must deal with coherency issues between both L1s manually,
e.g. by setting GLC=1 or by using s_dcache_*.
BOTH_ICACHE_KCACHE was an unused definition.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 40912dd91e96376517fb41bb4dc228b45fd1a01c |
|
05-Nov-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: initialize SX_PS_DOWNCONVERT to 0 on Stoney
otherwise the SX or CB blocks can go bananas
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Cc: mesa-stable@lists.freedesktop.org
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| e15c5c7a069a8dd8e0ad97f0f405a85f0f52d9f4 |
|
06-Nov-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix a future crash in emit_cb_target_mask
This can't crash currently, but it would crash if clear_buffer
from u_blitter were used with a clean context.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 235d38584cd47faa2837cd66ebdc770f295f47c4 |
|
22-Oct-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: properly check if DCC is enabled and allocated
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 5bc5dca0cbcb1a13fbe9b3a33489e88531d1eb33 |
|
22-Oct-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: simplify DCC handling in si_initialize_color_surface
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 48b5f104ac4e0c3ddbff87520adb7a9d2a254c67 |
|
21-Oct-2015 |
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> |
radeonsi: Enable DCC.
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 06083046a4a6e8321cc0230f84208c8e10947105 |
|
19-Oct-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add another requirement for PARTIAL_ES_WAVE
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 50bb2decf70b59ac8021048c0f8baf05ab3766f6 |
|
22-Oct-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add draw_vbo check for a NULL pixel shader
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| ed95cb3a310951c9623fa6757226359c60fa7375 |
|
22-Oct-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add checks for a NULL pixel shader
This will allow removing the dummy PS.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| bf0d0ce0d57dce5df8195942d2eda6389d341fea |
|
21-Aug-2015 |
Samuel Li <samuel.li@amd.com> |
radeonsi: add support for Stoney asics (v3)
v2 (agd): rebase on mesa master, split pci ids to
separate commit
v3 (agd): use carrizo for llvm processor name for
llvm 3.7 and older
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Samuel Li <samuel.li@amd.com>
Cc: mesa-stable@lists.freedesktop.org
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 9b54ce3362f117b4d46497b578211bb26554dd78 |
|
07-Oct-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: support thread-safe shaders shared by multiple contexts
The "current" shader pointer is moved from the CSO to the context, so that
the CSO is mostly immutable.
The only drawback is that the "current" pointer isn't saved when unbinding
a shader and it must be looked up when the shader is bound again.
This is also a prerequisite for multithreaded shader compilation.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 12321966aec5e635c51208f409737dd1ddc3c883 |
|
17-Mar-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add support for ARB_texture_view
All tests pass. We don't need to do much - just set CUBE if the view
target is CUBE or CUBE_ARRAY, otherwise set the resource target.
The reason this can be so simple is that texture instructions
have a greater effect on the target than the sampler view.
Thanks Glenn for the piglit test.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 5bc871a4caf97f4e07830ea463f445994c8d13b5 |
|
07-Oct-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement vertex color clamping
This is only supported in the compatibility profile (without GS and tess).
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 208d1ed38ddb7de8211a9ffc3d89ae176ef7e9d4 |
|
07-Oct-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement fragment color clamping
using the shader key for now.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 9652bfcf2d2f3be5158ed88b49917bb5a2d8323d |
|
28-Sep-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement the simple case of force_persample_interp
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| c23c92c965f72f9a0b160834d06a2d631b736081 |
|
06-Sep-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: only do depth-only or stencil-only in-place decompression
instead of always doing both.
Usually, only depth is needed, so stencil decompression is useless.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 2edb0606397d16fe88d7b488285df379aaae5893 |
|
26-Sep-2015 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: tell the winsys the exact resource binding types
Use the priority flags and expand them.
This information will be used for debugging.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 60ec8fb448f292b8aac08f74c26da8171b2b6a8f |
|
03-Sep-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't update polygon offset state if it has no effect
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 722ce747436f5b9c79d1fa4a8c59eed2f9cb611b |
|
03-Sep-2015 |
Grazvydas Ignotas <notasas@gmail.com> |
gallium/radeon: remove 'dirty' member from r600_atom
It's no longer used by both r600 and radeonsi now.
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 2d8f7d3c153bf73fa7137b89e194d4e0e79d943d |
|
30-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use an indirect buffer for init_config
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a9971e85d9a4038645bdc7496d73906fc324b805 |
|
30-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: rework uploading border colors
The border colors are uploaded only once when the state is created.
This brings truly immutable sampler descriptors, because they don't have
to be updated every time a sampler state is re-bound.
It also moves the TA_BC_BASE_ADDR registers to init_config, removing one
more state. The catch is there is now a limit: only 4096 border colors can
be used by one context. I don't think that will be a problem.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 5e2619ef3078fe4f9c3e0780ee520fbfb727ee54 |
|
30-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use all built-in border colors
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| fbbebeae10f85e6fe9b81cf4187b8eb8ecba6da5 |
|
30-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: inline si_cmd_context_control
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 28b34b474e330be881d15a34859811e9f5e36eb5 |
|
30-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't send IB dword usage to si_need_cs_space
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| aad43f0768edc0711d5f54ea79b052fb4f1d3321 |
|
30-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't set number of IB dwords for states
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 7ff2991e344130c8eb6e4be0b146320b3f02c1e6 |
|
30-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: rename r600_context_bo_reloc -> radeon_add_to_buffer_list
this name should be easy to understand without other knowledge
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| d2e63ac042ce4b0ff7d4645fc9bc8d2d73967b7e |
|
30-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: rename write_*_reg functions
e.g. radeon_set_context_reg is nicer and looks consistent next to
radeon_emit().
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 0da159ecacbc2dc89e7866679912fdc3e73e20a1 |
|
30-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: rename and precalculate polygon offset states
one less calloc and state construction while drawing
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 45e549fcbc8c2454e242155f0cf4c21360f0b958 |
|
30-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: convert CB_TARGET_MASK setup to an atom
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 8a67e78bb8f66a5a142222fdb4d193da1a03ed22 |
|
30-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't set VGT_VTX_CNT_EN twice in init_config
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| e21418f221f645397847c867b5f368ad0753e6fe |
|
29-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: convert stencil ref state into an atom
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| c44de3097925e0d7b4f310432448a62a681189d5 |
|
29-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: convert blend color state into an atom
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 74aa64876b54bc2d0088bc9ed2d390eaa2b73349 |
|
29-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: convert sample mask state into an atom
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 12b205341acd2d95887099e14a217902fe21a476 |
|
29-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: convert clip state into an atom
Reducing calloc overhead.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 0c2eed0edec877584c9362bd9cb9004ff10a8b91 |
|
29-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: avoid redundant CB and DB register updates
The main idea is to avoid setting CB_COLORi_INFO = 0 for i>0 repeatedly
when those colorbuffers aren't used. This is mainly for glamor.
Same for DB. Z_INFO and STENCIL_INFO need to be cleared only once.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 2fe040ee61d3c08e8d38c3552ad4e7b5060074a1 |
|
29-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: initialize atom IDs for external atoms
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 5bb0ad7ccc74e3aa69a1d55d2f7935587288312c |
|
28-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: call si_init_atom for remaining radeonsi atoms
I need to initialize more atom IDs.
This adds 4 more si_init_atom calls, which simplifies the code.
(si_init_atom needs a different context type of the emit functions though)
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| e191c58324ebd5c37223a5a2c16701d236bd9cb4 |
|
28-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: initialize atom IDs
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 8a97528b3a97a430a887e9044b938b349585f4ab |
|
28-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: optimize viewport states
same as scissors
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f6a10f60b75821c20ce7cf338b519b92ed0330fc |
|
28-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: optimize scissor states
- convert 16 states to 1 atom
- only emit 1 scissor if VIEWPORT_INDEX isn't written
- use only one packet when emitting consecutive scissors
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 02c8e06497c14bed37dc1780585348bb2675cab6 |
|
28-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add SI_MAX_ATTRIBS
PIPE_MAX_ATTRIBS is 32, but we currently only support 16.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 08775a219628611989ab87c621255ac3c841dcda |
|
30-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: set all 16 viewport Z bounds for GL 4.1
Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 9b510a9652297a63677f1d55b2bf444694fd94e1 |
|
29-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix a Unigine Heaven hang when drirc is missing
Cc: 10.6 11.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 7dc8a3497fdf0fbd8ff4381712a54c2cd94bfbfc |
|
25-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't use the emit qt keyword in si_init_atom
It confuses my editor.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f47c59322e614d6304091207fc81cfa5beba6ea9 |
|
10-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: revert a wrong DB bug workaround for VI
The bug was misunderstood. Besides that, the bug affects a DB feature we
don't use yet.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 767ad50a10d01274b1d1a877add12b5552ba6984 |
|
29-Jul-2015 |
Alex Deucher <alexander.deucher@amd.com> |
radeonsi: add support for FIJI (v4)
v2: incorporate comments from Marek
v3: add missing fiji case in winsys init
use tonga raster config (double check this)
v4: rebase on harvest patch
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v3)
Reviewed-by: Christian König <christian.koenig@amd.com> (v3)
Reviewed-by: David Zhang <david1.zhang@amd.com> (v3)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| d69686f1d375c3a65a4398f69da843e833987b0e |
|
09-Jul-2015 |
Alex Deucher <alexander.deucher@amd.com> |
radeonsi: add harvest support for CI/VI parts (v3)
Properly calculate the PA_SC_RASTER_CONFIG[_1] settings
for harvest chips.
v2: - fix default raster config settings for CZ and KV
- Suggestions from Michel
v3: - handle multiple packers properly for CI+
- GRBM_GFX_INDEX is privileged on VI+
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> (v2)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f0e24a7beae57f24501fa9d3b6b947fc20ca23bb |
|
10-Jun-2015 |
Alex Deucher <alexander.deucher@amd.com> |
radeonsi: properly handler raster_config setup on CZ
Need to take into account the number of RBs.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 649975e7162cc4ee0586ee76d24321cd7250581f |
|
10-Jun-2015 |
Alex Deucher <alexander.deucher@amd.com> |
radeonsi: properly set the raster_config for KV
This enables the second RB on asics that support it which
should boost performance.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: mesa-stable@lists.freedesktop.org
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 2d1952e2a5abd273983374b420371d263388bb20 |
|
16-Apr-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add VI hardware support
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 8f49f6ed19ba4ee6a26c77786dcbc151c6615d48 |
|
16-Apr-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add VI register definitions
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 8ba70e0a7405005c079eb72f94999245c992aa91 |
|
16-Apr-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix DRM version checks for amdgpu DRM 3.0.0
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 97f58fb59a45f04c9d03709063a081f572509f51 |
|
10-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add support for EXT_depth_bounds_test
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| bfac8ba9d32be351277c7ea814ac9848bdcb1f16 |
|
11-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix polygon offset scale
The value was copied from r300g, which uses 1/12 subpixels, but this hw
uses 1/16 subpixels.
Fixes piglit: gl-1.4-polygon-offset (formerly a glean test)
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Cc: mesa-stable@lists.freedesktop.org
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 8ae88105b60be613126ea07492ffd9712e5e71eb |
|
10-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: enable VS_OUT_MISC_SIDE_BUS_ENA
This is recommended for better performance.
Diag tests always enable this.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| e7a52a5cb810de49a8282cb9f9caea5d554c3348 |
|
10-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add support for gl_PrimitiveID in the fragment shader
It must be obtained from the VS.
The GS scenario A must be enabled for PrimID to be generated for the VS.
+ 4 piglits
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 3206d4ed44e761186fee3c679801e57f8ce923cb |
|
09-Aug-2015 |
Grazvydas Ignotas <notasas@gmail.com> |
gallium/radeon: use helper functions to mark atoms dirty
This is analogous to r300_mark_atom_dirty() used by r300, and will
be used by later patches. For common radeon code, appropriate helper
is called through a function pointer.
No functional changes.
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 8118d3719aee5fdf313c33dbf3256dd78ff46bea |
|
03-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: rename enable_s3tc -> enable_compressed_formats
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 08fd736a45c98bd0acd96dfc1a61e6a695d2703c |
|
16-Jul-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: flush if the memory usage for an IB is too high
Picked from the amdgpu branch.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 190a40580fdfccf00db93f5c8f15bbf16914be2c |
|
27-Jul-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix a regression since the resource_copy_region cleanup
Broken since:
46b2b3b - radeonsi: don't change pipe_resource in resource_copy_region
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91444
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 3c73c418713adec52389e2723e38bf47df13a24b |
|
20-Jul-2015 |
Dave Airlie <airlied@redhat.com> |
radeonsi: add GS multiple streams support (v2)
This is the final piece for ARB_gpu_shader5,
The code is based on the r600 code from Glenn Kennard,
and myself.
While developing this, I'm not 100% sure of all the calculations
made in the GS registers, this is why the max_stream is worked
out there and used to limit the changes in registers. Otherwise
my initial attempts either regressed GS texelFetch tests
or primitive-id-restart. The current code has no regressions
in piglit.
This commit doesn't enable ARB_gpu_shader5, since that just
bumps the glsl level to 4.00, so I'll just do a separate patch
for 4.10.
v1.1: fix bug introduced in rebase.
v2: Address Marek's review comments,
remove my llvm stream code for simpler C,
move gsvs_ring and gs_next_vertex to arrays.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 12df9a7876ed0e6cfffb7871dc37bf66c95edca3 |
|
22-Feb-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: update invariant registers for tessellation
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| db267a04ceee51ca1698c3a68127508fa1e31c86 |
|
18-May-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement a fixed-function tessellation control shader and its state
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 0aa2446e2c18e4a54ccf8555a8ff3426e4eb3ded |
|
16-Jul-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: remove switch statement in si_create_context
and make si_init_config static
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 46b2b3bda8d962fce02838e09c742ac06fbec45f |
|
16-Jul-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't change pipe_resource in resource_copy_region
Copied from r600g. pipe_resource can be shared by multiple threads, so we
shouldn't change it.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 556dd4af76ca0be9b0698139c06e6d12d52e8ff3 |
|
25-Jun-2015 |
Dave Airlie <airlied@redhat.com> |
radeonsi: add support for geometry shader invocations.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 7e5064360c03b8dbdd60298b46e1595418c6cea3 |
|
25-Jun-2015 |
Dave Airlie <airlied@redhat.com> |
radeonsi: add support for viewport array (v3)
This isn't pretty and I'd suggest it the pm4 interface builder
could be tweaked to do this more efficently, but I'd need
guidance on how that would look.
This seems to pass the few piglit tests I threw at it.
v2: handle passing layer/viewport index to fragment shader.
fix crash in blit changes,
add support to io_get_unique_index for layer/viewport index
update docs.
v3: avoid looking up viewport index and layer in es (Marek).
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 56e38edc960bf08213cdb0282838ccec3e5ea10e |
|
26-May-2015 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Add CIK SDMA support
Based on the corresponding SI support. Same as that, this is currently
only enabled for one-dimensional buffer copies due to issues with
multi-dimensional SDMA copies.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| e4339bc9886a26d75b924ad045c3ddd003f802c3 |
|
09-May-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add support for PIPE_CAP_TGSI_TEXCOORD
Without it, texcoords are mapped to GENERIC[0..7], PointCoord is mapped to
GENERIC[8], and user-defined varyings start from GENERIC[9]. Since texcoords
can only be used between VS and PS, and PointCoord is PS-only, it's silly to
always start from GENERIC[9] in all other shaders (such as LS, HS, ES, GS).
This adds support for TEXCOORD and PCOORD semantics. As a result, st/mesa
will use GENERIC[0] as a base for user-defined varyings, which should make
linking ES and GS as well as tessellation shaders at runtime easier.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a582b22c6382f24d921e9fe8a24917100c1396f1 |
|
16-Apr-2015 |
Marek Olšák <marek.olsak@amd.com> |
winsys/radeon: add a private interface for radeon_surface
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| db2415189a04fd64106a739c635b1433192ef969 |
|
16-Apr-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: set an optimal value for DB_Z_INFO.ZRANGE_PRECISION
Required because of a VI hw bug.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| bed98eef9a29af39520002e4ac1525ae0e3859cd |
|
16-Apr-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: remove deprecated and useless registers
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 1f4bb3826464e2ce1d3f47183c96e6e7fde9a1d7 |
|
15-Mar-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't emit PA_SC_LINE_STIPPLE after every rasterizer state change
Do it only when the line stipple state is changed.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f5832f3f9dd0ac0b401d351acab19425fe3c1187 |
|
15-Mar-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move PA_SU_SC_MODE_CNTL to rasterizer state
This requires enabling the optional GL provoking vertex behavior for quads.
+ some cosmetic changes, so that the register is set exactly the same as
on r600.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 98a23982227dce29b015dcb5a867d05f2bee4388 |
|
15-Mar-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement line and polygon smoothing
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 4f20a8f278aa92fb0dc6abc6998171b3ddea7dc1 |
|
15-Mar-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: split sample locations into its own state atom
Sample locations are not updated as often as framebuffers.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f7796a966d20b04c00025bdc170883f4179a5697 |
|
15-Mar-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add basic code for overrasterization
This will be used for line and polygon smoothing.
This is GCN-only even though it's in shared code.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 4eb0ccf9e7902a0b1c9b691fa37852f31cb2befc |
|
22-Feb-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: simplify obtaining a shader property in si_emit_clip_regs
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 93daf5a2f6218ab086add878fce8e423899e1cc5 |
|
20-Feb-2015 |
Marek Olšák <marek.olsak@amd.com> |
r600g,radeonsi: cleanup of hex literals
0x3F800000 -> fui(1.0)
0x00000000 -> 0
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| fa913a2dc6aefabdb9c6e927ad7095e89ffe0211 |
|
20-Feb-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: set PA_SU_HARDWARE_SCREEN_OFFSET to 0
It was probably 0 already, but it doesn't hurt to set it.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 2ead74888a70481aa40b5b6ede42279e1917e66c |
|
15-Feb-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix a crash if a stencil ref state is set before a DSA state
+ minor indentation fixes
Discovered by Axel Davy.
This can't be reproduced with any app, because all state trackers set a DSA
state first.
Cc: 10.5 10.4 10.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Axel Davy <axel.davy@ens.fr>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 6c5af1dc4e7871ddd0383713b9d5382318a34fc9 |
|
31-Jan-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement polygon stippling
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 9af943c32e93ae7fd86f0c00dfd5b0e4c4e2430f |
|
01-Feb-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add support for sampler views where resource = NULL
The hardware obeys swizzles even if the resource is NULL.
This will be used by set_polygon_stipple.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| b142dd2f2474af6479016d5fb5e87b0da015115c |
|
01-Feb-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move the buffer descriptor to the end of the image descriptor
This will allow supporting NULL textures.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 7c9ec6ca7ee30109f0bcf0f3f4bcee6fb30dac81 |
|
29-Dec-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: flush all CB/DB caches unconditionally when changing the framebuffer
This is easier to read and will work better with shader image stores.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a1bbccf5214f95d8e23d6da88f51aae6032cbfe9 |
|
29-Dec-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: change TC cache flushing strategy for textures
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 2bfe9d4538693ebad3c0330a92e432c6c4c5afd3 |
|
29-Dec-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: rename flush flags, split the TC flag into L1 and L2
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a38e8de643fac4990d666cea3da895f9120b9e28 |
|
31-Dec-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: remove unused and not useful variables
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 638fa8016a39db95361922ea63390f34654aef37 |
|
31-Dec-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: remove init config from states
It really doesn't do anything there.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| b3057f8097f88d9072df6d9c09bcc8c039b88a7c |
|
09-Dec-2014 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Don't modify PA_SC_RASTER_CONFIG register value if rb_mask == 0
E.g. this could happen on older kernels which don't support the
RADEON_INFO_SI_BACKEND_ENABLED_MASK query yet. The code in
si_write_harvested_raster_configs() doesn't deal with this correctly and
would probably mangle the value badly.
Cc: "10.4 10.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 15186607bb99c637d2ab28d65e033d470a84b51c |
|
08-Dec-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: take into account NULL colorbuffers when computing CB_TARGET_MASK
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 3291eedfe601b9d09023fb24987ae7d2c7e977c3 |
|
08-Dec-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: only emit line stippling and provoking vertex state when it changes
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| acda2e113a020f9ab32d6d38a07d74f77520f462 |
|
08-Dec-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix SPI state dependency on sprite_coord_enable
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| b472709090c10d17686b0ae5a5112e43ba8ac0c6 |
|
07-Dec-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: emit clip registers only if VS, GS, or rasterizer is changed
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 20e570d1156b76916cd6bf2a0113f548de8c4644 |
|
07-Dec-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move all shader-related functions to a new file si_state_shaders.c
This huge amount of code deserves its own file.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 67dcbcd92cb9877a04747d6cf7fef14c2b8af8b3 |
|
09-Sep-2014 |
Tom Stellard <thomas.stellard@amd.com> |
radeonsi: Program RASTER_CONFIG for harvested GPUs v5
Harvested GPUs have some of their render backends disabled, so
in order to prevent the hardware from trying to render things
with these disabled backends we need to correctly program
the PA_SC_RASTER_CONFIG register.
v2:
- Write RASTER_CONFIG for all SEs.
v3:
- Set GRBM_GFX_INDEX.INSTANCE_BROADCAST_WRITES bit.
- Set GRBM_GFX_INFEX.SH_BROADCAST_WRITES bit when done setting
PA_SC_RASTER_CONFIG.
- Get num_se and num_sh_per_se from kernel.
v4:
- Get correct value for num_se
- Remove loop for setting PA_SC_RASTER_CONFIG
- Only compute raster config when a backend has been disabled.
v5: Michel Dänzer
- Fix computation for chips with multiple SEs
https://bugs.freedesktop.org/show_bug.cgi?id=60879
CC: "10.4 10.3" <mesa-stable@lists.freedesktop.org>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| ff8042270f857e85abe2968bcab1cd742cabb496 |
|
08-Nov-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION
Required by Nine.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Nick Sarnie <commendsarnex@gmail.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 72424061e0722a1444b62af4cdbf03aaaf7e5ee0 |
|
23-Oct-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix polygon mode for points and lines and point/line fill modes
Fixes piglit/polygon-mode-offset.
Cc: 10.2 10.3 mesa-stable@lists.freedesktop.org
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 8ec40adf7eaaf4a107ee76497d69d1479580f711 |
|
22-Oct-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement pipe_rasterizer_state::clip_halfz
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| b9b0973db206bc3d376781e2d06001f2f48dc865 |
|
14-Oct-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: generate shader pm4 states right after shader compilation
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 139bde061a6968671c7119ce78837f144a169abf |
|
14-Oct-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: inline si_pm4_alloc_state
It seemed like the function needed a context pointer. Let's remove it
to make it less confusing.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 34e82005998138504147fd265f87825e4aace31f |
|
04-Oct-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't recompile shaders when changing nr_cbufs from 0 to 1
Both cases are equivalent.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 5e0fbe1b631d883eb0e033938a534a259c8d95fd |
|
04-Oct-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: remove vs.ucps_enabled from the shader key
Written CLIPDIST outputs are simply disabled in PA_CL_VS_OUT_CNTL.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| be0a994fb8689131bf6a717c1e6fa5a42c3d4657 |
|
06-Oct-2014 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Use dummy pixel shader if compilation of the real shader failed
Instead of crashing.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79155#c5
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 0c4bc1e29223ffec4617999c0c03d722bdcc170a |
|
02-Oct-2014 |
Marek Olšák <marek.olsak@amd.com> |
tgsi: change tgsi_shader_info::properties to a one-dimensional array
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
v2: fix svga too
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 10e386f4aa3ef8ce1c60ec5be0865cc61bd093e2 |
|
30-Sep-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: remove interp_at_sample from the key, use TGSI_INTERPOLATE_LOC_SAMPLE
st/mesa has the same flag in its shader key, we don't need to do it
in the driver anymore.
Instead, use TGSI_INTERPOLATE_LOC_SAMPLE, which is what st/mesa sets.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 0a2d6f0c4e2230739aad6b6938925bf91d55d9d4 |
|
30-Sep-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move geometry shader properties from si_shader to si_shader_selector
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 54de7099115502c561f5f51095e08dc0a52c71b7 |
|
30-Sep-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: always compile shaders on demand
The first compiled shader is sometimes useless, because the key doesn't match
the key for the draw call where it's used.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 8860584045f8c534264f9d456bfafdb545d81437 |
|
30-Sep-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: get fs_write_all from tgsi_shader_info directly
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 5233568861b082ee288d845f447012fa47e8bd1e |
|
30-Sep-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: get tgsi_shader_info only once before compilation
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| dc05a9e4e089d66a2ffe8919857ad9660e108c28 |
|
18-Sep-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: properly destroy the GS copy shader and scratch_bo for compute
Cc: 10.2 10.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 1abb1a97b0559b103c4a458def317c6440491a76 |
|
17-Sep-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't pass the context to the shader translator
This should prevent accessing context state there.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| e29353ff20a2761a5a1caeaed78398557797207c |
|
17-Sep-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't snoop currently-bound GS shader when compiling ES
Instead, pass the layout of GS inputs in memory to the ES using the shader
key. Only 64 bits are needed to represent the layout in the key.
Mixing and matching different VS and GS shaders should now always work.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 2774abd4cec70d95cb73f83c2c150e9f5171c50d |
|
16-Sep-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: shorten si_pipe_* prefixes to si_*
This was the original naming convention in r600g and it somehow crept
into radeonsi.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 8c37c16cbc4fd84bbb648cac2189b02633e3f806 |
|
16-Sep-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: merge si_pipe_shader into si_shader
One is part of the other anyway.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 07c0b4d9b779dd43fcd3cfc119b1dc0150ab07d2 |
|
19-Sep-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: disable gl_SampleMask fragment shader output if MSAA is disabled
This fixes piglit: arb_sample_shading-builtin-gl-sample-mask 0
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| b53b1ceb3ee7d96bb6e5238b6bd6358361722aa4 |
|
19-Sep-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: only update MSAA-specific framebuffer state if nr_samples is changed
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| dba4c5baf449108f8d1f910af33998ce3c21b47a |
|
19-Sep-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move DB_SHADER_CONTROL into db_render_state
I will need this for fixing sample shading with 1 sample.
The good news is that all shader pm4 states no longer use the current context
state, so we can generate the pm4 states outside of draw_vbo if needed.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 884f1654e22c2845b388560b297a7c440a68e594 |
|
16-Sep-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move DB registers from draw_vbo into new db_render_state
It's called db_misc_state in r600g.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a75fee78c680054aeb1b96ec25e02dd36286fed5 |
|
27-Aug-2014 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Compile dummy pixel shader on demand
It's never used under normal circumstances.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a10c8db715baa8e12f5267ef2fc59dbb7d191f8d |
|
23-Aug-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement EXPCLEAR optimization for depth
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 573313c94e6925598edb5769885fb973cf628e11 |
|
23-Aug-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement fast depth clear
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 63cb4077e6e7ad761f4aade0095d05d7c06f9f6f |
|
23-Aug-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move DB_RENDER_CONTROL into draw_vbo
So that I can add fast depth clear.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| ab9ad9177981757e7f1d17c61fd123855620c875 |
|
23-Aug-2014 |
Marek Olšák <marek.olsak@amd.com> |
r600g,radeonsi: force fast stencil and HTILE stencil off, fixing a Hyper-Z hang
This should be as fast as no HTILE for stencil. I think we can still get full
performance with depth-only rendering even if stencil is present in the buffer
but not used, but I'm not 100% sure. This may be revisited when HiS and fast
stencil clear are implemented.
This fixes a hang in Brutal Legend.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64471
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 91050ff2154417d7f3a16b582f28c8bbdcea6cfb |
|
19-Aug-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: set DB_DEPTH_SIZE.HEIGHT_TILE_MAX, inline other fields
This fixes rendering to a non-zero layer/face/slice with HTILE.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72685
v2: added the assertion
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a131263a2f19507ca0d2f6093672d930a7c054d1 |
|
16-Aug-2014 |
Emil Velikov <emil.l.velikov@gmail.com> |
gallium/radeon: cleanup header inclusion
- Add top_srcdir/src/gallium/winsys to GALLIUM_DRIVER_C{XXFLAGS}.
- Remove top_srcdir/src/gallium/drivers/radeon from the includes.
As a result:
- Common radeon headers are prefixed with 'radeon/'
- Winsys header inclusion is prefixed 'radeon/drm'
Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 83503f9e68c5b2162682ed5b8691484a6d67aaea |
|
23-Aug-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: handle PIPE_BIND_BLENDABLE
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 94e474f3c3cb9f846c0fd6443d154baa1baeaecb |
|
15-Aug-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: set IA_MULTI_VGT_PARAM on SI the same as on CIK (v2)
Nothing's changed for CIK here.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a3333099796b8aabd72b17c39d8f12b9b5fa501c |
|
18-Aug-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: simplify si_num_banks function
This makes it easier to use.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 7792f9858b60fd9f9f037f1aa15dd21cba30f2c4 |
|
17-Aug-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: save scissor state and sample mask for u_blitter
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| d7d8260f70326cd294715203dae8a8f0150680c1 |
|
13-Aug-2014 |
Grigori Goronzy <greg@chown.ath.cx> |
radeonsi: implement BPTC texture support
Passes all piglit tests.
v2: rebased
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 87a8ed9389bbc49828e711515e0cafc7b9424a30 |
|
11-Aug-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix buffer invalidation of unbound texture buffer objects
This maintains a list of all TBOs in a pipe_context.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 1c03a690bfc3265c7fefa7f87e69782a6672a9b2 |
|
06-Aug-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use gpu_address from r600_resource
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 07c65b85eada8dd34019763b6e82ed4257a9b4a6 |
|
19-Jun-2014 |
Michel Dänzer <michel.daenzer@amd.com> |
r600g/radeonsi: Use write-combined CPU mappings of some BOs in GTT
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| d808de31bd3bac26cdea4d1d9464ad7f010d77d1 |
|
11-Jul-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: only update vertex buffers when they need updating
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 6210d6fdc2ffd2a46c73e64f1a1c443fe015a59e |
|
09-Jul-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: remove nr_vertex_buffers
Unused.
Also inline util_set_vertex_buffers_count and simplify it.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 0ed0bf06961677906c7e2c5250935148dcd9e860 |
|
09-Jul-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move vertex buffer descriptors from IB to memory
This removes the intermediate storage (pm4 state) and generates descriptors
directly in a staging buffer.
It also reduces the number of flushes, because the descriptors no longer
take CS space.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| bea8f2f46dbc07b75762f5b88464580c49177b25 |
|
18-Jun-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move si_set_sampler_views to si_descriptors.c
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| dd46841bc9685b48c972ebe5f5cf92770cf025fd |
|
18-Jun-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move sampler descriptors from IB to memory
Sampler descriptors are now represented by si_descriptors.
This also adds support for fine-grained sampler state updates and
the border color update is now isolated in a separate function.
Border colors have been broken if texturing from multiple shader stages is
used. This patch doesn't change that.
BTW, blitting already makes use of fine-grained state updates.
u_blitter uses 2 textures at most, so we only have to save 2.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 09056b352d6de42d24decafdcd6819ad70dc98f1 |
|
23-Apr-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use an SGPR instead of VGT_INDX_OFFSET
The draw indirect packets cannot set VGT_INDX_OFFSET, they can only set user
data SGPRs. This is the only way to support start/index_bias with indirect
drawing.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a66d9341393b9a82aa197e8bab942c6de1ecf02e |
|
08-Jul-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: assume LLVM 3.4.2 is always present
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| ee2a818d3306170ba18f44342aa759c2892a293f |
|
07-Jul-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: rename definitions of shader limits
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| cf05f9bf016c544fe15b7ac724f78d7524ce61de |
|
04-Jun-2014 |
Grigori Goronzy <greg@chown.ath.cx> |
radeonsi: add sampling of 4:2:2 subsampled textures
This makes 4:2:2 video surfaces work in VDPAU.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 99df120e006dbbce7aaf4b1466db423aa2432e54 |
|
06-May-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: interpolate varyings at sample when full sample shading is enabled
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 99d9d7c0d69c076d84334892ee12f921fe243319 |
|
06-May-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement SAMPLEPOS fragment shader input
The sample positions are read from a constant buffer.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 501fee2511a0a84303319a5e3deacf4959da5b08 |
|
06-May-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement set_min_samples
This is how per-sample shading is enabled.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| fe98bfb2615ff6e57cd66f4fc34dc0d45f6dd7e2 |
|
06-May-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeon: add basic register setup for per-sample shading
Only for Cayman, SI, CIK.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 3aed75c8592e76de05f310118134cfc7cddf4360 |
|
06-May-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeon: split cayman_emit_msaa_state into 2 functions
The other function will be split up from the framebuffer state.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| c5828b0599a5c00ebab488b795c63a21f1dc53cd |
|
14-May-2014 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Fix anisotropic filtering state setup
Bring it back in line with r600g. I broke this in the original radeonsi
bringup. :(
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78537
Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 93c2ebbd83604263fa46351a7efcde382322024b |
|
09-May-2014 |
Tom Stellard <thomas.stellard@amd.com> |
radeonsi: Enable geometry shaders with LLVM 3.4.1
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
CC: "10.1 10.2" <mesa-stable@lists.freedesktop.org>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 74388dd24bc7fdb9e62ec18096163f5426e03fbf |
|
22-Apr-2014 |
Adam Jackson <ajax@redhat.com> |
radeonsi: Don't use anonymous struct trick in atom tracking
I'm somewhat impressed that current gccs will let you do this, but
sufficiently old ones (including 4.4.7 in RHEL6) won't.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 2484daa4fd0d54877175767d98d4d33ef0bac30f |
|
22-Apr-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement ARB_texture_cube_map_array
No LLVM changes needed.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
v2: updated GL3.txt and relnotes
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| aad669b1e90491f7c3951016456e8a2660d91a85 |
|
01-May-2014 |
Samuel Li <samuel.li@amd.com> |
radeonsi: add support for Mullins asics.
v2: name defaults to kabini for older llvm
v3: fix llvm version check
Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 7920adb45caacb7cb72e0a24dcffa52d3b465ea2 |
|
18-Apr-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement GL_ARB_vertex_type_10f_11f_11f_rev
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 360038fa5028b32837580478d36e5ec2c54d8652 |
|
21-Apr-2014 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Fix calculation of number of banks for SI
The way cik_num_banks() was calculating the index only makes sense for
the CIK specific macrotile mode array. For SI, we need to use the tile
mode index directly.
This happened to work most of the time because most of the SI tiling
modes use the same number of banks.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 7489f3eedafbdad905158196873c8b3f5ccb546f |
|
18-Apr-2014 |
Alex Deucher <alexander.deucher@amd.com> |
radeonsi: fix num banks selection on SI for dma setup (v2)
The number of banks varies based on the tile mode index
just like CIK.
Bug:
https://bugs.freedesktop.org/show_bug.cgi?id=77533
v2: fix ordering for nbanks calculation for consistency
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| bc86690f137a71a6f1cdcc0393a4b3f181df7240 |
|
01-Apr-2014 |
Darren Powell <darren.powell@amd.com> |
radeonsi: Added Diag Handler to receive LLVM Error messages
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 5f7faff61bc3ebe80f262fac6f58225d8005631b |
|
04-Apr-2014 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: fix warnings
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 71254732db12c8813c002425b5c1b7c31bf56f65 |
|
17-Mar-2014 |
Niels Ole Salscheider <niels_ole@salscheider-online.de> |
radeonsi: Implement DMA blit
This code is a slightly modified version of evergreen_dma_blit (and
evergreen_dma_copy as well as evergreen_dma_copy_tile).
It would be nice to share some of the code in the long term.
I have reused some "cik"-prefixed functions that also return the right
value for SI. I am not sure if they should be renamed.
v2: Marek> removed gfx.flush in si_dma_copy_tile
Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 4ca3486b195653f875003d335921fd4e7d7c2c4a |
|
08-Mar-2014 |
Marek Olšák <marek.olsak@amd.com> |
r600g,radeonsi: use a fallback in dma_copy instead of failing
v2: - allow byte-aligned DMA buffer copies on Evergreen
- fix piglit/texsubimage regression
- use the fallback for 3D copies (depth > 1) as well
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f549129564e018e21f58483f697cc7073854247b |
|
09-Mar-2014 |
Marek Olšák <marek.olsak@amd.com> |
r600g, radeonsi: fix primitives-generated query with disabled streamout
Buffers are disabled by VGT_STRMOUT_BUFFER_CONFIG, but the query only works
if VGT_STRMOUT_CONFIG.STREAMOUT_0_EN is enabled.
This moves VGT_STRMOUT_CONFIG to its own state. The register is set to 1
if either streamout or the primitives-generated query is enabled.
However, the primitives-emitted query is also incremented, so it's disabled
by setting VGT_STRMOUT_BUFFER_SIZE to 0 when there is no buffer bound.
This fixes piglit:
ARB_transform_feedback2/counting with pause
EXT_transform_feedback/primgen-query transform-feedback-disabled
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a38e1fd78ba406abe6c6dfd665804ec0d8f98172 |
|
06-Mar-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement fast color clear
This works for both multi-sample and single-sample color buffers.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| d3c1be530a9e13378b66fb1ff8760ba0faa1a260 |
|
06-Mar-2014 |
Marek Olšák <marek.olsak@amd.com> |
r600g,radeonsi: move CMASK register values from r600_surface to r600_texture
When doing fast clear for single-sample color buffers for the first time,
a CMASK buffer has to be allocated and the CMASK state in all pipe_surfaces
referencing the color buffer must be updated. Updating all surfaces is kinda
silly, so let's move the values to r600_texture instead.
This is only for Evergreen and later. R600-R700 don't have fast clear.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 61a2fac1996c92c9bfa486723803f9f346c9c9f6 |
|
06-Mar-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: convert the framebuffer state to atom-based
This looks like r600g. The shared Cayman MSAA code is used here.
The real motivation for this is that I need the ability to change values
of color registers after the framebuffer state is set. The PM4 state cannot
be modified easily after it's generated. With this, I can just change
r600_surface::cb_color_xxx and set framebuffer.atom.dirty=true and it's done.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 6a5499b9d972ee6ef0ffc7e2a867113259985c7b |
|
04-Mar-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move framebuffer-related state to a new struct si_framebuffer
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| bee2b96b02161cf75cfe17f7d30d14f2b838423f |
|
20-Feb-2014 |
Marek Olšák <marek.olsak@amd.com> |
r600g,radeonsi: set priorities for relocations
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 678cf9618f252eea209c9f37211dde325223c5ae |
|
09-Mar-2014 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Use proper member name for deleting export shader PM4 state
Fixes double-free with some piglit tests using geometry shaders.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 1a8c66023b0b7679ec7d310707e0dd005540d529 |
|
08-Mar-2014 |
Christian König <christian.koenig@amd.com> |
radeonsi: avoid stale pointers in si_delete_shader_selector
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 472ac0db08011af21174bb35e45858480b866346 |
|
03-Mar-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix blit compressed texture workaround to support 2D arrays
We don't have a piglit test for this, but I think it's correct.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| dff3eccd158d648482bb47118ef5d57a9186e5a4 |
|
23-Feb-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move translate_colorswap to common code
Also translate the Y__X swizzle.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 9855477e903e00f7457adb15594048416444b992 |
|
09-Feb-2014 |
Marek Olšák <marek.olsak@amd.com> |
r600g,radeonsi: consolidate create_surface and surface_destroy
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 80eb377a37c8172c918fd76d162876dcc4ac59ca |
|
09-Feb-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: compute depth surface registers only once
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 629b019a40f3419b858a9591a2035f9eae45c836 |
|
09-Feb-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: compute color surface registers only once
Same as r600g.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 40b9812a761ce0745d9e17b92fd0abd27eb86bd7 |
|
09-Feb-2014 |
Marek Olšák <marek.olsak@amd.com> |
r600g,radeonsi: share r600_surface
I'm gonna use this in radeonsi.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 933eaeee25f1a6a0377f194adb1ce698ff638e84 |
|
09-Feb-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move PA_SU_POLY_OFFSET_DB_FMT_CNTL to framebuffer state
It doesn't depend on anything else.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| b4e14931a941f24dbd11d24653754acb48a95963 |
|
22-Jan-2014 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Pass VS resource descriptors to the HW ES shader stage as well
This makes sure constants and samplers work in the vertex shader even
when a geometry shader is active.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| d88a3752294444fc92f25fa6ca5bf4209f0e4266 |
|
17-Jan-2014 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Simplify shader PM4 state handling
Just always bind the current states before drawing.
Besides the simplification, as a bonus this makes sure the VS hardware
shader stage always uses the GS copy shader when a geometry shader is
active, fixing a number of GS related piglit tests.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 7b19c391f478769bf5111faef3d2aee66c2cfab0 |
|
09-Jan-2014 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Also export clip distances with geometry shader
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 404b29d765e2fe4d2bf80d17063e5672d2d59ca1 |
|
21-Nov-2013 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Initial geometry shader support
Partly based on the corresponding r600g work by Vadim Girlin and Dave
Airlie.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 7209703432ef88daf7ec67b7eeb80577fcb60ef7 |
|
22-Jan-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: cleanup includes, add missing license
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 8a4d7c296f6c9e55b72885ae9d1842eb959e0cf0 |
|
22-Jan-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move some inline functions from si_pipe.h to si_state.c
And si_tex_aniso_filter is unused.
v2: remove INLINE occurences
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 62d55c0a2d96cf482f955bc841006c2ac1e0d867 |
|
22-Jan-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use queries from r600g
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a8930adbf82560f502e77f818bea5acd6b4ea4ec |
|
13-Jan-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use hardware scissors correctly
Use the WINDOW and VPORT scissors for the framebuffer and scissor test,
respectively. The other two scissors are disabled (they cover the max fb size).
We actually have 16 VPORT scissors, which will map well to ARB_viewport_array.
Also, we don't need to write SC_WINDOW_OFFSET with this commit, because it's
disabled everywhere.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| aa7ae4fd6e24ba7f2b687e3f3c4301919830750b |
|
11-Jan-2014 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Rename the commonly occurring rscreen variable.
The "r" stands for R600.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 8662e66bf237a820a704df112718be599136098b |
|
11-Jan-2014 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Rename the commonly occurring rctx/r600 variables.
The "r" stands for R600.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 0b57fc15e13ee6b1f8271927b7334a7ea280624b |
|
11-Jan-2014 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Rename R600->SI in some remaining defines.
I had previously considered that unsafe.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 45578def716f17e4588c6567a5fb3b6dc9569aec |
|
07-Jan-2014 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Rename r600->si for functions in si_pipe.h.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f2a21ed8b9aeb08d019a5aabaf6c581303254308 |
|
07-Jan-2014 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Rename r600->si for functions in si_resource.h.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a88f46bc9b9a940e3126c011b43aabde754f0486 |
|
07-Jan-2014 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Rename r600->si for structs in si_resource.h.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 238aeabce0e5cfd850279a68fe0c816adc175294 |
|
11-Jan-2014 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Rename r600->si for structs in si_pipe.h.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 786af2f963925df2c2a6fb60b29a83e8340f03c7 |
|
04-Jan-2014 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Apply si_* file naming scheme.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a86de9a72f229e1833af93f5d51023a1dec3af1e |
|
08-Jan-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: handle NULL colorbuffers correctly
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 346b6abab9d0ec2d3aec6efe5a4bb03803666c2f |
|
05-Jan-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: calculate NUM_BANKS for DB correctly on CIK
NUM_BANKS is not constant on CIK.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| bf3c3611130112062470299c154df2610633683a |
|
27-Dec-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: set correct pipe config for Hawaii in DB
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 2efe7927d38983029784825fc4897e9b77aa237e |
|
21-Dec-2013 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Use htile_buffer for depth only when there is no stencil.
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| d58090500017dccec9e0991318881057455bc367 |
|
19-Dec-2013 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Only scan pixel shaders for TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS
It's not relevant for other shader types.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 37c24e6d867606e176a5164fc7ef1857862e76f8 |
|
17-Dec-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: set CB_DISABLE if the color mask is 0
Also needed for the DB in-place decompression according to hw docs.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 3352ff97c29a4ff3de594504886765a603899739 |
|
17-Dec-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add the htile buffer to the CS ioctl buffer list
This may fix the GPU crashes.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 2b404a650493514896b345e70713c1c3bbe58a26 |
|
17-Dec-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: improve HiZ precision for less and lequal depth functions
r600g needs this too.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 1a63f278f2d312937a6d429c2b39db5307fb46ab |
|
17-Dec-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: make DB_RENDER_OVERRIDE an invariant register
All this cruft was ported from r600g and isn't needed on SI and later
according to hw docs. If we implemented HiS, we would set it to 0.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 249cb511c54d40a762c862a7e378a362db4a1ca0 |
|
17-Dec-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: flush HTILE when appropriate
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 2eb321b992183bfa7a84209ff059f1e2b902247e |
|
05-Dec-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move invariant regs to si_init_config
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 7fa8fb7382285797c34ef498da7a3a4cf3a85ebe |
|
04-Dec-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix binding the dummy pixel shader
This fixes valgrind errors in glxinfo.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| cd86f773a7ca13fa1d74e6287cc8ad0e0bd4c153 |
|
04-Dec-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use the colorbuffer count from the shader key
As a result, the initialization of write_all must be done before
the compilation.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 8ee7370c9bed0be40c5d134f0b92eb3782c6b7e9 |
|
07-Dec-2013 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Write htile state to hardware.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| d52791a708760dd114a53137caad211dc7cc4dfc |
|
21-Nov-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add driver support for layered rendering and AMD_vertex_shader_layer
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 751e8697f2099a0ceaba09e0d8775e4636f209b1 |
|
20-Nov-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement MSAA for CIK
There are also some changes to the printfs.
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f5778f152b250cb233f4bee021baae916e504afe |
|
24-Sep-2013 |
Alex Deucher <alexander.deucher@amd.com> |
radeonsi: add support for Hawaii asics (v2)
Update additional register fields.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a767f57a7d755944a3f3db853767cac727ae761a |
|
31-Oct-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement ARB_vertex_type_2_10_10_10_rev
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 6a250877eaea932e2bddd35ba694e4dc38cc57cc |
|
31-Oct-2013 |
Marek Olšák <marek.olsak@amd.com> |
r600g,radeonsi: properly expose texture buffer formats
This exposes GL_ARB_texture_buffer_object_rgb32.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| dbeedbb7ab47398b67a10c6ab81acd1bec6f0edd |
|
31-Oct-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement texture buffer objects
GLSL 1.40 is done.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 2fd42001231b70ba1764b1455d642037d2d5fff5 |
|
25-Oct-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement uniform buffer objects
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| e5f0080d912d9231773a087c9f3e3a55136c467a |
|
30-Oct-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: try to fix IA_MULTI_VGT_PARAM programming
This doesn't make any difference on Bonaire, but it might help on Hawaii.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a3ed98f7aa85636579a5696bf036ec13e5c9104a |
|
08-Oct-2013 |
Brian Paul <brianp@vmware.com> |
gallium: new, unified pipe_context::set_sampler_views() function
The new function replaces four old functions: set_fragment/vertex/
geometry/compute_sampler_views().
Note: at this time, it's expected that the 'start' parameter will
always be zero.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Emil Velikov <emil.l.velikov@gmail.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 453ea2d309c0314bea8a209f536e2b3c2c4d92c6 |
|
13-Oct-2013 |
Vadim Girlin <vadimgirlin@gmail.com> |
radeonsi: pass alpha_ref value to PS in the user sgpr
Currently it's hardcoded in the shader, so every change requires
compilation of the shader variant, killing the performance
in Serious Sam 3 and probably other apps.
This patch passes alpha_ref in the user sgpr and removes it from
the shader key.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| ec922ef98797c0dcd33b5f88a3a6eafff79a0831 |
|
08-Oct-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: draw register fixes for CIK
This doesn't fix any known issue. I'm just following the docs.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| b181be626634cea2dab5d3b298a8f2e7fbbfa643 |
|
04-Oct-2013 |
Brian Paul <brianp@vmware.com> |
radeonsi: Fix build
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
https://bugs.freedesktop.org/show_bug.cgi?id=70106
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 27c054edf0ae92c8c498830e7c7510fa94f5dcfd |
|
12-Sep-2013 |
Brian Paul <brianp@vmware.com> |
radeon: don't use old bind_vertex/fragment_sampler_states() hooks
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 8280b29d7c9fa472e2e7e10e5f920e04075186e2 |
|
12-Sep-2013 |
Brian Paul <brianp@vmware.com> |
radeon: implement pipe_context::bind_sampler_states()
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 1bb77f81db0ed3d1b3dd14c055ff7a9679399bb1 |
|
22-Sep-2013 |
Marek Olšák <marek.olsak@amd.com> |
r600g,radeonsi: consolidate tiling_info initialization
and the util_format_s3tc_init calls too.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 2814202ef4d6a429602c3524c2a1001e34d2068f |
|
22-Sep-2013 |
Marek Olšák <marek.olsak@amd.com> |
r600g,radeonsi: share the async dma interface
r600_texture.c is one step closer to r600g.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| e9162672850548310bd29fa6f0f924e4e8767af1 |
|
21-Sep-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move radeonsi-specific functions out of r600_texture.c
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 57f38e9f921bcfac0087765b4acb2c258604ea29 |
|
24-Sep-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix blitting the last 2 mipmap levels of compressed textures
This fixes compressedteximage piglit tests.
+10 piglits
Evergreen and Cayman have the same issue. R600 and R700 don't.
Cc: "9.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 296adb6de96e697a4bf0c78524da5320489d2662 |
|
23-Sep-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add missing colorbuffer formats (rework format translation)
This fixes some piglits, e.g:
spec/!OpenGL 3.0/required-renderbuffer-attachment-formats.
This can be ported to r600g.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f9ea435ebc9360e186e44fc4e9c155dc073fe8ac |
|
23-Sep-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: bypass alpha-test for integer colorbuffers
Fixes spec/EXT_texture_integer/fbo-blending.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| d2bd63433a252c84488023e9877e70d69223da42 |
|
18-Sep-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: simplify and fix MSAA texture sampling for array textures
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 9d16e70b3f95ea632a0442458c0d5027a8b42d36 |
|
26-Aug-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement glDrawTransformFeedback functionality
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| e4c5d3ee27e125a20b4899b0c95f517d4e2f07e9 |
|
18-Aug-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: handle rasterizer_discard and set GS_OUT_PRIM_TYPE
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 2b0a54d6ecbd31a41679d089c4e4abf8687f2fdc |
|
14-Aug-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: integrate shared streamout state
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 9933b85e122c233ceac7662aec5cf359f888f595 |
|
29-Aug-2013 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Expose pure integer vertex formats
Fixes 20 piglit tests with MESA_GL_VERSION_OVERRIDE=3.0.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a77ee8b548d83614b11bbfb654b031b7d464c3e3 |
|
26-Aug-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: simplify and improve flushing
This mimics r600g. The R600_CONTEXT_xxx flags are added to rctx->b.flags
and si_emit_cache_flush emits the packets. That's it. The shared radeon code
tells us when the streamout cache should be flushed, so we have to check
the flags anyway.
There is a new atom "cache_flush", because caches must be flushed *after*
resource descriptors are changed in memory.
Functional changes:
* Write caches are flushed at the end of CS and read caches are flushed
at its beginning.
* Sampler view states are removed from si_state, they only held the flush
flags.
* Everytime a shader is changed, the I cache is flushed. Is this needed?
Due to a hw bug, this also flushes the K cache.
* The WRITE_DATA packet is changed to use TC, which fixes a rendering issue
in openarena. I'm not sure how TC interacts with CP DMA, but for now it
seems to work better than any other solution I tried. (BTW CIK allows us
to use TC for CP DMA.)
* Flush the K cache instead of the texture cache when updating resource
descriptors (due to a hw bug, this also flushes the I cache).
I think the K cache flush is correct here, but I'm not sure if the texture
cache should be flushed too (probably not considering we use TC
for WRITE_DATA, but we don't use TC for CP DMA).
* The number of resource contexts is decreased to 16. With all of these cache
changes, 4 doesn't work, but 8 works, which suggests I'm actually doing
the right thing here and the pipeline isn't drained during flushes.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Tested-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| aa5c40f97cf5d0609dfb8c0792eca5f6d5108579 |
|
17-Aug-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: convert constant buffers to si_descriptors
There is a new "class" si_buffer_resources, which should be good enough for
implementing any kind of buffer bindings (constant buffers, vertex buffers,
streamout buffers, shader storage buffers, etc.)
I don't even keep a copy of pipe_constant_buffer - we don't need it.
The main motivation behind this is to have a well-tested infrastrusture
for setting up streamout buffers.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Tested-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a81c3e00fee0626e63b1fb8ebb4c2cef3fb23367 |
|
14-Aug-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use r600_common_context, r600_common_screen, r600_resource
Also r600_hw_context_priv.h and si_state_streamout.c are removed, because
they are no longer needed.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Tested-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| b1d05eeb1f14e06ba122857927eb4661621df8f6 |
|
18-Aug-2013 |
Vinson Lee <vlee@freedesktop.org> |
radeonsi: Ensure fmask_format is initialized in release builds.
Fixes "Uninitialized scalar variable" defect reported by Coverity.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 21d9a1b5ef51ce449e9a82641d0d605c5448b41c |
|
16-Aug-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: require LLVM 3.4 for MSAA
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 5550554f1e6087a89a31b418003dde893e5ea4b3 |
|
07-Aug-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: disable unbound colorbuffers
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 356c041167ac96131869622f2a41b3d5b3017f9a |
|
06-Aug-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: port texture improvements from r600g
This started as an attempt to add support for MSAA texture transfers and
MSAA depth-stencil decompression for the DB->CB copy path.
It has gotten a bit out of control, but it's for the greater good.
Some changes do not make much sense, they are there just to make it look
like the other driver.
With a few cosmetic modifications, r600_texture.c can be shared with
a symlink.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f671dfa8aaa90a76b7a426ee83ecd9304ee4fdc8 |
|
06-Aug-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add FMASK texture binding slots and resource setup (v2)
v2: bind FMASK textures to shader resource slots 16..31
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 3c3feb38f44d8512a1a11f9171bf8ca4712f864c |
|
06-Aug-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement FMASK decompression for MSAA texturing
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 2a4b2e23053db846903199ed1a892fe72da70750 |
|
02-Aug-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement MSAA colorbuffer compression for rendering
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 2f1c449415903332489a05e4037b8f3f5aa15342 |
|
30-Jul-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement uncompressed MSAA texturing
This is glBlitFramebuffer support for MSAA surfaces as required by GL 3.0
and texturing as required by GL 3.2 and GL_ARB_texture_multisample.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 6d4755a4d75436fb117b28d18fa19d2461b6621d |
|
30-Jul-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement GL_SAMPLE_ALPHA_TO_ONE
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 07955d4f2b969efb59b9c35c1fba5a0cae2cdc55 |
|
30-Jul-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement uncompressed MSAA rendering and color resolving
This is basic MSAA support which should work with most apps.
Some features are missing, those will be implemented by other commits.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| c8e70e64accc914c58533b8336873e0995e901e7 |
|
06-Aug-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add flexible shader descriptor management and use it for sampler views
It moves all sampler view descriptors to a buffer.
It supports partial resource updates and it can also unbind resources
(required for FMASK texturing).
The buffer contains all sampler view descriptors for one shader stage,
represented as an array. On top of that, there are N arrays in the buffer,
which are used to emulate context registers as implemented by the previous
ASICs (each array is a context).
This uses the RCU synchronization approach to avoid read-after-write hazards
as discussed in the thread:
"radeonsi: add FMASK texture binding slots and resource setup"
CP DMA is used to clear the descriptors at context initialization and to copy
the descriptors from one context to the next.
v2: - use PKT3_DMA_DATA on CIK (I'll test CIK later)
- turn the bool CP DMA parameters into self-explanatory flags
- add a nice simple API for packet emission to radeon_winsys.h
- use 256 contexts, 128 causes texture corruption in openarena
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 2f98dc223f625f6df79268848c46af7f224fe7e9 |
|
08-Aug-2013 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Don't export unused clip distance vectors from vertex shader
E.g. the Source engine seems to always write to gl_ClipVertex, but normally
doesn't enable any GL_CLIP_DISTANCEn states. This change removes some
irrelevant parts from the generated vertex shader code in such cases.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 731c6aa52d0ed23b2f4a7345bca3de6e3f4ffa80 |
|
06-Aug-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: correct sampler function names
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 363b2805f7af8e9f20700eceddb107f0e1cdfa6c |
|
05-Aug-2013 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: rename r600_resource_texture to r600_texture
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 234d81e6b26457a94aae37633c1adc89498bdb4e |
|
07-Jun-2013 |
Alex Deucher <alexander.deucher@amd.com> |
radeonsi: emit PA_SC_RASTER_CONFIG[_1] on cik
Use the golden values for each asic.
Todo: update Kabini and Kaveri.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 9d8ad222c69d70201d6b62eda454e08333e836ad |
|
16-Nov-2012 |
Alex Deucher <alexander.deucher@amd.com> |
radeonsi: PA_CL_ENHANCE is privileged on CIK
Needs to be and is set by the kernel.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f2a9bd80840d5c570689ea1f4ccb648000fc9b88 |
|
07-Jun-2013 |
Alex Deucher <alexander.deucher@amd.com> |
radeonsi: store chip class in the pm4 struct
Will be used for asic specific pm4 behavior.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 3a47f1945ffda1d931790845daa38d370b1833bc |
|
02-May-2013 |
Alex Deucher <alexander.deucher@amd.com> |
radeonsi: properly handle DB tiling setup on CIK
On CIK, DB switches back to using per-surface tiling
parameters rather than the tile index used on SI.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 59e4fe0b7506432bb81cbe524a7e930a25d03c4e |
|
09-Nov-2012 |
Alex Deucher <alexander.deucher@amd.com> |
radeonsi: emit TA_BC_BASE_ADDR_HI for border color on CIK
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 3d831206a4baf2cd36e91ea81ed45ce3c24d0f88 |
|
07-May-2013 |
Tom Stellard <thomas.stellard@amd.com> |
radeonsi/compute: Pass kernel arguments in a buffer v2
v2:
- Fix memory leak in si_set_constant_buffer()
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| eaabb4ead07ae043ecc789024028e225ebd0f318 |
|
24-May-2013 |
Zack Rusin <zackr@vmware.com> |
gallium: Add support for multiple viewports
Gallium supported only a single viewport/scissor combination. This
commit changes the interface to allow us to add support for multiple
viewports/scissors.
Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Reviewed-by: José Fonseca<jfonseca@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 784df2e115d6e047a38715aa509e86403605acc1 |
|
01-May-2013 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Make border colour state handling safe for integer textures
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| e369f40a9b73b905f2cb9c62aff606e0ec2bb3ef |
|
30-Apr-2013 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Fix hardware state for dual source blending
Set up CB_SHADER_MASK register according to pixel shader exports, and enable
some minimal state for colour buffer 1 in case dual source blending is used.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| e3befbca5ed9f22effcdc91c5886c86b644bc190 |
|
15-May-2013 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Handle TGSI_SEMANTIC_CLIPVERTEX
17 more little piglits.
NOTE: This is a candidate for the 9.1 branch.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| eb19163a4dd3d7bfeed63229820c926f99ed00d9 |
|
16-May-2013 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Initial support for multiple constant buffers
Just enough to support an additional internal constant buffer for the user
clip planes.
NOTE: This is a candidate for the 9.1 branch.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 4730dea5f5ddd5f94091aeb423c0e0cce4e64fdb |
|
03-May-2013 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Fix handling of TGSI_SEMANTIC_PSIZE
Two more little piglits.
NOTE: This is a candidate for the 9.1 branch.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 4045c3d0601f1e3280625ed837846ecad5d051f7 |
|
13-May-2013 |
Alex Deucher <alexander.deucher@amd.com> |
radeonsi: add support for hainan chips
Note: this is a candidate for the 9.1 branch
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 2737abb44efebfa10ac84b183c20fc5818d1514e |
|
23-Apr-2013 |
José Fonseca <jfonseca@vmware.com> |
gallium: Replace gl_rasterization_rules with lower_left_origin and half_pixel_center.
Squashed commit of the following:
commit 04c5fa2cbb8e89d6f2fa5a75af1cca03b1f6b852
Author: José Fonseca <jfonseca@vmware.com>
Date: Tue Apr 23 17:37:18 2013 +0100
gallium: s/lower_left_origin/bottom_edge_rule/
commit 4dff4f64fa83b9737def136fffd161d55e4f1722
Author: José Fonseca <jfonseca@vmware.com>
Date: Tue Apr 23 17:35:04 2013 +0100
gallium: Move diagram to docs.
commit 442a63012c8c3c3797f45e03f2ca20ad5f399832
Author: James Benton <jbenton@vmware.com>
Date: Fri May 11 17:50:55 2012 +0100
gallium: Replace gl_rasterization_rules with lower_left_origin and half_pixel_center.
This change is necessary to achieve correct results when using OpenGL
FBOs.
Reviewed-by: Marek Olšák <maraeo@gmail.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| d0e9aaa31cb13404914aea292879739d4044f856 |
|
08-Apr-2013 |
Jerome Glisse <jglisse@redhat.com> |
radeonsi: add support for compressed texture v2
Most test pass, issue are with border color and swizzle.
Based on ircnick<maelcum> patch.
v2: Restaged commit hunk
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| dc21e30a6283629bed6db282caff0af13f3b88ec |
|
22-Mar-2013 |
Jerome Glisse <jglisse@redhat.com> |
radeonsi: add 2d tiling support for texture v3
v2: Remove left over code
v3: Restage properly the commit so hunk of first one are not in
second one.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a0dca4409a25b7810c28bcd64b48b3f0f159a455 |
|
22-Mar-2013 |
Christian König <christian.koenig@amd.com> |
radeonsi: add instance divisor support v3
v2: reduce key size, don't copy key around to much.
v3: remove key size reduction
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 35c522dce461a7d18a471e681413781da702d4b0 |
|
21-Mar-2013 |
Marek Olšák <maraeo@gmail.com> |
radeonsi: fix crash while binding a NULL constant buffer
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f5298b0a65bbbd9a0eba703dd39b121a74dc200c |
|
28-Feb-2013 |
Christian König <christian.koenig@amd.com> |
radeonsi: switch to using resource destribtors for constants v2
v2: remove superfluous mask, use buffer_size instead of constant
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f987d23b28491bd7b0552bd9daffa53a8e073c71 |
|
24-Feb-2013 |
Vinson Lee <vlee@freedesktop.org> |
radeonsi: Fix memory leak in si_set_constant_buffer.
Fixes resource leak defect reported by Coverity.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 3447cc48565efb8a0acbe60cb648cc34c5dfd172 |
|
18-Feb-2013 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Don't pretend there is any R8G8B8 support
The hardware can't do it.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 18272c9b1b530ad6d2091b647c062793f94b5351 |
|
13-Feb-2013 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Fix up and enable flat shading.
Requires corresponding LLVM R600 backend fix to work correctly, but even
without that it doesn't hang anymore.
13 more little piglits.
Depends on LLVM: r175193, r175733
NOTE: This is a candidate for the 9.1 branch.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 0d51906c0754b1c1a2964af50c55306bce9ab224 |
|
20-Feb-2013 |
Vinson Lee <vlee@freedesktop.org> |
radeonsi: Fix memory leak in si_shader_select.
Fixes resource leak defect reported by Coverity.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 95bced59293bc3dffad955b714c142455aa05aa8 |
|
18-Feb-2013 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Fix blending using destination alpha factor but non-alpha destination
11 more little piglits.
NOTE: This is a candidate for the 9.1 branch.
Reviewed-by: Marek Olšák <maraeo@gmail.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 9c1107b3e1a4f9f932728d53a8a7961ac948521e |
|
15-Feb-2013 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Fix PIPE_FORMAT_X32_S8X24_UINT sampler hardware format
4 more little piglits.
NOTE: This is a candidate for the 9.1 branch.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 8356962853727136f3316ed227fb7bfe98e2f2bd |
|
15-Feb-2013 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Use stencil surface level information for stencil texturing
7 more little dwarves^W piglits.
NOTE: This is a candidate for the 9.1 branch.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f9adf7987601197641cd0d851e47b45c5c416f00 |
|
15-Feb-2013 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: properly implement S8Z24 depth-stencil format
Based on r600g commit 2b9659c9e627ad03160899b8be04f96307d098eb .
Fixes crashes with 4 piglit tests which are now hitting these formats.
NOTE: This is a candidate for the 9.1 branch.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f34ad857658c93c8f42bd2ed77033e2dfb2540e3 |
|
12-Feb-2013 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Fix array indices for detecting integer vertex formats
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| c093f12406d3e6e053ed1f6f9b552cd696053748 |
|
05-Feb-2013 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Handle scaled and integer formats for samplers and vertex elements.
Also, add assertions to stress that render targets don't support scaled
formats.
20 more little piglits.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 23405ef4679301a36694ffecbeaef38e3c7650fa |
|
05-Feb-2013 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Don't advertise PIPE_FORMAT_L8A8_SRGB support.
The hardware can't do it.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 9ba1e23647c09290c98cc7133fb73dd1df1da8ab |
|
26-Jan-2013 |
Marek Olšák <maraeo@gmail.com> |
radeonsi: use new RGBX formats
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| af0af75881ea99452086afd6907780de77af6e96 |
|
25-Jan-2013 |
Alex Deucher <alexander.deucher@amd.com> |
radeonsi: default PA_SC_RASTER_CONFIG to 0
That should work in all cases.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Note: this is a candidate for the 9.1 branch.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 83e4407f443fb6baeccf9aefee291c82adcaa58b |
|
25-Jan-2013 |
Alex Deucher <alexander.deucher@amd.com> |
radeonsi: add support for Oland chips
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Note: this is a candidate for the 9.1 branch
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 6455d40b7ec09e3a3923c9b78952dc29627afed1 |
|
25-Jan-2013 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Remove spurious traces of R16G16B16 support.
The hardware can't do it, and these were causing warnings in some piglit tests.
NOTE: This is a candidate for the 9.1 branch.
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| de4e448095662611e27dce98059a77f14d647401 |
|
22-Jan-2013 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Handle PIPE_FORMAT_L32A32_S/UINT for rendering.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| d0096dfa85a176c387701a035cfc21d55f615ed6 |
|
22-Jan-2013 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Make sure to use float number format for packed float colour formats.
These aren't covered by UTIL_FORMAT_TYPE_FLOAT.
Fixes 15 piglit (sub)tests.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 6f6112a2b982462667ba36a6f3ba381558780e8a |
|
17-Jan-2013 |
Marek Olšák <maraeo@gmail.com> |
radeonsi: More assorted depth/stencil changes ported from r600g.
[ Squashed port of the following r600g commits: - Michel Dänzer ]
commit 428e37c2da420f7dc14a2ea265f2387270f9bee1
Author: Marek Olšák <maraeo@gmail.com>
Date: Tue Oct 2 22:02:54 2012 +0200
r600g: add in-place DB decompression and texturing with DB tiling
The decompression is done in-place and only the compressed tiles are
decompressed. Note: R6xx-R7xx can do that only with Z16 and Z32F.
The texture unit is programmed to use non-displayable tiling and depth
ordering of samples, so that it can fetch the texture in the native DB format.
The latest version of the libdrm surface allocator is required for stencil
texturing to work. The old one didn't create the mipmap tree correctly.
We need a separate mipmap tree for stencil, because the stencil mipmap
offsets are not really depth offsets/4.
There are still some known bugs, but this should save some memory and it also
improves performance a little bit in Lightsmark (especially with low
resolutions; tested with Radeon HD 5000).
The DB->CB copy is still used for transfers.
commit e2f623f1d6da9bc987582ff68d0471061ae44030
Author: Marek Olšák <maraeo@gmail.com>
Date: Sat Jul 28 13:55:59 2012 +0200
r600g: don't decompress depth or stencil if there isn't any
commit 43e226b6efb77db2247741cc2057d9625a2cfa05
Author: Marek Olšák <maraeo@gmail.com>
Date: Wed Jul 18 00:32:50 2012 +0200
r600g: optimize uploading depth textures
Make it only copy the portion of a depth texture being uploaded and
not the whole 2D layer.
There is also a little code cleanup.
commit b242adbe5cfa165b252064a1ea36f802d8251ef1
Author: Marek Olšák <maraeo@gmail.com>
Date: Wed Jul 18 00:17:46 2012 +0200
r600g: remove needless wrapper r600_texture_depth_flush
commit 611dd529425281d73f1f0ad2000362d4a5525a25
Author: Marek Olšák <maraeo@gmail.com>
Date: Wed Jul 18 00:05:14 2012 +0200
r600g: init_flushed_depth_texture should be able to report errors
commit 80755ff56317446a8c89e611edc1fdf320d6779b
Author: Marek Olšák <maraeo@gmail.com>
Date: Sat Jul 14 17:06:27 2012 +0200
r600g: properly track which textures are depth
This fixes the issue with have_depth_texture never being set to false.
commit fe1fd675565231b49d3ac53d0b4bec39d8bc6781
Author: Marek Olšák <maraeo@gmail.com>
Date: Sun Jul 8 03:10:37 2012 +0200
r600g: don't flush depth textures set as colorbuffers
The only case a depth buffer can be set as a color buffer is when flushing.
That wasn't always the case, but now this code isn't required anymore.
commit 5a17d8318ec2c20bf86275044dc8f715105a88e7
Author: Marek Olšák <maraeo@gmail.com>
Date: Sun Jul 8 02:14:18 2012 +0200
r600g: flush depth textures bound to vertex shaders
This was missing/broken. There are also minor code cleanups.
commit dee58f94af833906863b0ff2955b20f3ab407e63
Author: Marek Olšák <maraeo@gmail.com>
Date: Sun Jul 8 01:54:24 2012 +0200
r600g: do fine-grained depth texture flushing
- maintain a mask of which mipmap levels are dirty (instead of one big flag)
- only flush what was requested at a given point and not the whole resource
(most often only one level and one layer has to be flushed)
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| bc398f908f8765edee48150dc7e3f24874bb03d9 |
|
15-Jan-2013 |
Vadim Girlin <vadimgirlin@gmail.com> |
radeonsi: improve flushed depth texture handling
Use r600_resource_texture::flished_depth_texture for GPU access, and
allocate it in the VRAM. For transfers we'll allocate texture in the GTT
and store it in the r600_transfer::staging.
Improves performance when flushed depth texture is frequently used by the
GPU, e.g. in Lightsmark
[ Ported from r600g commit 37708479608af877986b76302a9c92611d1e23d0 ]
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| bfb405ceee3843ab7fa9ec03919939ff69e2a373 |
|
15-Jan-2013 |
Marek Olšák <maraeo@gmail.com> |
radeonsi: Assorted depth/stencil changes ported from r600g.
[ Squashed port of the following r600g commits: - Michel Dänzer ]
commit c1e8c845ea9c6f843cc5bba5974668c007799bbc
Author: Marek Olšák <maraeo@gmail.com>
Date: Sat Jul 7 19:10:00 2012 +0200
r600g: inline r600_hw_copy_region
commit 4891c5dc64ccd8cf2bf8a8550ae23e1a61806a7d
Author: Marek Olšák <maraeo@gmail.com>
Date: Mon Jun 25 22:53:21 2012 +0200
r600g: inline r600_blit_push_depth and use resource_copy_region
We are going to have a separate resource for depth texturing and transfers
and this is just a transfer thing.
commit da98bb6fc105e1a2f688a1713ca9e50f0ac8fbed
Author: Marek Olšák <maraeo@gmail.com>
Date: Mon Jun 25 12:45:32 2012 +0200
r600g: split flushed depth texture creation and flushing
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 90d919fcd0ef5a09a462871cc6b2174db6e82411 |
|
17-Jan-2013 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Fix 1D tiling mode index for non-scanout resources.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 51efb081f7cc1c777d581c5dad5819a98f7f35cb |
|
05-Dec-2012 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Actually keep track if we are using depth textures for samplers.
20-odd more piglits.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 3c92bfe2d22942a529c9c21ef74b8237732807af |
|
15-Jan-2013 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Fix Z24 texture formats.
About half a dozen more piglits.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 1ace200b2b916d4e9696ae7f711578dcdd5d28e0 |
|
21-Dec-2012 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Set SPI_SHADER_COL_FORMAT to what the pixel shader actually exports.
Instead of deriving it from the colour buffer formats only.
Fixes a number of piglit tests which export depth from the pixel shader.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| bc5e65096d2e9ae14b048811315814831427608a |
|
11-Jan-2013 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Use proper hardware format for stencil texturing.
Fixes piglit 'spec/ARB_depth_buffer_float/fbo-clear-formats stencil' crash.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| c408f0c5c4b07eac4bc8759bb8e6ab20f527ded0 |
|
13-Dec-2012 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Consolidate calculation of tile mode index.
Apart from the obvious cleanup, this makes sure all blocks use the same tiling
mode for accessing the resource.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 6e33b55ee16c9885391d3baff33545a5209c0623 |
|
23-Nov-2012 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Reinstate assertions against invalid colour/depth formats.
radeonsi now supports Z16 and doesn't fail these assertions anymore.
This partially reverts commit 7bba4879bb79719e22a18b52759b1d1d839c783c, but
leaves the error messages in place to allow diagnosing such problems even with
non-debugging builds.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| a8d46d017389c287db3e7062e8fdffbbef2ae50d |
|
16-Nov-2012 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Re-enable Z16 depth buffers.
8 more piglits.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| fa83d52961efeb97c4b5d613e51411a784e68478 |
|
20-Nov-2012 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Use explicit stencil mipmap level offsets.
Extracted from r600g commit 428e37c2da420f7dc14a2ea265f2387270f9bee1.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 49003a5cb658751a85383cd6600006e094f453bc |
|
20-Nov-2012 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Fix sampler views for depth textures.
Consistently reference the flushed depth texture in the sampler view, not the
original one.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 26463b89960521dd51d661fd0608e2d665111f1a |
|
16-Nov-2012 |
Alex Deucher <alexander.deucher@amd.com> |
radeonsi: clean up some magic numbers
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| ce17964fe50d36dd13a0688bc59bfe6878142b74 |
|
16-Nov-2012 |
Alex Deucher <alexander.deucher@amd.com> |
radeonsi: emit PA_SC_RASTER_CONFIG
Use per asic golden values.
Programming this register doesn't seem to be strictly
necessary on SI, but programming it wrong leads to
rendering issues or reduced performance so just
go ahead and program the golden values explicitly
to avoid any potential problems down the road.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 7bba4879bb79719e22a18b52759b1d1d839c783c |
|
15-Nov-2012 |
Alex Deucher <alexander.deucher@amd.com> |
radeonsi: remove new asserts and replace with warnings
Fixes piglit regressions.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 3893593732b07c91543530392f44f57fe343d8c4 |
|
15-Nov-2012 |
Alex Deucher <alexander.deucher@amd.com> |
radeonsi: cleanup si_db()
Clean up a few magic numbers and rework the code a bit.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 565c29f221660fbcf9cd49780a9baf937586b768 |
|
15-Nov-2012 |
Alex Deucher <alexander.deucher@amd.com> |
radeonsi: assert the CB format is valid (v2)
Assert the the CB format is valid and default to
the INVALID hw format rather than ~0U when the format
doesn't match for non-debug builds.
v2: use INVALID hw format rather than ~0U
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 34d487b64d467a568d197de8376dcba88418bea1 |
|
15-Nov-2012 |
Alex Deucher <alexander.deucher@amd.com> |
radeonsi: assert that the DB format is valid (v2)
Assert that the DB format is valid and default to
the INVALID hw format rather than ~0U when the format
doesn't match for non-debug builds.
v2: use INVALID hw format rather than ~0U
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 73d9703a9310b8c8ab0defe31598308c9d8b7103 |
|
14-Nov-2012 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Set STENCILOPVAL fields to 1.
This is necessary for backwards compatibility with pre-SI for stencil.
Fixes a number of stencil related piglit tests, and real apps using stencil.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 7708a864648aecd8aafb484ec7db18c2aba9e957 |
|
02-Nov-2012 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Implement alpha testing in pixel shader.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| c5c3d2f9330705dcfd83bbdb6a5460ddc8a0f0e9 |
|
02-Nov-2012 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Implement support for vertex shader samplers.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| e73bf3b805de78299f1a652668ba4e6eab9bac94 |
|
29-Mar-2012 |
Marek Olšák <maraeo@gmail.com> |
gallium: add start_slot parameter to set_vertex_buffers
This allows updating only a subrange of buffer bindings.
set_vertex_buffers(pipe, start_slot, count, NULL) unbinds buffers in that
range. Binding NULL resources unbinds buffers too (both buffer and user_buffer
must be NULL).
The meta ops are adapted to only save, change, and restore the single slot
they use. The cso_context can save and restore only one vertex buffer slot.
The clients can query which one it is using cso_get_aux_vertex_buffer_slot.
It's currently set to 0. (the Draw module breaks if it's set to non-zero)
It should decrease the CPU overhead when using a lot of meta ops, but
the drivers must be able to treat each vertex buffer slot as a separate
state (only r600g does so at the moment).
I can imagine this also being useful for optimizing some OpenGL use cases.
Reviewed-by: Brian Paul <brianp@vmware.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 691f08dbeaeb71bfa26784e7ec18aa07e34893fb |
|
06-Sep-2012 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Handle TGSI_SEMANTIC_BCOLOR.
Put the back face colour right after the front face colour in the LDS parameter
space.
Fixes 18 piglit tests related to two sided lighting.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 44ef033c25ee0dde97a2339d4439560885d52cad |
|
05-Oct-2012 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Don't snoop context state while building shaders.
Let's use the shader key describing the state.
Ported from r600g commit b6521801070d52bdd5908824e82c1ce2dde16e8e.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| dd9274df4f0bd2e13476686bfdd66fcd3239b322 |
|
11-Oct-2012 |
Marek Olšák <maraeo@gmail.com> |
radeonsi: fixup the return type of is_format_supported
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 304beb81bb53f327e835250dc4bf141dff61f535 |
|
29-Sep-2012 |
Alex Deucher <alexander.deucher@amd.com> |
radeonsi: emit PA_SU_PRIM_FILTER_CNTL
has no default value.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f1a3de5e9dd8f965fc99cb33e36643b8e8aac018 |
|
28-Sep-2012 |
Alex Deucher <alexander.deucher@amd.com> |
radeonsi: drop some cayman remnants
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 22ae062fa168866c743e316ca298eb65cdc565e7 |
|
26-Sep-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: define SGPR register numbers
Instead of hardcoding them.
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 7773c7109c9a3b31767fab012183f64b932264a7 |
|
20-Sep-2012 |
Christian Koenig <christian.koenig@amd.com> |
radeonsi: start seperating commands into si_commands.c
Signed-off-by: Christian Koenig <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 04473db38ade5902a6ad49dba8ca8215599d57be |
|
14-Sep-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: start reworking inferred state handling
Instead of tracking the inferred state changes separately
just check if queued and emitted states are the same.
This patch just reworks the update of the SPI map between
vs and ps, but there are probably more cases like this.
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 7443e4e697c0517f505d83436dcbe1fd01c1c39e |
|
12-Sep-2012 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Properly handle NULL sampler views.
Fixes piglit shaders/glsl-fs-uniform-sampler-array and many other similar
tests.
In fact, I just completed a piglit quick-driver.tests run without any GPU
lockups or even VM protection faults. Yay!
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 9ccaa24f8493ebc4e5a606679490e4936ba3c624 |
|
07-Sep-2012 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Texture border colour fixes.
* Handle arbitrary border colours.
* Use correct packing format for detecting special border colours.
Fixes piglit tex-border-1 and probably many other tests using border colours.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 03dfa305968adcf511f822757c106912419d6664 |
|
07-Sep-2012 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Handle NULL sampler states.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 8a497e5955053293959614fcde76ab4908929215 |
|
07-Sep-2012 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Float format fixups.
Fixes piglit spec/ARB_texture_float/fbo-generatemipmap-formats.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 15c009af2853b4da4f390d1f19b2fe3a0b3b8442 |
|
07-Sep-2012 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Handle more SNORM formats.
Fixes piglit spec/EXT_texture_snorm/fbo-generatemipmap-formats (except for
what seems like a random fluke).
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 694617a5b4222aa1fb40e5e16addd7a3120de6a5 |
|
05-Sep-2012 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Handle more L/I/A format cases.
Fixes piglit fbo-generatemipmap-formats.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| cf697e875c58c963f50dc620d11762293e976653 |
|
04-Sep-2012 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Mipmaps require memory footprint to be padded to powers of two.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| b7d96ca35e7652596851fe86d495e82c25ffcb55 |
|
27-Aug-2012 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Sampler view state simplification.
We can always use the offset and tiling mode from level 0 and restrict the
first and last mipmap level to be used in the sampler resource.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| aa5daa61a19d002c48845ad28fd86872b145d46d |
|
27-Aug-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: disable Z16 for now
It's causing crashes.
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 6ca64393c9f357160c8439bf7e73610641c6ded2 |
|
24-Aug-2012 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Don't write to the PA_SC_RASTER_CONFIG register.
It should be initialized by the kernel as necessary.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| f402acdbe244e5de9b2b616e0a908f5d1416ce89 |
|
22-Aug-2012 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Use FP16 shader export format when necessary / possible.
Fixes piglit fbo-blending-formats.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| d1e40b3d40b2e90ad4f275565f1ae27fe6f964cc |
|
23-Aug-2012 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Maintain cache of pixel shader variants according to contxt state.
Mostly inspired by r600g commit 4acf71f01ea1edb253cd38cc059d4af1a2a40bf4
('r600g: cache shader variants instead of rebuilding v3').
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 9aacd5cc67ccbc3984bce6a0b40768a6cec2ec2d |
|
23-Aug-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: remove old tilling handling
Just use the functionality provided by the surface manager instead.
This fixes just another bunch of piglit tests.
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 302c66ff813221998bbdcd56887a440aa3c60650 |
|
22-Aug-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: rework vertex format handling
Preventing piglit's draw-vertices test from hanging the GPU.
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 1a25ebe3ce95a6a4aef7c844dbe95909976b68da |
|
21-Aug-2012 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Handle NULL sampler views getting passed in by the state tracker.
Don't dereference NULL pointers, and if all views are NULL, don't generate an
invalid PM4 packet which locks up the GPU.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 51d9f37a72b3c7893204efbbeca034d1581d30f1 |
|
15-Aug-2012 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Fix memory leaks if returning early from some state functions.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| cf76edd300b3e58a906d07404e7d7533a6d54a41 |
|
12-Aug-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: move ps sampler state into PM4 stream
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| ec5b698525ccd9d5cd734e723e284dea7cc2041d |
|
12-Aug-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: move ps sampler views into PM4 stream
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 303f4b7dcddee384d6f1dc1027cbdee840a38d7d |
|
02-Aug-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: separate and disable streamout for now
I have my doubts that this code still works on SI.
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 708337e62e86cfb2df893f0733bb7c5a4938fab6 |
|
02-Aug-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: move init state to new state handling
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| ce40e4726cf30196b87df387255c64ddc2a97638 |
|
02-Aug-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: cleanup shader headers
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 86490bc150dd108d5917bb0f4636a9545fbf1b8e |
|
27-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: fix db and stencil setup v2
v2: fix tiling for small pitches, that finally makes
glxgears and readPixSanity work
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 7dace3a3cf894adb51a21ff6b08f58608ea33831 |
|
26-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: fix stencil op mapping
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| ad15c8c0f199e293b5c49a9c614cfaa19edb9a62 |
|
25-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: fix assertion in si_bind_vs_sampler
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 1fb8ee62faf081e6a5588e99620a9883e3788c46 |
|
25-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: fix shader binding
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| b15e3ae5b423dd8846a35500c0274d1d74f6b836 |
|
25-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: fix vertex buffer and elements
Let's just use the T# descriptors until we get a fetch shader.
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| fe41287ffa8cb35421cadfb16d4cc27c5fcb8b76 |
|
24-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: rename r600_resource to si_resource
Also split it into seperate header and add
some helper functions.
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 9b213c871a080472660eff271c72a3fcc5d3f578 |
|
20-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: move everything else into the new handling
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 53d47889e67b3de5267d55b90b2110802a6e7dc0 |
|
20-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: move format handling into si_state.c
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 73dd906ba0ef06ba03f1a05b08dbca3122016bac |
|
19-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: move remaining sampler state into si_state.c
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| ca9cf611b63e5576b596c21b73b1b639d250d649 |
|
19-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: move draw state into new handling
Split it out into si_state_draw.c
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 0d6b0b512acadbc5d64039063b5649fc401b3367 |
|
19-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: move constants to new state handling
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| baf20397569fb499f736e5ad2350b008b8207fad |
|
19-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: move sampler states into new handling
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 3c09f11e5cefd437bb8185539430786dc245c96f |
|
18-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: move shaders to new handling
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| bd2a5cf328c21f2d5b243442ee2eac73a996b15c |
|
18-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: move spi into new handling
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 840f05da6b92ba5266385836533842b9a9fc5da9 |
|
18-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: move init state to new handling
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| e4e6f954ae8c83251c39da4327c29ba12fca8236 |
|
18-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: move draw_info to new state handling
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| 76660dfccede74782ac0d409da171ddbd61fae41 |
|
18-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: move CB_TARGET_MASK into fb/blend state
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|
| e6937211da019223ca3b8fd0be6ed5a5fe35c706 |
|
18-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: move stencil_ref to new handling
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
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| b41b3eb9893b9bac8df363fef4d10c68798616e2 |
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18-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: move dsa state to new handling
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
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| bd18a316e1495f501911d89c8b373382d1f8c8c2 |
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18-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: move infeered fb/rs state to new handling
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
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| f67fae0e43fa0909b57b8a07858d37caecd5cbb1 |
|
17-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: move rasterizer state into new handling
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
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| 835098a5290e59bb7b468eb987db67b0e1913c67 |
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17-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: move framebuffer to new handling
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
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| 7e011d92c9746ba4050890442db6e504fa42c4ad |
|
17-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: move viewport to new handling
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
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| 43f414f7b76902a728d26231d4cc047b794df10b |
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17-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: move scissor state to new state handling
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
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| 9cbbe0d4e6a7deb01ff580eb3c49763f9f1d94d9 |
|
17-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: move clip state to new handling
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
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| 0a091a48242513e53a99976239405e8cb72d96be |
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17-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: move blend color to new state handling
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
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| 63636ae52aefc275115d1f3daac4e75285583485 |
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17-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: move blender to new state handling
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
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| bf7302a6e1f3aed4518498e90e8261a2b1f6afd7 |
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17-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
radeonsi: rework state handling v2
Add a complete new state handling for SI.
v2: fix spelling error
Signed-off-by: Christian König <deathsimple@vodafone.de>
/external/mesa3d/src/gallium/drivers/radeonsi/si_state.c
|