/external/v8/src/ppc/ |
H A D | macro-assembler-ppc.cc | 3009 void MacroAssembler::MovToFloatParameters(DoubleRegister src1, argument 3012 DCHECK(!src1.is(d2)); 3014 Move(d1, src1); 3016 Move(d1, src1); 3653 void MacroAssembler::Cmpi(Register src1, const Operand& src2, Register scratch, argument 3657 cmpi(src1, src2, cr); 3660 cmp(src1, scratch, cr); 3665 void MacroAssembler::Cmpli(Register src1, const Operand& src2, Register scratch, argument 3669 cmpli(src1, src2, cr); 3672 cmpl(src1, scratc 3677 Cmpwi(Register src1, const Operand& src2, Register scratch, CRegister cr) argument 3689 Cmplwi(Register src1, const Operand& src2, Register scratch, CRegister cr) argument 3751 CmpSmiLiteral(Register src1, Smi* smi, Register scratch, CRegister cr) argument 3762 CmplSmiLiteral(Register src1, Smi* smi, Register scratch, CRegister cr) argument [all...] |
/external/Microsoft-GSL/tests/ |
H A D | strided_span_tests.cpp | 216 const strided_span<int, 1> src1{arr1, {2, 1}}; 217 strided_span<int, 1> sav1{src1}; 249 const strided_span<int, 1> src1{arr1, {2, 1}}; 251 strided_span<int, 1>& sav1_ref = (sav1 = src1);
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/external/libvpx/libvpx/vpx_dsp/arm/ |
H A D | vpx_convolve8_avg_neon_asm.asm | 30 MULTIPLY_BY_Q0 $dst, $src0, $src1, $src2, $src3, $src4, $src5, $src6, $src7 32 vmlal.s16 $dst, $src1, d0[1]
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H A D | vpx_convolve8_neon_asm.asm | 30 MULTIPLY_BY_Q0 $dst, $src0, $src1, $src2, $src3, $src4, $src5, $src6, $src7 32 vmlal.s16 $dst, $src1, d0[1]
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/external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
H A D | ir3.h | 1110 struct ir3_instruction *src0, struct ir3_instruction *src1) 1123 if (src1) { 1125 reg->instr = src1; 1126 reg->wrmask = (1 << (src1->regs_count - 1)) - 1; 1108 ir3_SAM(struct ir3_block *block, opc_t opc, type_t type, unsigned wrmask, unsigned flags, unsigned samp, unsigned tex, struct ir3_instruction *src0, struct ir3_instruction *src1) argument
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H A D | ir3_compiler_nir.c | 996 struct ir3_instruction *base_lo, *base_hi, *addr, *src0, *src1; local 1023 src1 = get_src(ctx, &intr->src[1])[0]; 1026 addr = ir3_ADD_S(b, addr, 0, src1, 0); 1391 struct ir3_instruction **dst, *sam, *src0[12], *src1[4]; local 1536 src1[nsrc1++] = off[i]; 1538 src1[nsrc1++] = create_immed(b, fui(0.0)); 1543 src1[nsrc1++] = lod; 1570 struct ir3_instruction *col1 = create_collect(b, src1, nsrc1);
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/external/mesa3d/src/gallium/drivers/i915/ |
H A D | i915_fpc.h | 214 uint src0, uint src1, uint src2);
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/external/opencv/cv/src/ |
H A D | cvfilter.cpp | 1357 const int *src0 = src[-1], *src1 = src[0], *src2 = src[1]; 1361 int s0 = src0[i] + src1[i]*2 + src2[i], 1362 s1 = src0[i+1] + src1[i+1]*2 + src2[i+1]; 1369 const int *src0 = src[-1], *src1 = src[0], *src2 = src[1]; 1373 int s0 = src1[i]*10 + (src0[i] + src2[i])*3, 1374 s1 = src1[i+1]*10 + (src0[i+1] + src2[i+1])*3; 1682 const float *src0 = src[-1], *src1 = src[0], *src2 = src[1]; 1686 float s0 = src0[i] + src1[i]*2 + src2[i], 1687 s1 = src0[i+1] + src1[i+1]*2 + src2[i+1], 1688 s2 = src0[i+2] + src1[ [all...] |
/external/v8/src/compiler/mips/ |
H A D | code-generator-mips.cc | 276 ool_name(CodeGenerator* gen, T dst, T src1, T src2) \ 277 : OutOfLineCode(gen), dst_(dst), src1_(src1), src2_(src2) {} \ 1249 FPURegister src1 = i.InputSingleRegister(0); local 1251 auto ool = new (zone()) OutOfLineFloat32Max(this, dst, src1, src2); 1252 __ Float32Max(dst, src1, src2, ool->entry()); 1258 DoubleRegister src1 = i.InputDoubleRegister(0); local 1260 auto ool = new (zone()) OutOfLineFloat64Max(this, dst, src1, src2); 1261 __ Float64Max(dst, src1, src2, ool->entry()); 1267 FPURegister src1 = i.InputSingleRegister(0); local 1269 auto ool = new (zone()) OutOfLineFloat32Min(this, dst, src1, src 1276 DoubleRegister src1 = i.InputDoubleRegister(0); local [all...] |
/external/v8/src/compiler/mips64/ |
H A D | code-generator-mips64.cc | 276 ool_name(CodeGenerator* gen, T dst, T src1, T src2) \ 277 : OutOfLineCode(gen), dst_(dst), src1_(src1), src2_(src2) {} \ 1463 FPURegister src1 = i.InputSingleRegister(0); local 1465 auto ool = new (zone()) OutOfLineFloat32Max(this, dst, src1, src2); 1466 __ Float32Max(dst, src1, src2, ool->entry()); 1472 FPURegister src1 = i.InputDoubleRegister(0); local 1474 auto ool = new (zone()) OutOfLineFloat64Max(this, dst, src1, src2); 1475 __ Float64Max(dst, src1, src2, ool->entry()); 1481 FPURegister src1 = i.InputSingleRegister(0); local 1483 auto ool = new (zone()) OutOfLineFloat32Min(this, dst, src1, src 1490 FPURegister src1 = i.InputDoubleRegister(0); local [all...] |
/external/libvpx/libvpx/third_party/libyuv/source/ |
H A D | planar_functions.cc | 729 void (*BlendPlaneRow)(const uint8* src0, const uint8* src1, 795 void (*BlendPlaneRow)(const uint8* src0, const uint8* src1, 901 void (*ARGBMultiplyRow)(const uint8* src0, const uint8* src1, uint8* dst, 962 void (*ARGBAddRow)(const uint8* src0, const uint8* src1, uint8* dst, 1028 void (*ARGBSubtractRow)(const uint8* src0, const uint8* src1, uint8* dst, 2001 const uint8* src1, int src_stride1, 2008 if (!src0 || !src1 || !dst || width <= 0 || height == 0) { 2052 IS_ALIGNED(src1, 4) && IS_ALIGNED(src_stride1, 4) && 2060 InterpolateRow(dst, src0, src1 - src0, width, interpolation); 2062 src1 2000 InterpolatePlane(const uint8* src0, int src_stride0, const uint8* src1, int src_stride1, uint8* dst, int dst_stride, int width, int height, int interpolation) argument [all...] |
/external/libyuv/files/source/ |
H A D | planar_functions.cc | 904 void (*BlendPlaneRow)(const uint8* src0, const uint8* src1, 980 void (*BlendPlaneRow)(const uint8* src0, const uint8* src1, 1088 void (*ARGBMultiplyRow)(const uint8* src0, const uint8* src1, uint8* dst, 1160 void (*ARGBAddRow)(const uint8* src0, const uint8* src1, uint8* dst, 1237 void (*ARGBSubtractRow)(const uint8* src0, const uint8* src1, uint8* dst, 2343 const uint8* src1, 2354 if (!src0 || !src1 || !dst || width <= 0 || height == 0) { 2395 IS_ALIGNED(src_stride0, 4) && IS_ALIGNED(src1, 4) && 2411 InterpolateRow(dst, src0, src1 - src0, width, interpolation); 2413 src1 2341 InterpolatePlane(const uint8* src0, int src_stride0, const uint8* src1, int src_stride1, uint8* dst, int dst_stride, int width, int height, int interpolation) argument [all...] |
/external/mesa3d/src/mesa/state_tracker/ |
H A D | st_glsl_to_tgsi.cpp | 501 st_src_reg src1 = undef_src, 508 st_src_reg src1 = undef_src, 514 st_src_reg src0, st_src_reg src1); 522 st_src_reg src1, 529 st_dst_reg dst, st_src_reg src0, st_src_reg src1); 646 st_src_reg src0, st_src_reg src1, 653 op = get_opcode(op, dst, src0, src1); 662 num_reladdr += src1.reladdr != NULL || src1.reladdr2 != NULL; 668 reladdr_to_temp(ir, &src1, 644 emit_asm(ir_instruction *ir, unsigned op, st_dst_reg dst, st_dst_reg dst1, st_src_reg src0, st_src_reg src1, st_src_reg src2, st_src_reg src3) argument 875 emit_asm(ir_instruction *ir, unsigned op, st_dst_reg dst, st_src_reg src0, st_src_reg src1, st_src_reg src2, st_src_reg src3) argument 888 get_opcode(unsigned op, st_dst_reg dst, st_src_reg src0, st_src_reg src1) argument 998 emit_dp(ir_instruction *ir, st_dst_reg dst, st_src_reg src0, st_src_reg src1, unsigned elements) argument 1032 st_src_reg src1 = orig_src1; local [all...] |
/external/mesa3d/src/compiler/glsl/ |
H A D | lower_instructions.cpp | 1469 ir_variable *src1 = local 1470 new(ir) ir_variable(glsl_type::uvec(elements), "src1", ir_var_temporary); 1495 i.insert_before(src1); 1503 i.insert_before(assign(src1, ir->operands[0])); 1528 i.insert_before(assign(src1, i2u(abs(itmp1)))); 1532 i.insert_before(assign(src1l, bit_and(src1, c0000FFFF))); 1534 i.insert_before(assign(src1h, rshift(src1, c16)));
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/external/mesa3d/src/mesa/main/ |
H A D | ffvertex_prog.c | 572 struct ureg src1, 610 emit_arg( &inst->SrcReg[1], src1 ); 619 #define emit_op3(p, op, dst, mask, src0, src1, src2) \ 620 emit_op3fn(p, op, dst, mask, src0, src1, src2, __func__, __LINE__) 622 #define emit_op2(p, op, dst, mask, src0, src1) \ 623 emit_op3fn(p, op, dst, mask, src0, src1, undef, __func__, __LINE__) 567 emit_op3fn(struct tnl_program *p, enum prog_opcode op, struct ureg dest, GLuint mask, struct ureg src0, struct ureg src1, struct ureg src2, const char *fn, GLuint line) argument
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/external/v8/src/arm64/ |
H A D | macro-assembler-arm64.h | 609 void Push(const CPURegister& src0, const CPURegister& src1 = NoReg, 611 void Push(const CPURegister& src0, const CPURegister& src1, 621 void Push(const Register& src0, const FPRegister& src1); 730 // Poke 'src1' and 'src2' onto the stack. The values written will be adjacent 731 // with 'src2' at a higher address than 'src1'. The offset is in bytes. 735 void PokePair(const CPURegister& src1, const CPURegister& src2, int offset); 979 inline void SmiTagAndPush(Register src1, Register src2); 1936 const CPURegister& src0, const CPURegister& src1,
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/external/mesa3d/src/gallium/drivers/vc4/ |
H A D | vc4_qir.c | 542 qir_inst(enum qop op, struct qreg dst, struct qreg src0, struct qreg src1) argument 549 inst->src[1] = src1;
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/external/skia/src/core/ |
H A D | SkBitmapProcState.cpp | 630 SkPMColor src1 = src[SkFractionalIntToInt(fx)]; fx += dx; 634 dst[1] = src1;
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/external/skqp/src/core/ |
H A D | SkBitmapProcState.cpp | 630 SkPMColor src1 = src[SkFractionalIntToInt(fx)]; fx += dx; 634 dst[1] = src1;
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/external/v8/src/crankshaft/ia32/ |
H A D | lithium-gap-resolver-ia32.cc | 439 Operand src1 = cgen_->HighOperand(source); local 445 __ mov(tmp, src1);
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/external/icu/icu4c/source/i18n/unicode/ |
H A D | ucol.h | 1173 * @param src1 the first sort key 1188 ucol_mergeSortkeys(const uint8_t *src1, int32_t src1Length,
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/external/mesa3d/src/amd/vulkan/ |
H A D | radv_meta_blit.c | 465 flip_coords(unsigned *src0, unsigned *src1, unsigned *dst0, unsigned *dst1) argument 468 if (*src0 > *src1) { 470 *src0 = *src1; 471 *src1 = tmp;
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/external/mesa3d/src/mesa/drivers/dri/i965/ |
H A D | brw_disasm.c | 1132 src1(FILE *file, const struct gen_device_info *devinfo, brw_inst *inst) function 1330 err |= src1(file, devinfo, inst); 1356 err |= src1(file, devinfo, inst); 1366 err |= src1(file, devinfo, inst);
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H A D | brw_ir_vec4.h | 273 const src_reg &src1 = src_reg(),
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/external/mesa3d/src/gallium/drivers/llvmpipe/ |
H A D | lp_state_fs.c | 1718 LLVMValueRef src1[4 * 4]; local 1989 fs_src1, src1, pad_inline); 2003 src1[i*num_fullblock_fs + j] = fs_src1[j][i]; 2023 src_count = lp_build_conv_auto(gallivm, fs_type, &old_row_type, src1, src_count, src1); 2040 lp_build_concat_n(gallivm, row_type, src1, src_count, src1, dst_count); 2053 fs_twiddle_transpose(gallivm, row_type, src1, src_count, src1); 2090 src1[ [all...] |