Searched refs:FCOS (Results 1 - 25 of 42) sorted by relevance

12

/external/one-true-awk/
H A Dawk.h124 #define FCOS 10 macro
H A Dlex.c54 { "cos", FCOS, BLTIN },
H A Drun.c1503 case FCOS:
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
H A DISDOpcodes.h446 // FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
450 FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, enumerator in enum:llvm::ISD::NodeType
/external/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h520 /// FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
524 FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, enumerator in enum:llvm::ISD::NodeType
H A DBasicTTIImpl.h748 ISDs.push_back(ISD::FCOS);
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp176 case ISD::FCOS:
H A DLegalizeFloatTypes.cpp70 case ISD::FCOS: R = SoftenFloatRes_FCOS(N); break;
853 case ISD::FCOS: ExpandFloatRes_FCOS(N, Lo, Hi); break;
H A DLegalizeVectorTypes.cpp73 case ISD::FCOS:
449 case ISD::FCOS:
1300 case ISD::FCOS:
/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp142 setOperationAction(ISD::FCOS, MVT::f32, Expand);
143 setOperationAction(ISD::FCOS, MVT::f64, Expand);
/external/swiftshader/third_party/LLVM/lib/Target/Alpha/
H A DAlphaISelLowering.cpp116 setOperationAction(ISD::FCOS , MVT::f64, Expand);
118 setOperationAction(ISD::FCOS , MVT::f32, Expand);
/external/swiftshader/third_party/LLVM/lib/Target/Sparc/
H A DSparcISelLowering.cpp757 setOperationAction(ISD::FCOS , MVT::f64, Expand);
761 setOperationAction(ISD::FCOS , MVT::f32, Expand);
/external/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp160 case ISD::FCOS: return "fcos";
H A DLegalizeVectorOps.cpp310 case ISD::FCOS:
H A DLegalizeFloatTypes.cpp82 case ISD::FCOS: R = SoftenFloatRes_FCOS(N); break;
1022 case ISD::FCOS: ExpandFloatRes_FCOS(N, Lo, Hi); break;
1871 case ISD::FCOS:
H A DLegalizeDAG.cpp2181 ? ISD::FCOS : ISD::FSIN;
3150 case ISD::FCOS: {
3159 if (Node->getOpcode() == ISD::FCOS)
3822 case ISD::FCOS:
4230 case ISD::FCOS:
H A DLegalizeVectorTypes.cpp79 case ISD::FCOS:
637 case ISD::FCOS:
2155 case ISD::FCOS:
/external/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp81 for (auto Op : {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOWI, ISD::FPOW,
/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/
H A DMBlazeISelLowering.cpp83 setOperationAction(ISD::FCOS, MVT::f32, Expand);
/external/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp107 setOperationAction(ISD::FCOS, MVT::f32, Custom);
624 case ISD::FCOS:
946 case ISD::FCOS:
H A DSIISelLowering.cpp217 setOperationAction(ISD::FCOS, MVT::f32, Custom);
1242 case ISD::FCOS:
2373 case ISD::FCOS:
/external/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1667 setOperationAction(ISD::FCOS , MVT::f128, Expand);
1672 setOperationAction(ISD::FCOS , MVT::f64, Expand);
1677 setOperationAction(ISD::FCOS , MVT::f32, Expand);
/external/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp146 setOperationAction(ISD::FCOS, MVT::f128, Expand);
254 setOperationAction(ISD::FCOS, MVT::f32, Expand);
255 setOperationAction(ISD::FCOS, MVT::f64, Expand);
276 setOperationAction(ISD::FCOS, MVT::f16, Promote);
318 setOperationAction(ISD::FCOS, MVT::v4f16, Expand);
348 setOperationAction(ISD::FCOS, MVT::v8f16, Expand);
527 setOperationAction(ISD::FCOS, MVT::v1f64, Expand);
652 setOperationAction(ISD::FCOS, VT, Expand);
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
H A DSPUISelLowering.cpp213 setOperationAction(ISD::FCOS , MVT::f64, Expand);
216 setOperationAction(ISD::FCOS , MVT::f32, Expand);
/external/swiftshader/third_party/LLVM/lib/Target/Mips/
H A DMipsISelLowering.cpp172 setOperationAction(ISD::FCOS, MVT::f32, Expand);
173 setOperationAction(ISD::FCOS, MVT::f64, Expand);

Completed in 394 milliseconds

12