| /external/vixl/test/aarch32/ |
| H A D | test-disasm-a32.cc | 2349 TEST_SHIFT_T32(Mvn, "mvn", 0x0000000a)
2375 // For Mvn and Mvns, we don't allow PC as a destination.
2376 TEST_WIDE_IMMEDIATE(Mvn, "mvn", 0x0000000e);
2378 MUST_FAIL_TEST_BOTH(Mvn(pc, 0xbadbeef), "Ill-formed 'mvn' instruction.\n");
2379 MUST_FAIL_TEST_BOTH(Mvn(eq, pc, 0xbadbeef),
3521 COMPARE_T32(Mvn(eq, r4, r6),
3525 COMPARE_T32(Mvn(eq, r8, r6),
4154 CHECK_T32_16(Mvn(DontCare, r6, r7), "mvns r6, r7\n");
4156 CHECK_T32_16_IT_BLOCK(Mvn(DontCare, eq, r6, r7),
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| H A D | test-simulator-cond-rd-operand-const-a32.cc | 120 M(Mvn) \
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| H A D | test-simulator-cond-rd-operand-const-t32.cc | 120 M(Mvn) \
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| H A D | test-simulator-cond-rd-operand-rn-a32.cc | 120 M(Mvn) \
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| H A D | test-simulator-cond-rd-operand-rn-t32.cc | 120 M(Mvn) \
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| H A D | test-simulator-cond-rd-operand-rn-shift-amount-1to31-a32.cc | 120 M(Mvn) \
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| H A D | test-simulator-cond-rd-operand-rn-shift-amount-1to31-t32.cc | 120 M(Mvn) \
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| H A D | test-simulator-cond-rd-operand-rn-shift-amount-1to32-a32.cc | 120 M(Mvn) \
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| H A D | test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc | 120 M(Mvn) \
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| H A D | test-simulator-cond-rd-operand-rn-shift-rs-a32.cc | 120 M(Mvn) \
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| /external/vixl/src/aarch64/ |
| H A D | macro-assembler-aarch64.cc | 859 Mvn(rd, rn);
928 // could also be achieved using an orr instruction (like orn used by Mvn),
1121 void MacroAssembler::Mvn(const Register& rd, const Operand& operand) { function in class:vixl::aarch64::MacroAssembler
1128 Mvn(rd, operand.GetImmediate());
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| H A D | macro-assembler-aarch64.h | 702 void Mvn(const Register& rd, uint64_t imm) { function in class:vixl::aarch64::MacroAssembler
705 void Mvn(const Register& rd, const Operand& operand);
2335 V(mvn, Mvn) \
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| /external/v8/src/arm64/ |
| H A D | macro-assembler-arm64.h | 258 inline void Mvn(const Register& rd, uint64_t imm);
259 void Mvn(const Register& rd, const Operand& operand);
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| H A D | macro-assembler-arm64.cc | 112 Mvn(rd, rn);
260 // could also be achieved using an orr instruction (like orn used by Mvn),
296 void MacroAssembler::Mvn(const Register& rd, const Operand& operand) { function in class:v8::internal::MacroAssembler
3530 Mvn(scratch, key);
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| H A D | macro-assembler-arm64-inl.h | 287 void MacroAssembler::Mvn(const Register& rd, uint64_t imm) { function in class:v8::internal::MacroAssembler
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| /external/swiftshader/third_party/subzero/src/ |
| H A D | IceInstARM32.h | 407 Mvn, enumerator in enum:Ice::ARM32::InstARM32::InstKindARM32
1055 using InstARM32Mvn = InstARM32UnaryopGPR<InstARM32::Mvn, false>;
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| H A D | IceInstARM32.cpp | 3527 template class InstARM32UnaryopGPR<InstARM32::Mvn, false>;
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| /external/v8/src/compiler/arm64/ |
| H A D | code-generator-arm64.cc | 1065 __ Mvn(i.OutputRegister(), i.InputOperand(0));
1068 __ Mvn(i.OutputRegister32(), i.InputOperand32(0));
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| /external/vixl/test/aarch64/ |
| H A D | test-assembler-aarch64.cc | 418 __ Mvn(w0, 0xfff);
419 __ Mvn(x1, 0xfff);
420 __ Mvn(w2, Operand(w0, LSL, 1));
421 __ Mvn(x3, Operand(x1, LSL, 2));
422 __ Mvn(w4, Operand(w0, LSR, 3));
423 __ Mvn(x5, Operand(x1, LSR, 4));
424 __ Mvn(w6, Operand(w0, ASR, 11));
425 __ Mvn(x7, Operand(x1, ASR, 12));
426 __ Mvn(w8, Operand(w0, ROR, 13));
427 __ Mvn(x
[all...] |
| H A D | test-disasm-aarch64.cc | 201 COMPARE_MACRO(Mvn(w0, Operand(0x101)), "mov w0, #0xfffffefe");
202 COMPARE_MACRO(Mvn(x1, Operand(0xfff1)), "mov x1, #0xffffffffffff000e");
203 COMPARE_MACRO(Mvn(w2, Operand(w3)), "mvn w2, w3");
204 COMPARE_MACRO(Mvn(x4, Operand(x5)), "mvn x4, x5");
205 COMPARE_MACRO(Mvn(w6, Operand(w7, LSL, 12)), "mvn w6, w7, lsl #12");
206 COMPARE_MACRO(Mvn(x8, Operand(x9, ASR, 63)), "mvn x8, x9, asr #63");
5894 COMPARE_MACRO(Mvn(v4.V8B(), v5.V8B()),
5897 COMPARE_MACRO(Mvn(v4.V16B(), v5.V16B()),
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| /external/vixl/src/aarch32/ |
| H A D | macro-assembler-aarch32.h | 2629 void Mvn(Condition cond, Register rd, const Operand& operand) { function in class:vixl::aarch32::MacroAssembler
2642 void Mvn(Register rd, const Operand& operand) { Mvn(al, rd, operand); } function in class:vixl::aarch32::MacroAssembler
2643 void Mvn(FlagsUpdate flags, function in class:vixl::aarch32::MacroAssembler
2649 Mvn(cond, rd, operand);
2661 Mvn(cond, rd, operand);
2666 void Mvn(FlagsUpdate flags, Register rd, const Operand& operand) { function in class:vixl::aarch32::MacroAssembler
2667 Mvn(flags, al, rd, operand);
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