History log of /drivers/mtd/nand/pxa3xx_nand.c
Revision Date Author Comments
b7e460624f0f3c31150f3b09e75b0d009e22ba5f 22-May-2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com> mtd: pxa3xx_nand: make the driver work on big-endian systems

The pxa3xx_nand driver currently uses __raw_writel() and __raw_readl()
to access I/O registers. However, those functions do not do any
endianness swapping, which means that they won't work when the CPU
runs in big-endian but the I/O registers are little endian, which is
the common situation for ARM systems running big endian.

Since __raw_writel() and __raw_readl() do not include any memory
barriers and the pxa3xx_nand driver can only be compiled for ARM
platforms, the closest I/o accessors functions that do endianess
swapping are writel_relaxed() and readl_relaxed().

This patch has been verified to work on Armada XP GP: without the
patch, the NAND is not detected when the kernel runs big endian while
it is properly detected when the kernel runs little endian. With the
patch applied, the NAND is properly detected in both situations
(little and big endian).

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: <stable@vger.kernel.org> # v3.13+
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
5b3e507820c6e120bc2680c0d35f9d9d81fcb98d 14-May-2014 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Use ECC strength and step size devicetree binding

This commit adds support for the user to specify the ECC strength
and step size through the devicetree. We keep the previous behavior,
when there is no DT parameter provided.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
eee0166d8ead9d719d794df3e66acd8f83630e05 14-May-2014 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Clean pxa_ecc_init() error handling

Let's make pxa_ecc_init() return a negative errno on error or zero
if succesful, which is standard kernel practice. Also, report the
selected ECC strength and step size, which is important information.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
17754ad693a5d1e906219cc528f859c02482cca7 07-May-2014 Jingoo Han <jg1.han@samsung.com> mtd: nand: pxa3xx: Make of_device_id array const

Make of_device_id array const, because all OF functions
handle it as const.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
e634ce51baa52c131e4a35c01bba9e596a0eb86d 27-Feb-2014 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Print actual ECC strength in error message

The actual ECC strength used to select the ECC scheme is 'ecc_strength'.
Use it in the error message.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2a565f56ed0436c5345a79c5468bebfd3340fb10 27-Feb-2014 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Remove unused macro

This macro is not used so it's safe to remove it.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
3db227b64841383b0e3c00d02e7c84d363494281 13-Jan-2014 Rodolfo Giometti <giometti@linux.it> mtd: nand: pxa3xx: Add support for 2048 bytes page size devices

This commit adds support for devices with 2048B page sizes and
4-bit ECC strength requirements. This is achieved by enabling the BCH
ECC engine, which provides a higher strength: 16-bit over 2048 bytes.

Additionally, add a proper ECC layout to model the controller's view
of the device (where 'U' means unused and 'B' is the bad block marker):

----------------------------------------------------
| 2048B data | B | B | 30B spare | 30B ECC | U | U |
----------------------------------------------------

Signed-off-by: Rodolfo Giometti <giometti@linux.it>
[Brian: updated with Ezequiel's patch description]
Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
1963ff97ca461fed4d9212e7e7b9c29715251342 24-Dec-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Add "armada370-nand" compatible

Now that the driver can support the Armada 370/XP SoC NAND controller,
add the devicetree compatible string, enabling its use.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
30b2afc8471ea06a6d18b9f6bc183dafb99de1f9 18-Dec-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Consolidate ECC initialization

In order to avoid code duplication, let's consolidate the ECC setting
for all SoC variants. Such decision is based on page size and ECC
strength requirements.

Also, provide a default value for the case where such ECC information
is not provided (non-ONFI devices).

Tested-by: Arnaud Ebalard <arno@natisbad.org>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
5cbbdc6a9f8830737e099aca12794eb907f96882 18-Dec-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Use extended cmdfunc() only if needed

Currently, we have two different cmdfunc's implementations:
one for PXA3xx SoC variant and one for Armada 370/XP SoC variant.

The former is the legacy one, typically constrained to devices
with page sizes smaller or equal to the controller's FIFO buffer.
On the other side, the latter _only_ supports the so-called extended
command semantics, which allow to handle devices with larger
page sizes (4 KiB, 8 KiB, ...).

This means we currently don't support devices with smaller pages on the
A370/XP SoC. Fix it by first renaming the cmdfuncs variants, and then
make the choice based on device page size (and SoC variant), rather than
SoC variant alone.

While at it, add a check for page size, to make sure we don't allow larger
pages sizes on the PXA3xx variant.

Tested-by: Arnaud Ebalard <arno@natisbad.org>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
d20d0a6cf75ba60cac5d00f9a4c2caabf611c51e 18-Dec-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Clear need_wait flag when starting a command

Currently the driver assumes all commands will eventually trigger a RnB
transition, and thus a "device is ready" IRQ.

This assumption means that on every issued command, the dev_ready completion
handler is init'ed and the need_wait flag is set.

However this is incorrect: some commands (such as NAND_CMD_STATUS) don't
make the device 'busy' and thus a RnB transition never occurs.
Given, the NAND core never calls waitfunc() after such commands, this
is not a problem.

Therefore, it's possible to only clear the need_wait flag on every command
that is started.

This fixes a current bug that can be reproduced on PXA boards by writing
blank (all 0xff'ed) to a page:

1. The kernel issues NAND_CMD_STATUS and sets need_wait=1. The flag
won't be cleared for this command since no RnB transition is
involved.

2. NAND_CMD_PAGEPROG is issued but since the data is blank, the driver
decides not to execute the command (and no IRQ activity is
involved).

3. The NAND core calls waitfunc() and waits for the dev_ready
completion, which will never end since the device _is_ already ready.

Tested-by: Arnaud Ebalard <arno@natisbad.org>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
6033a949b2c466a13e84daebd99fdca5960b4db5 14-Nov-2013 Brian Norris <computersforpeace@gmail.com> mtd: nand: pxa3xx: make ECC configuration checks more explicit

The Armada BCH configuration in this driver uses one of the two
following ECC schemes:

16-bit correction per 2048 bytes
16-bit correction per 1024 bytes

These are sufficient for mapping to the 4-bit per 512-bytes and 8-bit
per 512-bytes (respectively) minimum correctability requirements of many
common NAND.

The current code only checks for the required strength (4-bit or 8-bit)
without checking the ECC step size that is associated with that strength
(and simply assumes it is 512). While that is often a safe assumption to
make, let's make it explicit, since we have that information.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
87f5336eef63f0a1d1755cfe9392e2c414605780 14-Nov-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Add ECC BCH correctable errors detection

This commit extends the ECC correctable error detection to include
ECC BCH errors. The number of BCH correctable errors can be any up to 16,
and the actual value is exposed in the NDSR register.

Therefore, we change some symbol names to refer to correctable or
uncorrectable (instead of single-bit or double-bit as it was in the
Hamming case) and while at it, cleanup the detection code slightly.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
535cb57a4da0378b8a28d415249d501a4fa99ddf 14-Nov-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Add multiple chunk write support

This commit adds write support for large pages (4 KiB, 8 KiB).
Such support is implemented by issuing a multiple command sequence,
transfering a set of 2 KiB chunks per transaction.

The splitted command sequence requires to send the SEQIN command
independently of the PAGEPROG command and therefore it's set as
an execution command.

Since PAGEPROG enables ECC, each 2 KiB chunk of data is written
together with ECC code at a controller-fixed location within
the flash page.

Currently, only devices with a 4 KiB page size has been tested.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
70ed85232a93af5253bff4802ef4ead1e83faa5f 14-Nov-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Introduce multiple page I/O support

As preparation work to fully support large pages, this commit adds
the initial infrastructure to support splitted (aka chunked) I/O
operation. This commit adds support for read, and follow-up patches
will add write support.

When a read (aka READ0) command is issued, the driver loops issuing
the same command until all the requested data is transfered, changing
the 'extended' command field as needed.

For instance, if the driver is required to read a 4 KiB page, using a
chunk size of 2 KiB, the transaction is splitted in:
1. Monolithic read, first 2 KiB page chunk is read
2. Last naked read, second and last 2KiB page chunk is read

If ECC is enabled it is calculated on each chunk transfered and added
at a controller-fixed location after the data chunk that must be
spare area.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
fa543bef72d62c14f25c6f48f5981f7ecc5402f2 14-Nov-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Add a read/write buffers markers

In preparation to support multiple (aka chunked, aka splitted)
page I/O, this commit adds 'data_buff_pos' and 'oob_buff_pos' fields
to keep track of where the next read (or write) should be done.

This will allow multiple calls to handle_data_pio() to continue
the read (or write) operation.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
e7f9a6a4628d0db43970fa3d2ba57be745416927 14-Nov-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Fix SEQIN column address set

This commit adds support page programming with a non-zero "column"
address setting. This is important to support OOB writing, through
command sequences such as:

cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, ofs);
write_buf(mtd, oob_buf, 6);
cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
39f83d15df36fa2d50de677e0743438df2ed4cf4 14-Nov-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Move the data buffer clean to prepare_start_command()

To allow future support of multiple page reading/writing, move the data
buffer clean out of prepare_set_command().

This is done to prevent the data buffer from being cleaned on every command
preparation, when a multiple command sequence is implemented to read/write
pages larger than the FIFO size (2 KiB).

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
c39ff03a402e354eb73c61cb732f9bc881d76879 14-Nov-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Split prepare_command_pool() in two stages

This commit splits the prepare_command_pool() function into two
stages: prepare_start_command() / prepare_set_command().

This is a preparation patch without any functionality changes,
and is meant to allow support for multiple page reading/writing
operations.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
01d9947e04fe16ab5891c932f47a171db5607bb5 14-Nov-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Remove READ0 switch/case falltrough

READ0 and READOOB command preparation has a falltrough to SEQIN
case, where the command address is specified.
This is certainly confusing and makes the code less readable with
no added value. Let's remove it.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
86beebae3acf531b75e63d88b7ec9b3804ce895e 14-Nov-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Add helper function to set page address

Let's simplify the code by first introducing a helper function
to set the page address, as done by the READ0, READOOB and SEQIN
commands.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
f0e6a32e9af51e2a65c3cbedbad4cbc6b1479330 14-Nov-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Clear cmd buffer #3 (NDCB3) on command start

Command buffer #3 is not properly cleared and it keeps the last
set value. Fix this by clearing when a command is setup.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
43bcfd2bb24abf7307634bc7194386b38d6f264f 14-Nov-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Add driver-specific ECC BCH support

This commit adds the BCH ECC support available in NFCv2 controller.
Depending on the detected required strength the respective ECC layout
is selected.

This commit adds an empty ECC layout, since support to access large
pages is first required. Once that support is added, a proper ECC
layout will be added as well.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
776f265e279744e3f327ccd3e7eb378046311373 14-Nov-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Add bad block handling

Add support for flash-based bad block table using Marvell's
custom in-flash bad block table layout. The support is enabled
a 'flash_bbt' platform data or device tree parameter.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
56704d857ac9a1044ec58cfe0ff95dc6bdbd9d58 14-Nov-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Use waitfunc() to wait for the device to be ready

In pxa3xx_nand_sensing() instead of simply using info->is_ready
after issuing a command, the correct way of checking is to wait
for the device to be ready through the chip's waitfunc().

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
55d9fd6e94caf5f30d027f49bd0a4955bc6b3a8c 14-Nov-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Use a completion to signal device ready

The expected behavior of the waitfunc() NAND chip call is to wait
for the device to be READY (this is a standard chip line).
However, the current implementation does almost nothing, which opens
the possibility of issuing a command to a non-ready device.

Fix this by adding a new completion to wait for the ready event to arrive.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
6a3e48651fc6ce02aac08bc419cffa74f306ee32 07-Nov-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Add a nice comment to pxa3xx_set_datasize()

Add a comment clarifying the use of pxa3xx_set_datasize() which is only
applicable on data read/write commands (i.e. commands with a data cycle,
such as READID, READ0, STATUS, etc.)

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
0a3f3a1916bcac44a86ca89c874cdcad5e7746e9 07-Nov-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Replace host->page_size by mtd->writesize

There's no need to privately store the device page size as it's
available in mtd structure field mtd->writesize.
Also, this removes the hardcoded page size value, leaving the
auto-detected value only.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2128b08c7c3aaf8b81fb76a0ce9ba37b5492f0db 07-Nov-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Split FIFO size from to-be-read FIFO count

Introduce a fifo_size field to represent the size of the controller's
FIFO buffer, and use it to distinguish that size from the amount
of data bytes to be read from the FIFO.

This is important to support devices with pages larger than the
controller's internal FIFO, that need to read the pages in FIFO-sized
chunks.

In particular, the current code is at least confusing, for it mixes
all the different sizes involved: FIFO size, page size and data size.

This commit starts the cleaning by removing the info->page_size field
that is not currently used. The host->page_size field should also
be removed and use always mtd->writesize instead. Follow up commits
will clean this up.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2d79ab16f592f07f21d666a86682684ab2d135f8 07-Nov-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Use chip->cmdfunc instead of the internal

Whenever possible, it's always better to use the generic chip->cmdfunc
instead of the internal pxa3xx_nand_cmdfunc().
In this particular case, this will allow to have multiple cmdfunc()
implementations for different SoC variants.

Reviewed-by: Huang Shijie <shijie8@gmail.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
c7e9c7e71b5a76adf42bf10e059ae1d63bcd5e1a 07-Nov-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Early variant detection

In order to customize early settings depending on the detected SoC variant,
move the detection to be before the nand_chip struct filling.

In a follow-up patch, this change is needed to detect the variant *before*
the call to alloc_nand_resource(), which allows to set a different cmdfunc()
for each variant.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
4e86fd22af2c930e741536e8637bca9355fa8bb5 07-Nov-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: read_page() returns max_bitflips

As per the ecc.read_page() prototype, we must return the maximum number
of bitflips that were corrected on any one region covering an ecc step.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
664c7f5e81df12b5cac873a25fa9ac9cc90c13c3 07-Nov-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Prevent sub-page writes

The current driver doesn't support sub-page writing, so report
that to the NAND core.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
de484a381c4e7df5587febb16b727212b2da597c 07-Nov-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Add documentation about the controller

Given there's no public specification to this date, and in order
to capture some important details and singularities about the
controller let's document them once and for good.

Cc: linux-doc@vger.kernel.org
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
15b540c71cac840f0a3e8b1b4b7a773deb847ffb 10-Dec-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Use info->use_dma to release DMA resources

In commit:

commit 62e8b851783138a11da63285be0fbf69530ff73d
Author: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Date: Fri Oct 4 15:30:38 2013 -0300

mtd: nand: pxa3xx: Allocate data buffer on detected flash size

the way the buffer is allocated was changed: the first READ_ID is issued
with a small kmalloc'ed buffer. Only once the flash page size is detected
the DMA buffers are allocated, and info->use_dma is set.

Currently, if the device detection fails, the driver checks the 'use_dma'
module parameter and tries to release unallocated DMA resources.

Fix this by checking the proper indicator of the DMA allocation, which
is 'info->use_dma'.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
9c59ac616137fb62f6cb3f1219201b09cbcf30be 09-Dec-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Partially revert "mtd: nand: pxa3xx: Introduce 'marvell,armada370-nand' compatible string"

This partially reverts c0f3b8643a6fa2461d70760ec49d21d2b031d611.

The "armada370-nand" compatible support is not complete, and it was mistake
to add it. Revert it and postpone the support until the infrastructure is
in place.

Cc: <stable@vger.kernel.org> # 3.12
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
b1eb234fb38dd1b6fb86969bf8f27348e4ec4c74 13-Oct-2013 Michael Opdenacker <michael.opdenacker@free-electrons.com> mtd: nand: remove deprecated IRQF_DISABLED

This patch proposes to remove the use of the IRQF_DISABLED flag

It's a NOOP since 2.6.35 and it will be removed one day.

Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
62e8b851783138a11da63285be0fbf69530ff73d 04-Oct-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Allocate data buffer on detected flash size

This commit replaces the currently hardcoded buffer size, by a
dynamic detection scheme. First a small 256 bytes buffer is allocated
so the device can be detected (using READID and friends commands).

After detection, this buffer is released and a new buffer is allocated
to acommodate the page size plus out-of-band size.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
95b26563c739d5ed5101318b1bd8895773a3d872 04-Oct-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Move DMA I/O enabling

Instead of setting info->dma each time a command is prepared,
we can move it after the DMA buffers are allocated.

This is more clear and it's the proper place to enable this, given
DMA cannot be turned on and off during runtime.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
5576bc7bef2919dd2b185bffb768bf9c0da76788 30-Sep-2013 Sachin Kamat <sachin.kamat@linaro.org> mtd: nand: pxa3xx_nand: Remove redundant of_match_ptr

The data structure of_match_ptr() protects is always compiled in.
Hence of_match_ptr() is not needed.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
18a84e935ef3b283e86426827a2a1d524bb7eb8e 19-Oct-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Fix registered MTD name

In a recent commit:

commit f455578dd961087a5cf94730d9f6489bb1d355f0
Author: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Date: Mon Aug 12 14:14:53 2013 -0300

mtd: nand: pxa3xx: Remove hardcoded mtd name

There's no advantage in using a hardcoded name for the mtd device.
Instead use the provided by the platform_device.

The MTD name was changed to use the one provided by the platform_device.
However, this can be problematic as some users want to set partitions
using the kernel parameter 'mtdparts', where the name is needed.

Therefore, to avoid regressions in users relying in 'mtdparts' we revert
the change and use the previous one 'pxa3xx_nand-0'.

While at it, let's put a big comment and prevent this change from happening
ever again.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
ab5be58833455dd2f942b9e2e5fcc8d9b4c7c9e6 12-Aug-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Remove unneeded ifdef CONFIG_OF

There's no need to enclose this code within idef CONFIG_OF,
because the OF framework provides no-op stubs if CONFIG_OF=n.

Cc: devicetree@vger.kernel.org
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
6b45c1eef6d19d3a6af43471c70235cbe967b491 12-Aug-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Allow devices with no dma resources

When use_dma=0 there's no point in requesting resources for dma,
since they won't be used anyway. Therefore we remove that requirement,
therefore allowing devices without dma to pass the driver probe.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
57ff88f0f961348a1dec024d611ec7e281510529 12-Aug-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Add __maybe_unused keyword to enable_int()

Now that we have added ARCH_HAS_DMA conditional the function
enable_int() may be unused. Declare it as __maybe_unused,
in order to remove the following warning, when the function is not used:

drivers/mtd/nand//pxa3xx_nand.c:343:24: warning: 'enable_int' defined
but not used [-Wunused-function]

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
f4db2e3a3315019c419a7ee8ebaf5d8b361be791 12-Aug-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Make dma code dependent on dma capable platforms

This patch adds a macro ARCH_HAS_DMA to compile-out arch specific
dma code, namely pxa_request_dma() and pxa_free_dma(). These symbols
are available only in pxa, which makes impossible to build the driver in
other platforms than ARCH_PXA.

In order to handle non-dma capable platforms, we implement a fallbacks that
allocate buffers as if 'use_dma=false', putting the dma related code
under the ARCH_HAS_DMA conditional.

Please note that the correct way to handle this is to migrate the
dma code to use of the mmp_pdma dmaengine driver. However, currently
this is not possible because the two dmaengine drivers can't work together.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
48cf7efa6be22e5ab42c16e2700e401f2e6f8bad 12-Aug-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Move cached registers to info structure

This registers are not per-chip (aka host) but controller-wide,
so it's better to store them in the global 'info' structure.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
ec82135a011cf657ef02cfa2038331b381e39960 12-Aug-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Remove unneeded internal cmdset

Use the defined macros for NAND command instead of using a constant
internal structure. This commit is only a cleanup, there's no
functionality modification.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
f455578dd961087a5cf94730d9f6489bb1d355f0 12-Aug-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Remove hardcoded mtd name

There's no advantage in using a hardcoded name for the mtd device.
Instead use the provided by the platform_device.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
b7655bcb40883de6fd218395a55d0cc9089e55a1 12-Aug-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Add a local loop variable

This is just a cosmetic change, to make the code more readable.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
41a634303f8dbf97c8087773b9d66914d2a9c0fd 12-Aug-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Use 'length override' in ONFI paramater page read

The ONFI command 'parameter page read' needs a non-standard length.
Therefore, we enable the 'length override' field in NDCB0 and set
a non-zero 'length count' in NDCB3.

Additionally, the 'spare enable' bit must be disabled for any command
that sets a non-zero 'length count' in NDCB3.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
3a1a344a79de3391f4122975eab1167b641668b9 12-Aug-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Support command buffer #3

Some newer controllers support a fourth command buffer. This additional
command buffer allows to set an arbitrary length count, using the
NDCB3.NDLENCNT field, to perform non-standard length operations
such as the ONFI parameter page read.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
5bb653e890ca7a5b4ba9042cb60d02f7ddef8c21 12-Aug-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Allow to set/clear the 'spare enable' field

Some commands (such as the ONFI parameter page read) need to
clear the 'spare enable' bit. This commit allows to set/clear
depending on the prepared command, instead of having it always
set.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
cd9d11820f4232856d6254a29fbb9c4f51a981c2 12-Aug-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Handle ECC and DMA enable/disable properly

When ECC is not selected, the ECC enable bit must be cleared
in the NAND control register. Same applies to DMA.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
c0f3b8643a6fa2461d70760ec49d21d2b031d611 10-Aug-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Introduce 'marvell,armada370-nand' compatible string

This driver supports NFCv1 (as found in PXA SoC) and NFCv2 (as found in
Armada 370/XP SoC). As both controller has a few differences, a way of
distinguishing between the two is needed.

This commit introduces a new compatible string 'marvell,armada370-nand'
and assigns a compatible data of type enum pxa3xx_nand_variant to allow
such distinction.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
453810b79571ff6622a481f0556fc4972f87a24f 30-Jul-2013 Jingoo Han <jg1.han@samsung.com> mtd: nand: use dev_get_platdata()

Use the wrapper function for retrieving the platform data instead of
accessing dev->platform_data directly.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
8461a99095d7f48afee9fb1da9a638c536626b4f 07-May-2013 Jingoo Han <jg1.han@samsung.com> mtd: nand: pxa3xx_nand: remove unnecessary platform_set_drvdata()

The driver core clears the driver data to NULL after device_release
or on probe failure, since commit 0998d0631001288a5974afc0b2a5f568bcdecb4d
(device-core: Ensure drvdata = NULL when no driver is bound).
Thus, it is not needed to manually clear the device driver data to NULL.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
ce0268f650ad26e103d82ce5a58379737adc2ab9 14-May-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Add support for Read parameter page command

This command is required to identify ONFI-compliant devices.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Reviewed-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
d14231f1985f31441777a2dbda055dc8499f6c93 14-May-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Add address support for READID command

This allows to support READID ONFI command which sends 0x20
as address together with the 0x90 READID command.

This is required to detect ONFI compliant devices.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Reviewed-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
f3958984259f01503ff9629f3564b11bf57a98be 14-May-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Fix MODULE_DEVICE_TABLE declaration

This module's device table is incorrectly declared using
i2c_pxa_dt_ids, instead of pxa3xx_nand_dt_ids.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Reviewed-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
a33e435c2822d9c6351deed1cda0184638cfbb42 14-May-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Use of_machine_is_compatible()

This patch replaces cpu_is_pxa3xx() with of_machine_is_compatible()
which allows to build this driver for other platforms than ARCH_PXA.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Reviewed-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
0a60d049812e959b43b0556ef5b914d0900b6283 14-May-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Set info->use_dma properly

Currently, the variable info->use_dma is never set and always
zero-valued which means the driver never does DMA transfers.
We fix this by simply setting info->use_dma to the module parameter,
also named 'use_dma'. Note that the module parameter has the same name,
but different semantics.

This fixes a regression introduced by the below commit
which removed the info->use_dma variable set.

commit 4eb2da8994042d68e84e31138788429a102da2ea
Author: Lei Wen <leiwen@marvell.com>
Date: Mon Feb 28 10:32:13 2011 +0800

mtd: pxa3xx_nand: unify prepare command

Before the above commit, the driver had use_dma=1 on all NAND commands
except on CMD_STATUS. This behavior is long lost and we are not
recovering in this patch, either.

This was spotted and verified by human inspection.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Reviewed-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
498b6145b8878c3659dfe57921deb7802196ce43 17-Apr-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Move buffer release code to its own function

Create a function to release the buffer and the dma channel, thus undoing
what pxa3xx_nand_init_buff() did. This commit makes the code more readable
and will allow to handle non-DMA capable platforms easier.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
1f8eaff2aa75f8ec662e044deecdc91abc780d60 17-Apr-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Check for clk_prepare_enable() return value

clk_prepare_enable() can fail due to unknown reason.
Add a check for this and return the error code if it fails.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
fb32061ffaa9da61f72f79120a39729aa1736de0 17-Apr-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Use clk_prepare_enable and clk_disable_unprepare

This patch converts the module to use clk_prepare_enable and
clk_disable_unprepare variants as required by common clock framework.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
9ca7944deb25d415f7fc5915b9828a857161b97f 17-Apr-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Use devm_clk_get

Replacing clk_get by managed devm_clk_get, the error path
can be greatly simplified.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
0ddd846f56a7648b9e70fb94a2b93b5b8b6ae335 17-Apr-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Use devm_ioremap_resource

Using the new devm_ioremap_resource() we can greatly
simplify resource handling.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
4c073cd26e0835ae9c807a6188272e09d3087d85 17-Apr-2013 Ezequiel Garcia <ezequiel.garcia@free-electrons.com> mtd: nand: pxa3xx: Use devm_kzalloc

Replace regular kzalloc with managed devm_kzalloc
which simplifies the error path.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
68aa352de28235bccdcee96ddf49f7628e93ec6f 04-Mar-2013 Artem Bityutskiy <artem.bityutskiy@linux.intel.com> mtd: nand: rename the id field of 'struct nand_flash_dev'

The 'id' is a bit confusing name because NAND IDs are multi-byte. Re-name
it to 'dev_id' to make it clear that this is the "device ID" part (the second
byte).

While on it, clean-up the commentary for 'struct nand_flash_dev'.

Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
657f28f8811c92724db10d18bbbec70d540147d6 15-Aug-2012 Huang Shijie <shijie8@gmail.com> mtd: kill MTD_NAND_VERIFY_WRITE

Just as Artem suggested:

"Both UBI and JFFS2 are able to read verify what they wrote already.
There are also MTD tests which do this verification. So I think there
is no reason to keep this in the NAND layer, let alone wasting RAM in
the driver to support this feature. Besides, it does not work for sub-pages
and many drivers have it broken. It hurts more than it provides benefits."

So kill MTD_NAND_VERIFY_WRITE entirely.

Signed-off-by: Huang Shijie <shijie8@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
293b2da1b61136813fc2764f43304c66ff8040e9 24-Aug-2012 Arnd Bergmann <arnd@arndb.de> ARM: pxa: move platform_data definitions

Platform data for device drivers should be defined in
include/linux/platform_data/*.h, not in the architecture
and platform specific directories.

This moves such data out of the pxa include directories

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Jeff Garzik <jgarzik@redhat.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Paul Parsons <lost.distance@yahoo.com>
Acked-by: Vinod Koul <vinod.koul@linux.intel.com>
Acked-By: Stefan Schmidt <stefan@openezx.org>
Cc: Eric Miao <eric.y.miao@gmail.com>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Daniel Ribeiro <drwyrm@gmail.com>
Cc: Harald Welte <laforge@openezx.org>
Cc: Philipp Zabel <philipp.zabel@gmail.com>
Cc: Tomas Cech <sleep_walker@suse.cz>
Cc: Sergey Lapin <slapin@ossfans.org>
Cc: Jonathan Cameron <jic23@cam.ac.uk>
Cc: Dan Williams <djbw@fb.com>
Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Cc: Chris Ball <cjb@laptop.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Samuel Ortiz <samuel@sortiz.org>
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Cc: Liam Girdwood <lrg@ti.com>
Cc: Jaroslav Kysela <perex@perex.cz>
Cc: Takashi Iwai <tiwai@suse.de>
Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Cc: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Cc: openezx-devel@lists.openezx.org
6e308f87c821e5b9316d9eb69e96d8a33910412a 20-Aug-2012 Haojian Zhuang <haojian.zhuang@gmail.com> mtd: nand: append missing parameter and value

Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
1e7ba630d4aeabef8e022a4099b20ab9f660d37d 22-Jul-2012 Daniel Mack <zonque@gmail.com> MTD: pxa3xx-nand: add devicetree bindings

This patch contains a hack to get the DMA resources of the device when
probed from a devicetree node. This can be removed once a generic DMA
controller framework lands.

A mtd_part_parser_data is passed mtd_device_parse_register which
contains a reference to the device node, so MTD partitions can be
added as children.

Signed-off-by: Daniel Mack <zonque@gmail.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
fdbad98dff8007f2b8bee6698b5d25ebba0471c9 25-Jun-2012 Josh Wu <josh.wu@atmel.com> mtd: nand: teach write_page and write_page_raw return an error code

There is an implemention of hardware ECC write page function which may return an
error indication.
For instance, using Atmel HW PMECC to write one page into a nand flash, the hardware
engine will compute the BCH ecc code for this page. so we need read a the
status register to theck whether the ecc code is generated.
But we cannot assume the status register always can be ready, for example,
incorrect hardware configuration or hardware issue, in such case we need
write_page() to return a error code.

Since the definition of 'write_page' function in struct nand_ecc_ctrl is 'void'.
So this patch will:
1. add return 'int' value for 'write_page' function.
2. to be consitent, add return 'int' value for 'write_page_raw' fuctions too.
3. add code to test the return value, and if negative, indicate an
error happend when write page with ECC.
4. fix the compile warning in all impacted nand flash driver.

Note: I couldn't compile-test all of these easily, as some had ARCH dependencies.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
1696e6bc2ae83734e64e206ac99766ea19e9a14e 23-May-2012 Brian Norris <computersforpeace@gmail.com> mtd: nand: kill NAND_NO_READRDY

According to its documentation, the NAND_NO_READRDY option is always used
when autoincrement is not supported. Autoincrement support was recently
dropped, so we can drop this options as well (defaulting to "no read ready
check").

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
1fbb938dff5b6bb4514a4e7600276b03c7f08e25 02-May-2012 Brian Norris <computersforpeace@gmail.com> mtd: nand: add 'oob_required' argument to NAND {read,write}_page interfaces

New NAND controllers can perform read/write via HW engines which don't expose
OOB data in their DMA mode. To reflect this, we should rework the nand_chip /
nand_ecc_ctrl interfaces that assume that drivers will always read/write OOB
data in the nand_chip.oob_poi buffer. A better interface includes a boolean
argument that explicitly tells the callee when OOB data is requested by the
calling layer (for reading/writing to/from nand_chip.oob_poi).

This patch adds the 'oob_required' parameter to each relevant {read,write}_page
interface; all 'oob_required' parameters are left unused for now. The next
patch will set the parameter properly in the nand_base.c callers, and follow-up
patches will make use of 'oob_required' in some of the callee functions.

Note that currently, there is no harm in ignoring the 'oob_required' parameter
and *always* utilizing nand_chip.oob_poi, but there can be
performance/complexity/design benefits from avoiding filling oob_poi in the
common case. I will try to implement this for some drivers which can be ported
easily.

Note: I couldn't compile-test all of these easily, as some had ARCH
dependencies.

[dwmw2: Merge later 1/0 vs. true/false cleanup]
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Reviewed-by: Shmulik Ladkani <shmulik.ladkani@gmail.com>
Acked-by: Jiandong Zheng <jdzheng@broadcom.com>
Acked-by: Mike Dunn <mikedunn@newsguy.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
1826dbccebc9a58a0b0c0a9b7c09e47b19d97398 02-May-2012 Brian Norris <computersforpeace@gmail.com> mtd: nand: kill NAND_NO_AUTOINCR option

No drivers use auto-increment NAND, so kill the NO_AUTOINCR option entirely.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
6a918bade9dab40aaef80559bd1169c69e8d69cb 11-Mar-2012 Mike Dunn <mikedunn@newsguy.com> mtd: flash drivers set ecc strength

Flash device drivers initialize 'ecc_strength' in struct mtd_info, which is the
maximum number of bit errors that can be corrected in one writesize region.

Drivers using the nand interface intitialize 'strength' in struct nand_ecc_ctrl,
which is the maximum number of bit errors that can be corrected in one ecc step.
Nand infrastructure code translates this to 'ecc_strength'.

Also for nand drivers, the nand infrastructure code sets ecc.strength for ecc
modes NAND_ECC_SOFT, NAND_ECC_SOFT_BCH, and NAND_ECC_NONE. It is set in the
driver for all other modes.

Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
42d7fbe223ab878b23de9e3b0166f8cd665a2aa5 09-Mar-2012 Artem Bityutskiy <artem.bityutskiy@linux.intel.com> mtd: do not use plain 0 as NULL

The first 3 arguments of 'mtd_device_parse_register()' are pointers,
but many callers pass '0' instead of 'NULL'. Fix this globally. Thanks
to coccinelle for making it easy to do with the following semantic patch:

@@
expression mtd, types, parser_data, parts, nr_parts;
@@
(
-mtd_device_parse_register(mtd, 0, parser_data, parts, nr_parts)
+mtd_device_parse_register(mtd, NULL, parser_data, parts, nr_parts)
|
-mtd_device_parse_register(mtd, types, 0, parts, nr_parts)
+mtd_device_parse_register(mtd, types, NULL, parts, nr_parts)
|
-mtd_device_parse_register(mtd, types, parser_data, 0, nr_parts)
+mtd_device_parse_register(mtd, types, parser_data, NULL, nr_parts)
)

Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
90ab5ee94171b3e28de6bb42ee30b527014e0be7 13-Jan-2012 Rusty Russell <rusty@rustcorp.com.au> module_param: make bool parameters really bool (drivers & misc)

module_param(bool) used to counter-intuitively take an int. In
fddd5201 (mid-2009) we allowed bool or int/unsigned int using a messy
trick.

It's time to remove the int/unsigned int option. For this version
it'll simply give a warning, but it'll break next kernel version.

Acked-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
ead995f8d4da1e2f1ef40b0e5f4133fee38a3d3d 23-Dec-2011 Artem Bityutskiy <artem.bityutskiy@linux.intel.com> mtd: introduce mtd_resume interface

Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
3fe4bae88460869a8e553397cd9057a4ee7ca341 23-Dec-2011 Artem Bityutskiy <artem.bityutskiy@linux.intel.com> mtd: introduce mtd_suspend interface

Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
f99640dee209df4730f35a28b02693affd571ad5 27-Nov-2011 Axel Lin <axel.lin@gmail.com> mtd: convert drivers/mtd/* to use module_platform_driver()

This patch converts the drivers in drivers/mtd/* to use the
module_platform_driver() macro which makes the code smaller and a bit
simpler.

Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com>

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
f3c8cfc237927cc095e8bcb1e3794cfa76390bab 15-Jul-2011 Lei Wen <leiwen@marvell.com> mtd: pxa3xx_nand: enable multiple chip select support

Current pxa3xx_nand controller has two chip select which
both be workable. This patch enable this feature.

Update platform driver to support this feature.

Another notice should be taken that:
When you want to use this feature, you should not enable the
keep configuration feature, for two chip select could be
attached with different nand chip. The different page size
and timing requirement make the keep configuration impossible.

Signed-off-by: Lei Wen <leiwen@marvell.com>
d456882b41b84eba5e729cf78757b8ed95572362 15-Jul-2011 Lei Wen <leiwen@marvell.com> mtd: pxa3xx_nand: sperate each chip individual info

For support two chip select, we seperate chip specific info in this
patch.

Signed-off-by: Lei Wen <leiwen@marvell.com>
da675b4ef20bb460f185e0aca4afeb8c3e7e4477 15-Jul-2011 Lei Wen <leiwen@marvell.com> mtd: pxa3xx_nand: convert all printk into dev_*

Also add missed warning message.

Signed-off-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@intel.com>
051fc41c2e578e10950bf34dc84878e489e0679f 15-Jul-2011 Lei Wen <leiwen@marvell.com> mtd: pxa3xx_nand: enhance suspend and resume routine

This patch add protection on the suspend&resume path to prevent
some unexpected behavior, like interrupt occur at the very second
of resume back and it don't follow normal command path, which lead
to bug.

Signed-off-by: Lei Wen <leiwen@marvell.com>
ee0f6a15b3f9246ae11e581cb9dae8fb2cc5da5c 02-Jun-2011 Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> mtd: pxa3xx_nand.c: use mtd_device_parse_register

Replace custom invocations of parse_mtd_partitions and mtd_device_register
with common mtd_device_parse_register call. This would bring: standard
handling of all errors, fallback to default partitions, etc.

Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
543e32d5ff165d0d68deedb0e3557478c7c36a4a 07-Jun-2011 Daniel Mack <zonque@gmail.com> mtd: pxa3xx_nand: Fix blank page ECC mismatch

This bug was introduced in f8155a40 ("mtd: pxa3xx_nand: rework irq
logic") and causes the PXA3xx NAND controller fail to operate with NAND
flash that has empty pages. According to the comment in this block, the
hardware controller will report a double-bit error for empty pages,
which can and must be ignored.

This patch restores the original behaviour of the driver.

Signed-off-by: Daniel Mack <zonque@gmail.com>
Acked-by: Lei Wen <leiwen@marvell.com>
Cc: Haojian Zhuang <haojian.zhuang@marvell.com>
Cc: David Woodhouse <David.Woodhouse@intel.com>
Cc: stable@kernel.org [2.6.38+]
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
0fab028b77d714ad302404b23306cf7adb885223 07-Jun-2011 Lei Wen <leiwen@marvell.com> mtd: pxa3xx_nand: fix nand detection issue

When keep_config is set, the detection would goes different routine.
That the driver would read out the setting which is set previously
by bootloader. While most bootloader keep the irq mask as off, and
current driver need all irq default open, keep_config behavior would
lead to no irq at all.

Signed-off-by: Lei Wen <leiwen@marvell.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Cc: stable@kernel.org [2.6.38+]
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
c842f570a6e3ac002389ab7154084e32f4f5021a 29-May-2011 Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> mtd: pxa3xx_nand don't specify default parsing options

Since 'cmdline, NULL' is now a default for parse_mtd_partitions, don't specify
this in every driver, instead pass NULL to force parse_mtd_partitions
to use default.

Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
1676bc18c6648c378029dad365756e12be7da025 03-Jun-2011 Axel Lin <axel.lin@gmail.com> mtd: pxa3xx_nand: remove unused variable 'mtd'

Remove unused variable 'mtd' to eliminate below warning.

CC drivers/mtd/nand/pxa3xx_nand.o
drivers/mtd/nand/pxa3xx_nand.c: In function 'pxa3xx_nand_suspend':
drivers/mtd/nand/pxa3xx_nand.c:1167: warning: unused variable 'mtd'
drivers/mtd/nand/pxa3xx_nand.c: In function 'pxa3xx_nand_resume':
drivers/mtd/nand/pxa3xx_nand.c:1180: warning: unused variable 'mtd'

Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
1a3591920e5100ba112a19e10a09ce7a5da1ab23 03-Jun-2011 Axel Lin <axel.lin@gmail.com> mtd: pxa3xx_nand: fix a memory leak

In pxa3xx_nand_remove, we should call nand_release instead of
mtd_device_unregister to properly free bad block table memory
and bad block descriptor memory.

Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
3dfad123e81cdf11642aa63da1149ee71a369d2d 23-May-2011 Jamie Iles <jamie@jamieiles.com> mtd: pxa: convert to mtd_device_register()

Convert to mtd_device_register() and remove the CONFIG_MTD_PARTITIONS
preprocessor conditionals as partitioning is always available.

Cc: Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Artem Bityutskiy <dedekind1@gmail.com>
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
25985edcedea6396277003854657b5f3cb31a628 31-Mar-2011 Lucas De Marchi <lucas.demarchi@profusion.mobi> Fix common misspellings

Fixes generated by 'codespell' and manually reviewed.

Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
4332c116869ceca58638beabd9e9a5d7db4cef83 03-Mar-2011 Lei Wen <leiwen@marvell.com> mtd: pxa3xx_nand: clean the keep configure code

Use nand_scan_ident to unify the need of mtd member initilization
for both normal detection and keep configuration method.

Signed-off-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
401e67e225f350757e11e39392dcc6a0fddcea63 28-Feb-2011 Lei Wen <leiwen@marvell.com> mtd: pxa3xx_nand: mtd scan id process could be defined by driver itself

Different NAND driver may require its unique detection. For pxa3xx_nand,
it use its self id database to get the necessary info.

Signed-off-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
4eb2da8994042d68e84e31138788429a102da2ea 28-Feb-2011 Lei Wen <leiwen@marvell.com> mtd: pxa3xx_nand: unify prepare command

Make the interface simpler which could make both debug
and enhancement easier.

Signed-off-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
38caf7f68e6b4ad84094095887a490e3fa2ec501 28-Feb-2011 Lei Wen <leiwen@marvell.com> mtd: pxa3xx_nand: discard wait_for_event,write_cmd,__readid function

Since we have rework the irq process, we don't need additional
delay in wait_for_event. Also write_cmd and __readid is also
discarded for the same reason.

Signed-off-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Acked-by: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
f8155a404db95656f1519b28fdb96cb68f8b2364 28-Feb-2011 Lei Wen <leiwen@marvell.com> mtd: pxa3xx_nand: rework irq logic

Enable all irq when we start the nand controller, and
put all the transaction logic in the pxa3xx_nand_irq.

By doing this way, we could dramatically increase the
performance by avoid unnecessary delay.

Signed-off-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
e353a20afaee1e3e67fc4fa663a76c68a4c1fb74 03-Mar-2011 Lei Wen <leiwen@marvell.com> mtd: pxa3xx_nand: make scan procedure more clear

The previous probe function is some kind of big part.
This patch seperate the resource allocation to keep the probe process
more clear than before.

Signed-off-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
52d039fdaa78c5a9f9bc2940ad58d7ed76b8336d 06-Jan-2011 Dan Carpenter <error27@gmail.com> mtd: pxa3xx_nand: NULL dereference in pxa3xx_nand_probe

"info->cmdset" gets dereferenced in __readid() so it needs to be
initialized earlier in the function. This bug was introduced in
18c81b1828f8 "mtd: pxa3xx_nand: remove the flash info in driver
structure".

Cc: stable@kernel.org [2.6.37+]
Reported-and-tested-by: Sven Neumann <s.neumann@raumfeld.com>
Signed-off-by: Dan Carpenter <error27@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
9d8b10437441e7f31ce86202ccadad922a9e914f 17-Aug-2010 Lei Wen <leiwen@marvell.com> mtd: pxa3xx_nand: set oob length in the runtime

For different command need different oob requirement, set the proper
oob length by different cmd.

Signed-off-by: Lei Wen <leiwen@marvell.com>
Acked-by: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
18c81b1828f8c4bdd01dd24f4015604a17ca0bb8 17-Aug-2010 Lei Wen <leiwen@marvell.com> mtd: pxa3xx_nand: remove the flash info in driver structure

After probe, all info already transfer to driver structure.
There is no need to keep the original flash info.
So that we could safely free the flash info in memory, which may grows
larger when more flash is suported.

Signed-off-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Acked-by: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
227a886c7ead6420465abfd1242f449895b2c332 18-Aug-2010 Lei Wen <leiwen@marvell.com> mtd: pxa3xx_nand: introduce default timing to reduce read id times

We certainly don't need to send read id command times by times, since
we already know what the id is after the first read id...

So create a default timing which could ensure it would successfully read
id out all supported chip. Then follow the build-in table to reconfigure
the timing.

Signed-off-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Acked-by: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
c1f82478c535f1de9fecf3cafa82014f312d5d4e 17-Aug-2010 Lei Wen <leiwen@marvell.com> mtd: pxa3xx_nand: condense the flash definition

Adding a new flash definition would need less code.
Keep the platform passing flash definition method.
If one flash is both defined in platform data and builtin table,
driver would select the one from platform data first.

By this way, platform could select the timing most suit for itself,
not need to follow the common settings.

Signed-off-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Acked-by: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
99d389640b58052884fb231bce9dbffb4f595aa4 26-Aug-2010 Mark F. Brown <mark.brown314@gmail.com> mtd: pxa3xx: fix build error when CONFIG_MTD_PARTITIONS is not defined

Signed-off-by: Mark F. Brown <mark.brown314@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
93b352fce679945845664b56b0c3afbd655a7a12 16-Aug-2010 Axel Lin <axel.lin@gmail.com> pxa3xx: fix ns2cycle equation

Test on a PXA310 platform with Samsung K9F2G08X0B NAND flash,
with tCH=5 and clk is 156MHz, ns2cycle(5, 156000000) returns -1.

ns2cycle returns negtive value will break NDTR0_tXX macros.

After checking the commit log, I found the problem is introduced by
commit 5b0d4d7c8a67c5ba3d35e6ceb0c5530cc6846db7
"[MTD] [NAND] pxa3xx: convert from ns to clock ticks more accurately"

To get num of clock cycles, we use below equation:
num of clock cycles = time (ns) / one clock cycle (ns) + 1
We need to add 1 cycle here because integer division will truncate the result.
It is possible the developers set the Min values in SPEC for timing settings.
Thus the truncate may cause problem, and it is safe to add an extra cycle here.

The various fields in NDTR{01} are in units of clock ticks minus one,
thus we should subtract 1 cycle then.

Thus the correct equation should be:
num of clock cycles = time (ns) / one clock cycle (ns) + 1 - 1
= time (ns) / one clock cycle (ns)

Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Lei Wen <leiwen@marvell.com>
Acked-by: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Cc: stable@kernel.org
bff3c10d369440bc87ba612b45ba2777d2bf017f 23-Apr-2010 Marc Kleine-Budde <mkl@pengutronix.de> mtd: pxa32xx_nand: add support for partition table parsing

The pxa32xx_nand driver doesn't support partition tables from the
command line. This patch adds support for it.

Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
5a0e3ad6af8660be21ca98a971cd00f331318c05 24-Mar-2010 Tejun Heo <tj@kernel.org> include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h

percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.

percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.

http://userweb.kernel.org/~tj/misc/slabh-sweep.py

The script does the followings.

* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.

* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.

* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.

The conversion was done in the following steps.

1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.

2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.

3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.

4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.

5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.

6. percpu.h was updated not to include slab.h.

7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).

* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig

8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.

Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.

Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
82b95ecb96122896fd5b7b75001fdda3e047ef38 10-Sep-2009 Haojian Zhuang <haojian.zhuang@marvell.com> pxa3xx_nand: move pxa3xx_nand.h common into plat directory

Since the same nand controller is shared between ARCH_PXA and ARCH_MMP. Move
the pxa3xx_nand.h from mach directory to plat directoy.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Cc: David Woodhouse <david.woodhouse@intel.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
d3490dfdbc453a16bc7f3cff731c9f7851735ab3 10-Sep-2009 Haojian Zhuang <haojian.zhuang@marvell.com> pxa3xx_nand: add new nand chip support

Support samsung 2GbX8 and 32GbX8 nand flash.
Support micron 4GbX8 and 4GbX16 nand flash.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
346e125967c39fc25263f3071dfc88224ae843f4 10-Sep-2009 Haojian Zhuang <haojian.zhuang@marvell.com> pxa3xx_nand: disable nand irq in initialization

In some bootloader, IRQ is enabled. Writing nand triggers unexpected
interrupts. So disable nand irq in initialization. After nand
initialized and in working state, irq is controlled by nand driver.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
dbf5986aed62620d3dde54e1b63889821c857675 10-Sep-2009 Haojian Zhuang <haojian.zhuang@marvell.com> pxa3xx_nand: remove hardcode irq number

Nand driver uses IRQ_NAND as hardcode irq number. In ARCH_MMP, the irq
number is different. So get irq resource from platform device structure
and use it in initialization and deinitialization code.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
8638fac849c181176324f26b4b82e3b96f378dde 10-Sep-2009 Haojian Zhuang <haojian.zhuang@marvell.com> pxa3xx_nand: remove hardcode register address

Although nand controller is same between PXA3xx and MMP, the register space
is different. Remove the hardcode register address setting in pxa3xx_nand.h.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
726de6e16d88986db3102ebe6ae277f73df63eaf 14-Oct-2009 Haojian Zhuang <haojian.zhuang@marvell.com> pxa3xx_nand: adjust timing of Micron NAND flash

Slow down the tRp of Micron NAND flash timing.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
7ce33aff68f653769ba16108834ed212788bcbb6 14-Sep-2009 Haojian Zhuang <haojian.zhuang@marvell.com> pxa3xx_nand: reset read buffer before reading

Initialize the read buffer content to 0xFF.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
a88bdbb54a9352b916877bfc5e316c44ec1b2d8f 11-Sep-2009 Haojian Zhuang <haojian.zhuang@marvell.com> pxa3xx_nand: fix memory out of bound

When fetch nand data with non-DMA mode, we should align info->data_size to
32bit, not 8bit.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
98ecc914d0a48dbbcbb5fc866ab5b59a52afbd41 24-Nov-2009 David Hunter <hunterd42@gmail.com> mtd: pxa3xx_nand: Fix PIO data transfer

The shift operator used here to convert from bytes to 32-bit words is
backwards.

Signed-off-by: David Hunter <hunterd42@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
223cf6c3b517cf6ef040cafe45af89f3b8adba74 01-Jul-2009 Yeasah Pell <yeasah@comrex.com> mtd: pxa3xx_nand: add single-bit error corrections reporting

Acked-by: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Yeasah Pell <yeasah@comrex.com>
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
f271049e2010b918f83dc1c7bbd5d75f4710506a 17-Feb-2009 Mike Rapoport <mike@compulab.co.il> [MTD] [NAND] pxa3xx_nand: add ability to keep controller settings defined by OBM/bootloader

Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
82a72d108b4fbcc8f651b7c4e34c6f18a605d58d 17-Feb-2009 Mike Rapoport <mike@compulab.co.il> [MTD] [NAND] pxa3xx_nand: allow building as module

Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
b2ed3680553b451e5c45064de26ea8fa5201c6d4 17-Feb-2009 Mike Rapoport <mike@compulab.co.il> [MTD] [NAND] pxa3xx_nand: use resource_size instead of 'r->end - r->start + 1'

Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
7ebc8d56f407184a457dd5fc739cf39e423a25aa 02-Jan-2009 Eric Miao <eric.miao@marvell.com> [ARM] pxa: move DMA registers definitions into <mach/dma.h>

1. Driver code where pxa_request_dma() is called will most likely
reference DMA registers as well, and it is really unnecessary
to include pxa-regs.h just for this. Move the definitions into
<mach/dma.h> and make relevant drivers include it instead of
<mach/pxa-regs.h>.

2. Introduce DMAC_REGS_VIRT as the virtual address base for these
DMA registers. This allows later processors to re-use the same
IP while registers may start at different I/O address.

Signed-off-by: Eric Miao <eric.miao@marvell.com>
5b0d4d7c8a67c5ba3d35e6ceb0c5530cc6846db7 18-Nov-2008 Matt Reimer <mreimer@vpop.net> [MTD] [NAND] pxa3xx: convert from ns to clock ticks more accurately

The various fields in NDTR{01} are in units of clock ticks minus one, but the
ns2cycle macro mistakenly adds one, inflating the number of clock ticks and
making it impossible to set any of these fields to zero.

Signed-off-by: Matt Reimer <mreimer@vpop.net>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
7f9938d0fd6c778bd0ce296a3e3b50266de2b892 18-Nov-2008 Matt Reimer <mreimer@vpop.net> [MTD] [NAND] pxa3xx: fix non-page-aligned reads

Reads from non-page-aligned addresses were broken because while the
address to read from was correctly written to NDCB*, a full page was
always read. Fix this by ignoring the column and only using the page
address.

I suspect this whole-page behavior is due to the controller's need to
read the entire page in order to generate correct ECC. In the non-ECC
case this could be optimized to use the column address, and to set the
read length to what is being requested rather than the length of an
entire page.

Signed-off-by: Matt Reimer <mreimer@vpop.net>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
e93f1be503efd0e44e46fc1fd4c13dbee72a6561 03-Dec-2008 Denis V. Lunev <den@parallels.com> [MTD] [NAND] fix OOPS accessing flash operations over STM flash on PXA

STM 2Gb flash is a large-page NAND flash. Set operations accordingly.
This field is dereferenced without a check in several places resulting in
OOPS.

Signed-off-by: Denis V. Lunev <den@openvz.org>
Acked-by: Eric Miao <ymiao3@marvell.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
afb5b5c9adb66c73b83dc39319efbacb6fb26a7d 01-Dec-2008 Eric Miao <eric.miao@marvell.com> [ARM] pxa: explicit #include <mach/dma.h> in various drivers

Where 'pxa_dma_desc' and 'pxa_{request,free}_dma' are referenced.

Signed-off-by: Eric Miao <eric.miao@marvell.com>
e0d8b13ae1e3ea747620580b6f777992148de182 11-Nov-2008 Russell King <rmk@dyn-67.arm.linux.org.uk> [ARM] pxa: don't pass a consumer clock name for devices with unique clocks

Where devices only have one consumer, passing a consumer clock ID
has no real benefit. Remove it.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2675e9447bb5c861dbd29c5fe55b7ce2ad3ff0f5 29-Aug-2008 Enrico Scholz <enrico.scholz@sigma-chemnitz.de> [MTD] [NAND] pxa3xx_nand: added warning which tells id of detected NAND

Minor patch to help debugging of NAND detection.

Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
c8c17c888d936c58ceb28b084a6272d67e10ea28 29-Aug-2008 Enrico Scholz <enrico.scholz@sigma-chemnitz.de> [MTD] [NAND] pxa3xx_nand: moved some helper variables out from platform data

This patch moves some attributes out from the platform data into the
dynamically created nand device. This results into a cleaner interface
and allows to use constant pxa3xx_nand_flash definitions.

Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
7dad482ed0648a40e403d1ed44e0ea92248632f1 29-Aug-2008 Enrico Scholz <enrico.scholz@sigma-chemnitz.de> [MTD] [NAND] pxa3xx_nand: added some 'const' annotations to the exported API

This patch marks some attributes as 'const' which are set only once and
never be modified by the driver. There are some changes in parameter
list and variable declarations too which mark them as 'const'.

Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
80ebf20f34c30760cfba7b5e0a418241181d2cd9 29-Aug-2008 Enrico Scholz <enrico.scholz@sigma-chemnitz.de> [MTD] [NAND] pxa3xx_nand: allow to disable builtin flash-type table

This patch adds a MTD_NAND_PXA3xx_BUILTIN configuration variables which
allows to disable usage of builtin flash-type table. Not enabling this
option saves some space in the generated driver.

Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
c8ac3f818e1183eab8d08a41b01b6078c5df4b43 29-Aug-2008 Enrico Scholz <enrico.scholz@sigma-chemnitz.de> [MTD] [NAND] pxa3xx_nand: allow to define flash types in the platform data

This patch adds 'flash' and 'num_flash' attributes to the platform data.
There was added code in the driver to iterate across these attributes in the
detect-flash routine. This is done similarly to the existing method
which uses a 'builtin_flash_types' field.

Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
43035338ad772b6a4097b2ac530b75390bee87c1 29-Aug-2008 Enrico Scholz <enrico.scholz@sigma-chemnitz.de> [MTD] [NAND] pxa3xx_nand: moved nand definitions into shared platform header

This patch moves the exported datastructures from the pxa3xx_nand.c driver
into the <mach/pxa3xx_nand.h> header. This is a plain movement without
any modification of the attributes.

This is the first one of a set of patches which:

* allows to specify used NAND flash in the platform code and allows to turn
off the old way to specify NAND characteristics in the driver. This way did
not worked well as these characteristics depend on the platform and can not be
derived from NAND id alone.

E.g. some NAND chips share the same ID (e.g. K9K8G08U0A and K9NBG08U5A) but
have different timings (which are written in the common driver currently and
must be modified there).

* adds 'const' annotations at various places

Further patches will be sent to the mtd-list.

Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
4262bd2981307258b31e15f1a526d2b3884e77b5 01-Sep-2008 Semun Lee <semun.lee@samsung.com> [MTD] [NAND] pxa3xx_nand_flash: Add definition of STM2GbX16 NAND flashes

Signed-off-by: Semun Lee <semun.lee@samsung.com>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
a09e64fbc0094e3073dbb09c3b4bfe4ab669244b 05-Aug-2008 Russell King <rmk@dyn-67.arm.linux.org.uk> [ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach

This just leaves include/asm-arm/plat-* to deal with.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
9b62d864314736fb6cc5c5db5b964d4a3c093424 21-May-2008 Eric Miao <eric.miao@marvell.com> [MTD] [NAND] pxa: fix incorrect calling of pxa3xx_nand_config() on resume path

Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
a1c06ee11f0b83e372c958b165338f579d17e3d4 22-Apr-2008 David Woodhouse <dwmw2@infradead.org> [MTD] [NAND] Fix checkpatch errors in pxa3xx_nand

Signed-off-by: David Woodhouse <dwmw2@infradead.org>
fe69af002e26ca39824f626459c16d642607b573 14-Feb-2008 eric miao <eric.miao@marvell.com> [MTD] [NAND] support for pxa3xx

This is preliminary since:

1. It supports only _one_ chip select at the moment. As there is no
existing platforms available using two chip selects of the NAND
controller, it shall really not include code for supporting the
2nd chip select for now, as such code cannot be verified.

2. It resorts to the default and simpliest memory based badblock
table

3. Only limited types of nand flash are currently supported. Most
PXA3xx processors come with on-chip NAND flash dies, so there
isn't much flexibility for other types of NAND.

4. The NAND controller should be configured to detect the device's
ID, thus making it difficult to use nand_scan_ident() to assist
the detection process (though it's not impossible)

TODO: fix all the above limitations of cuz :-)

Signed-off-by: eric miao <eric.miao@marvell.com>
Cc: Sergey Podstavin <spodstavin@ru.mvista.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>