Searched defs:TBB (Results 1 - 23 of 23) sorted by relevance

/external/llvm/unittests/VMCore/
H A DIRBuilderTest.cpp78 BasicBlock *TBB = BasicBlock::Create(getGlobalContext(), "", F); local
81 BranchInst *BI = Builder.CreateCondBr(Builder.getTrue(), TBB, FBB);
85 EXPECT_EQ(TBB, TI->getSuccessor(0));
90 BI = Builder.CreateCondBr(Builder.getTrue(), TBB, FBB, Weights);
94 EXPECT_EQ(TBB, TI->getSuccessor(0));
/external/llvm/lib/Target/MBlaze/
H A DMBlazeInstrInfo.cpp116 MachineBasicBlock *&TBB,
140 TBB = LastInst->getOperand(0).getMBB();
145 TBB = LastInst->getOperand(1).getMBB();
164 TBB = SecondLastInst->getOperand(1).getMBB();
175 TBB = SecondLastInst->getOperand(0).getMBB();
187 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, argument
192 assert(TBB && "InsertBranch must not be told to insert a fallthrough");
202 BuildMI(&MBB, DL, get(Opc)).addMBB(TBB);
204 BuildMI(&MBB, DL, get(Opc)).addReg(Cond[1].getReg()).addMBB(TBB);
208 BuildMI(&MBB, DL, get(Opc)).addReg(Cond[1].getReg()).addMBB(TBB);
115 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
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/external/llvm/lib/Target/MSP430/
H A DMSP430InstrInfo.cpp170 MachineBasicBlock *&TBB,
200 TBB = I->getOperand(0).getMBB();
212 TBB = 0;
218 // TBB is used to indicate the unconditinal destination.
219 TBB = I->getOperand(0).getMBB();
232 FBB = TBB;
233 TBB = I->getOperand(0).getMBB();
241 assert(TBB);
245 if (TBB != I->getOperand(0).getMBB())
260 MSP430InstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, argument
169 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
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/external/llvm/lib/Target/NVPTX/
H A DNVPTXInstrInfo.cpp202 /// just return false, leaving TBB/FBB null.
203 /// 2. If this block ends with only an unconditional branch, it sets TBB to be
206 /// an successor block, it sets TBB to be the branch destination block and a
211 /// block, it returns the 'true' destination in TBB, the 'false' destination
220 MachineBasicBlock *&TBB,
235 TBB = LastInst->getOperand(0).getMBB();
239 TBB = LastInst->getOperand(1).getMBB();
258 TBB = SecondLastInst->getOperand(1).getMBB();
268 TBB = SecondLastInst->getOperand(0).getMBB();
302 NVPTXInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, argument
219 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
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/external/llvm/lib/CodeGen/
H A DCodePlacementOpt.cpp77 MachineBasicBlock *TBB = 0, *FBB = 0; local
79 if (TII->AnalyzeBranch(*MBB, TBB, FBB, Cond))
85 if (Cond.empty() && TBB)
106 MachineBasicBlock *TBB = 0, *FBB = 0;
109 if (TII->AnalyzeBranch(*MBB, TBB, FBB, Cond))
H A DEarlyIfConversion.cpp71 // | [TF]BB FBB TBB
76 // Instructions in the conditional blocks TBB and/or FBB are spliced into the
93 MachineBasicBlock *TBB; member in class:__anon8655::SSAIfConv
98 /// isTriangle - When there is no 'else' block, either TBB or FBB will be
100 bool isTriangle() const { return TBB == Tail || FBB == Tail; }
103 MachineBasicBlock *getTPred() const { return TBB == Tail ? Head : TBB; }
135 /// Insertion point in Head for speculatively executed instructions form TBB
341 TBB = FBB = Tail = 0;
388 if (TII->AnalyzeBranch(*Head, TBB, FB
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H A DMachineBasicBlock.cpp351 MachineBasicBlock *TBB = 0, *FBB = 0;
354 bool B = TII->AnalyzeBranch(*this, TBB, FBB, Cond);
358 if (TBB) {
361 if (isLayoutSuccessor(TBB))
370 assert(!TBB && "Found more than one non-landing-pad successor!");
371 TBB = *SI;
376 if (!TBB)
381 if (!isLayoutSuccessor(TBB))
382 TII->InsertBranch(*this, TBB, 0, Cond, dl);
389 if (isLayoutSuccessor(TBB)) {
643 MachineBasicBlock *TBB = 0, *FBB = 0; local
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H A DMachineBlockPlacement.cpp885 MachineBasicBlock *TBB = 0, *FBB = 0; // For AnalyzeBranch. local
886 if (!TII->AnalyzeBranch(*BB, TBB, FBB, Cond) || !FI->canFallThrough())
987 MachineBasicBlock *TBB = 0, *FBB = 0; // For AnalyzeBranch. local
988 if (!TII->AnalyzeBranch(*PrevBB, TBB, FBB, Cond)) {
991 if (TBB && !Cond.empty() && FBB &&
992 MBPI->getEdgeWeight(PrevBB, FBB) > MBPI->getEdgeWeight(PrevBB, TBB) &&
997 << " vs " << MBPI->getEdgeWeight(PrevBB, TBB) << "\n");
1000 TII->InsertBranch(*PrevBB, FBB, TBB, Cond, dl);
1008 MachineBasicBlock *TBB = 0, *FBB = 0; // For AnalyzeBranch. local
1009 if (!TII->AnalyzeBranch(F.back(), TBB, FB
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H A DBranchFolding.cpp198 MachineBasicBlock *MBB = I, *TBB = 0, *FBB = 0; local
200 if (!TII->AnalyzeBranch(*MBB, TBB, FBB, Cond, true))
201 MadeChange |= MBB->CorrectExtraCFGEdges(TBB, FBB, !Cond.empty());
463 MachineBasicBlock *TBB = 0, *FBB = 0; local
467 !TII->AnalyzeBranch(*CurMBB, TBB, FBB, Cond, true)) {
469 if (TBB == NextBB && !Cond.empty() && !FBB) {
889 MachineBasicBlock *TBB = 0, *FBB = 0; local
891 if (!TII->AnalyzeBranch(*PBB, TBB, FBB, Cond, true)) {
895 if (!Cond.empty() && TBB == IBB) {
911 if (TBB
1573 MachineBasicBlock *TBB = 0, *FBB = 0; local
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H A DMachineLICM.cpp804 MachineBasicBlock *TBB = 0, *FBB = 0; local
806 if (!TII->AnalyzeBranch(*BB, TBB, FBB, Cond, false) && Cond.empty())
H A DMachineVerifier.cpp527 MachineBasicBlock *TBB = 0, *FBB = 0; local
530 TBB, FBB, Cond)) {
533 if (!TBB && !FBB) {
561 } else if (TBB && !FBB && Cond.empty()) {
566 } else if (!MBB->isSuccessor(TBB)) {
580 } else if (TBB && !FBB && !Cond.empty()) {
588 if (&*MBBI != TBB)
591 else if (TBB != *MBB->succ_begin())
597 } else if (!matchPair(MBB->succ_begin(), TBB, MBBI)) {
611 } else if (TBB
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H A DIfConversion.cpp82 /// TargetInstrInfo::AnalyzeBranch() (i.e. TBB, FBB, and Cond), and its
215 bool MeetIfcvtSizeLimit(MachineBasicBlock &TBB, argument
221 TII->isProfitableToIfCvt(TBB, TCycle, TExtra, FBB, FCycle, FExtra,
815 // TBB FBB
832 // | TBB
855 // | TBB---> exit
957 MachineBasicBlock *TBB = NULL, *FBB = NULL; local
959 if (!TII->AnalyzeBranch(*BBI.BB, TBB, FBB, Cond))
960 BBI.BB->CorrectExtraCFGEdges(TBB, FBB, !Cond.empty());
/external/llvm/lib/Target/CellSPU/
H A DSPUInstrInfo.cpp209 SPUInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, argument
235 TBB = LastInst->getOperand(0).getMBB();
239 TBB = LastInst->getOperand(1).getMBB();
260 TBB = SecondLastInst->getOperand(1).getMBB();
272 TBB = SecondLastInst->getOperand(0).getMBB();
347 SPUInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, argument
352 assert(TBB && "InsertBranch must not be told to insert a fallthrough");
371 MIB.addMBB(TBB);
380 MIB.addMBB(TBB);
385 MIB.addReg(Cond[1].getReg()).addMBB(TBB);
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/external/llvm/lib/Target/Mips/
H A DMipsInstrInfo.cpp93 MachineBasicBlock *&TBB,
106 // just return false, leaving TBB/FBB null.
107 TBB = FBB = NULL;
135 TBB = LastInst->getOperand(0).getMBB();
140 AnalyzeCondBr(LastInst, LastOpc, TBB, Cond);
156 TBB = SecondLastInst->getOperand(0).getMBB();
166 AnalyzeCondBr(SecondLastInst, SecondLastOpc, TBB, Cond);
173 MachineBasicBlock *TBB, DebugLoc DL,
183 MIB.addMBB(TBB);
187 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, argument
92 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
172 BuildCondBr(MachineBasicBlock &MBB, MachineBasicBlock *TBB, DebugLoc DL, const SmallVectorImpl<MachineOperand>& Cond) const argument
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/external/llvm/lib/Target/Sparc/
H A DSparcInstrInfo.cpp128 MachineBasicBlock *&TBB,
155 TBB = I->getOperand(0).getMBB();
166 TBB = 0;
173 TBB = I->getOperand(0).getMBB();
217 FBB = TBB;
218 TBB = I->getOperand(0).getMBB();
230 SparcInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB, argument
234 assert(TBB && "InsertBranch must not be told to insert a fallthrough");
240 BuildMI(&MBB, DL, get(SP::BA)).addMBB(TBB);
248 BuildMI(&MBB, DL, get(SP::BCOND)).addMBB(TBB)
127 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
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/external/llvm/lib/Target/XCore/
H A DXCoreInstrInfo.cpp169 /// just return false, leaving TBB/FBB null.
170 /// 2. If this block ends with only an unconditional branch, it sets TBB to be
173 /// an successor block, it sets TBB to be the branch destination block and a
178 /// block, it returns the 'true' destination in TBB, the 'false' destination
187 XCoreInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, argument
210 TBB = LastInst->getOperand(0).getMBB();
221 TBB = LastInst->getOperand(1).getMBB();
243 TBB = SecondLastInst->getOperand(1).getMBB();
255 TBB = SecondLastInst->getOperand(0).getMBB();
275 XCoreInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB, argument
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/external/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp213 bool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, argument
240 TBB = LastInst->getOperand(0).getMBB();
246 TBB = LastInst->getOperand(2).getMBB();
256 TBB = LastInst->getOperand(0).getMBB();
267 TBB = LastInst->getOperand(0).getMBB();
292 TBB = SecondLastInst->getOperand(2).getMBB();
305 TBB = SecondLastInst->getOperand(0).getMBB();
319 TBB = SecondLastInst->getOperand(0).getMBB();
333 TBB = SecondLastInst->getOperand(0).getMBB();
376 PPCInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, argument
[all...]
/external/llvm/include/llvm/Target/
H A DTargetInstrInfo.h247 /// just return false, leaving TBB/FBB null.
248 /// 2. If this block ends with only an unconditional branch, it sets TBB to be
251 /// successor block, it sets TBB to be the branch destination block and a
255 /// unconditional branch, it returns the 'true' destination in TBB, the
266 virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, argument
290 virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, argument
/external/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.cpp114 HexagonInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB, argument
122 assert(TBB && "InsertBranch must not be told to insert a fallthrough");
149 return InsertBranch(MBB, TBB, 0, Cond, DL);
152 BuildMI(&MBB, DL, get(BOpc)).addMBB(TBB);
155 get(BccOpc)).addReg(Cond[regPos].getReg()).addMBB(TBB);
160 BuildMI(&MBB, DL, get(BccOpc)).addReg(Cond[regPos].getReg()).addMBB(TBB);
168 MachineBasicBlock *&TBB,
172 TBB = NULL;
215 TBB = LastInst->getOperand(0).getMBB();
220 TBB
167 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
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/external/llvm/lib/Target/ARM/
H A DARMFastISel.cpp1274 MachineBasicBlock *TBB = FuncInfo.MBBMap[BI->getSuccessor(0)]; local
1287 if (FuncInfo.MBB->isLayoutSuccessor(TBB)) {
1288 std::swap(TBB, FBB);
1303 .addMBB(TBB).addImm(ARMPred).addReg(ARM::CPSR);
1305 FuncInfo.MBB->addSuccessor(TBB);
1319 if (FuncInfo.MBB->isLayoutSuccessor(TBB)) {
1320 std::swap(TBB, FBB);
1326 .addMBB(TBB).addImm(CCMode).addReg(ARM::CPSR);
1329 FuncInfo.MBB->addSuccessor(TBB);
1335 MachineBasicBlock *Target = (Imm == 0) ? FBB : TBB;
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H A DARMBaseInstrInfo.cpp267 ARMBaseInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, argument
291 TBB = LastInst->getOperand(0).getMBB();
296 TBB = LastInst->getOperand(0).getMBB();
317 TBB = LastInst->getOperand(0).getMBB();
332 TBB = SecondLastInst->getOperand(0).getMBB();
342 TBB = SecondLastInst->getOperand(0).getMBB();
395 ARMBaseInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, argument
407 assert(TBB && "InsertBranch must not be told to insert a fallthrough");
414 BuildMI(&MBB, DL, get(BOpc)).addMBB(TBB).addImm(ARMCC::AL).addReg(0);
416 BuildMI(&MBB, DL, get(BOpc)).addMBB(TBB);
[all...]
/external/llvm/lib/Target/X86/
H A DX86InstrInfo.cpp2476 MachineBasicBlock *&TBB,
2504 TBB = I->getOperand(0).getMBB();
2517 TBB = 0;
2524 // TBB is used to indicate the unconditional destination.
2525 TBB = I->getOperand(0).getMBB();
2574 FBB = TBB;
2575 TBB = I->getOperand(0).getMBB();
2584 assert(TBB);
2588 if (TBB != I->getOperand(0).getMBB())
2640 X86InstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, argument
2475 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
[all...]
/external/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.cpp1345 MachineBasicBlock *TBB,
1373 BOp->getOperand(1), NULL, TBB, FBB, CurBB);
1381 NULL, TBB, FBB, CurBB);
1387 MachineBasicBlock *TBB,
1399 EmitBranchForMergedCondition(Cond, TBB, FBB, CurBB, SwitchBB);
1411 // jmp_if_X TBB
1414 // jmp_if_Y TBB
1419 FindMergedConditions(BOp->getOperand(0), TBB, TmpBB, CurBB, SwitchBB, Opc);
1422 FindMergedConditions(BOp->getOperand(1), TBB, FBB, TmpBB, SwitchBB, Opc);
1429 // jmp_if_Y TBB
1344 EmitBranchForMergedCondition(const Value *Cond, MachineBasicBlock *TBB, MachineBasicBlock *FBB, MachineBasicBlock *CurBB, MachineBasicBlock *SwitchBB) argument
1386 FindMergedConditions(const Value *Cond, MachineBasicBlock *TBB, MachineBasicBlock *FBB, MachineBasicBlock *CurBB, MachineBasicBlock *SwitchBB, unsigned Opc) argument
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