Searched refs:ARM_AM (Results 1 - 18 of 18) sorted by relevance

/external/llvm/lib/Target/ARM/
H A DARMSelectionDAGInfo.h22 namespace ARM_AM { namespace in namespace:llvm
25 default: return ARM_AM::no_shift;
26 case ISD::SHL: return ARM_AM::lsl;
27 case ISD::SRL: return ARM_AM::lsr;
28 case ISD::SRA: return ARM_AM::asr;
29 case ISD::ROTR: return ARM_AM::ror;
33 //case ARMISD::RRX: return ARM_AM::rrx;
36 } // end namespace ARM_AM
H A DARMLoadStoreOptimizer.cpp137 static int getLoadStoreMultipleOpcode(int Opcode, ARM_AM::AMSubMode Mode) {
144 case ARM_AM::ia: return ARM::LDMIA;
145 case ARM_AM::da: return ARM::LDMDA;
146 case ARM_AM::db: return ARM::LDMDB;
147 case ARM_AM::ib: return ARM::LDMIB;
153 case ARM_AM::ia: return ARM::STMIA;
154 case ARM_AM::da: return ARM::STMDA;
155 case ARM_AM::db: return ARM::STMDB;
156 case ARM_AM::ib: return ARM::STMIB;
163 case ARM_AM
206 namespace ARM_AM { namespace in namespace:llvm
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H A DARMISelDAGToDAG.cpp95 ARM_AM::ShiftOpc ShOpcVal, unsigned ShAmt);
182 return ARM_AM::getSOImmVal(Imm) != -1;
186 return ARM_AM::getSOImmVal(~Imm) != -1;
190 return ARM_AM::getT2SOImmVal(Imm) != -1;
194 return ARM_AM::getT2SOImmVal(~Imm) != -1;
463 ARM_AM::ShiftOpc ShOpcVal,
470 return ShOpcVal == ARM_AM::lsl &&
481 ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(N.getOpcode());
485 if (ShOpcVal == ARM_AM
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H A DARMBaseInstrInfo.cpp166 bool isSub = ARM_AM::getAM2Op(OffImm) == ARM_AM::sub;
167 unsigned Amt = ARM_AM::getAM2Offset(OffImm);
169 if (ARM_AM::getSOImmVal(Amt) == -1)
178 ARM_AM::ShiftOpc ShOpc = ARM_AM::getAM2ShiftOpc(OffImm);
179 unsigned SOOpc = ARM_AM::getSORegOpc(ShOpc, Amt);
192 bool isSub = ARM_AM::getAM3Op(OffImm) == ARM_AM::sub;
193 unsigned Amt = ARM_AM
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H A DThumb2InstrInfo.cpp189 ARM_AM::getT2SOImmVal(NumBytes) == -1) {
249 if (ARM_AM::getT2SOImmVal(NumBytes) != -1) {
254 ThisVal = ThisVal & ARM_AM::rotr32(0xff000000U, RotAmt);
256 assert(ARM_AM::getT2SOImmVal(ThisVal) != -1 &&
262 if (ARM_AM::getT2SOImmVal(NumBytes) != -1) {
271 ThisVal = ThisVal & ARM_AM::rotr32(0xff000000U, RotAmt);
273 assert(ARM_AM::getT2SOImmVal(ThisVal) != -1 &&
427 if (ARM_AM::getT2SOImmVal(Offset) != -1) {
453 unsigned ThisImmVal = Offset & ARM_AM::rotr32(0xff000000U, RotAmt);
458 assert(ARM_AM
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H A DARMCodeEmitter.cpp434 switch (ARM_AM::getAM2ShiftOpc(Imm)) {
436 case ARM_AM::asr: return 2;
437 case ARM_AM::lsl: return 0;
438 case ARM_AM::lsr: return 1;
439 case ARM_AM::ror:
440 case ARM_AM::rrx: return 3;
780 assert(MO1.isImm() && ARM_AM::isSOImmTwoPartVal(MO1.getImm()) &&
782 unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO1.getImm());
783 unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO1.getImm());
1022 ARM_AM
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H A DARMBaseRegisterInfo.cpp421 InstrOffs = ARM_AM::getAM5Offset(OffOp.getImm());
422 if (ARM_AM::getAM5Op(OffOp.getImm()) == ARM_AM::sub)
429 InstrOffs = ARM_AM::getAM2Offset(MI->getOperand(ImmIdx).getImm());
430 if (ARM_AM::getAM2Op(MI->getOperand(ImmIdx).getImm()) == ARM_AM::sub)
436 InstrOffs = ARM_AM::getAM3Offset(MI->getOperand(ImmIdx).getImm());
437 if (ARM_AM::getAM3Op(MI->getOperand(ImmIdx).getImm()) == ARM_AM::sub)
H A DARMTargetTransformInfo.cpp154 (ARM_AM::getSOImmVal(ZImmVal) != -1) ||
155 (ARM_AM::getSOImmVal(~ZImmVal) != -1))
160 (ARM_AM::getT2SOImmVal(ZImmVal) != -1) ||
161 (ARM_AM::getT2SOImmVal(~ZImmVal) != -1))
167 if ((~ZImmVal < 256) || ARM_AM::isThumbImmShiftedVal(ZImmVal))
H A DARMExpandPseudoInsts.cpp633 unsigned SOImmValV1 = ARM_AM::getSOImmTwoPartFirst(ImmVal);
634 unsigned SOImmValV2 = ARM_AM::getSOImmTwoPartSecond(ImmVal);
830 .addImm(ARM_AM::getSORegOpc((Opcode == ARM::MOVsrl_flag ?
831 ARM_AM::lsr : ARM_AM::asr),
843 .addImm(ARM_AM::getSORegOpc(ARM_AM::rrx, 0)))
H A DARMFastISel.cpp174 bool SelectShift(const Instruction *I, ARM_AM::ShiftOpc ShiftTy);
524 Imm = ARM_AM::getFP64Imm(Val);
527 Imm = ARM_AM::getFP32Imm(Val);
580 bool UseImm = isThumb2 ? (ARM_AM::getT2SOImmVal(Imm) != -1) :
581 (ARM_AM::getSOImmVal(Imm) != -1);
1432 UseImm = isThumb2 ? (ARM_AM::getT2SOImmVal(Imm) != -1) :
1433 (ARM_AM::getSOImmVal(Imm) != -1);
1688 UseImm = isThumb2 ? (ARM_AM::getT2SOImmVal(Imm) != -1) :
1689 (ARM_AM::getSOImmVal(Imm) != -1);
2675 ARM_AM
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H A DARMISelLowering.cpp3329 unsigned EncodedVal = ARM_AM::createNEONModImm(0x6, 0x80);
3352 SDValue AllOnes = DAG.getTargetConstant(ARM_AM::createNEONModImm(0xe, 0xff),
4033 unsigned EncodedVal = ARM_AM::createNEONModImm(OpCmode, Imm);
4048 int ImmVal = ARM_AM::getFP32Imm(FPVal);
4347 if (ARM_AM::getSOImmVal(Val) != -1 || ARM_AM::getSOImmVal(~Val) != -1)
4390 int ImmVal = ARM_AM::getFP32Imm(SplatBits);
6445 .addImm(ARM_AM::getSORegOpc(ARM_AM::lsl, 2))));
6585 .addImm(ARM_AM
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H A DARMFrameLowering.cpp716 MIB.addImm(ARM_AM::getAM2Opc(ARM_AM::add, 4, ARM_AM::no_shift));
/external/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMAddressingModes.h25 /// ARM_AM - ARM Addressing Mode Stuff
26 namespace ARM_AM { namespace in namespace:llvm
48 case ARM_AM::asr: return "asr";
49 case ARM_AM::lsl: return "lsl";
50 case ARM_AM::lsr: return "lsr";
51 case ARM_AM::ror: return "ror";
52 case ARM_AM::rrx: return "rrx";
59 case ARM_AM::asr: return 2;
60 case ARM_AM::lsl: return 0;
61 case ARM_AM
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H A DARMMCCodeEmitter.cpp171 ARM_AM::AMSubMode Mode = (ARM_AM::AMSubMode)MI.getOperand(OpIdx).getImm();
174 case ARM_AM::da: return 0;
175 case ARM_AM::ia: return 1;
176 case ARM_AM::db: return 2;
177 case ARM_AM::ib: return 3;
182 unsigned getShiftOp(ARM_AM::ShiftOpc ShOpc) const {
184 case ARM_AM::no_shift:
185 case ARM_AM::lsl: return 0;
186 case ARM_AM
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H A DARMAsmBackend.cpp333 if (Ctx && ARM_AM::getSOImmVal(Value) == -1)
336 return ARM_AM::getSOImmVal(Value) | (opc << 21);
/external/llvm/lib/Target/ARM/InstPrinter/
H A DARMInstPrinter.cpp41 static void printRegImmShift(raw_ostream &O, ARM_AM::ShiftOpc ShOpc,
43 if (ShOpc == ARM_AM::no_shift || (ShOpc == ARM_AM::lsl && !ShImm))
47 assert (!(ShOpc == ARM_AM::ror && !ShImm) && "Cannot have ror #0");
50 if (ShOpc != ARM_AM::rrx) {
108 O << '\t' << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm()));
119 assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0);
130 O << '\t' << ARM_AM::getShiftOpcStr(ARM_AM
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/external/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp104 bool parseMemRegOffsetShift(ARM_AM::ShiftOpc &ShiftType,
379 ARM_AM::ShiftOpc ShiftType; // Shift type for OffsetReg
389 ARM_AM::ShiftOpc ShiftTy;
399 ARM_AM::ShiftOpc ShiftTy;
406 ARM_AM::ShiftOpc ShiftTy;
589 int Val = ARM_AM::getFP32Imm(APInt(32, CE->getValue()));
845 return ARM_AM::getSOImmVal(Value) != -1;
852 return ARM_AM::getSOImmVal(~Value) != -1;
860 return ARM_AM::getSOImmVal(Value) == -1 &&
861 ARM_AM
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/external/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp1126 ARM_AM::ShiftOpc Shift = ARM_AM::lsl;
1129 Shift = ARM_AM::lsl;
1132 Shift = ARM_AM::lsr;
1135 Shift = ARM_AM::asr;
1138 Shift = ARM_AM::ror;
1142 if (Shift == ARM_AM::ror && imm == 0)
1143 Shift = ARM_AM::rrx;
1165 ARM_AM::ShiftOpc Shift = ARM_AM
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