| dce4a407a24b04eebc6a376f8e62b41aaa7b071f |
|
29-May-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 23ed37a6b76e79272194fb46597f7280661b828f |
|
01-Jun-2013 |
Ahmed Bougacha <ahmed.bougacha@gmail.com> |
Make SubRegIndex size mandatory, following r183020.
This also makes TableGen able to compute sizes/offsets of synthesized
indices representing tuples.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183061 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| bed23081860275c79137f65d592920e7991b8198 |
|
31-May-2013 |
Ahmed Bougacha <ahmed.bougacha@gmail.com> |
Add a way to define the bit range covered by a SubRegIndex.
NOTE: If this broke your out-of-tree backend, in *RegisterInfo.td, change
the instances of SubRegIndex that have a comps template arg to use the
ComposedSubRegIndex class instead.
In TableGen land, this adds Size and Offset attributes to SubRegIndex,
and the ComposedSubRegIndex class, for which the Size and Offset are
computed by TableGen. This also adds an accessor in MCRegisterInfo, and
Size/Offsets for the X86 and ARM subreg indices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183020 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 2275cfd75b65ede0f46f3cf914e76a38daf96417 |
|
28-May-2013 |
Chad Rosier <mcrosier@apple.com> |
Remove the MCRegAliasIterator tables and compute the aliases dynamically.
The size reduction in the RegDiffLists are rather dramatic. Here are a few
size differences for MCTargetDesc.o files (before and after) in bytes:
R600 - 36160B - 11184B - 69% reduction
ARM - 28480B - 8368B - 71% reduction
Mips - 816B - 576B - 29% reduction
One side effect of dynamically computing the aliases is that the iterator does
not guarantee that the entries are ordered or that duplicates have been removed.
The documentation implies this is a safe assumption and I found no clients that
requires these attributes (i.e., strict ordering and uniqueness).
My local LNT tester results showed no execution-time failures or significant
compile-time regressions (i.e., beyond what I would consider noise) for -O0g,
-O2 and -O3 runs on x86_64 and i386 configurations.
rdar://12906217
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182783 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 549221f18c8248cd5daa8967ba999b91b1fe2584 |
|
23-May-2013 |
Chad Rosier <mcrosier@apple.com> |
Minor fix to comment from my previous commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182536 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 6cd0d18f5ef4405bfc6d0b42a0cfc8e36a7c7c3d |
|
23-May-2013 |
Chad Rosier <mcrosier@apple.com> |
Simplify the logic described in the comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182534 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 0e1fae4cf22956f59d392b2fc1681075804596ba |
|
22-May-2013 |
Chad Rosier <mcrosier@apple.com> |
Add the IncludeSelf parameter to the MCSubRegIterator and MCSuperRegIterator
constructors. No functional change.
Part of rdar://12906217
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182490 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 70fe6ecb6d0c3b556f2c4e3c1e5013da821beded |
|
21-Dec-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add a missing assertion, the null register has no register units.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170916 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 39758cd55d994c0899acfb365d717e9f877ca001 |
|
20-Dec-2012 |
Jim Grosbach <grosbach@apple.com> |
Clean up some DOxygen comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170628 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| fbf3b4a07690751f72302757058ab0298dfb832e |
|
20-Dec-2012 |
Jim Grosbach <grosbach@apple.com> |
MC: Add MCInstrDesc::mayAffectControlFlow() method.
MC disassembler clients (LLDB) are interested in querying if an
instruction may affect control flow other than by virtue of being
an explicit branch instruction. For example, instructions which
write directly to the PC on some architectures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170610 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 16f3204b95c952a70c9d2aa3b423162215beb6ae |
|
20-Dec-2012 |
Jim Grosbach <grosbach@apple.com> |
Add isSubRegisterEq() and isSuperRegisterEq().
isSub and isSuper return false if RegA == RegB. Add variants which also
include the identity function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170609 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| e188fb7dd91c6fee15aa18c877d664d63d736000 |
|
20-Dec-2012 |
Jim Grosbach <grosbach@apple.com> |
Move isSubRegister() and isSuperRegister to MCRegisterInfo.
These were defined on TargetRegisterInfo, but they don't use any information
that's not available in MCRegisterInfo, so sink them down to be available
at the MC layer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170608 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| e26e8a64ab37e98c69801ac2028b187773bc1d1f |
|
29-Nov-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add an MCPhysReg typedef to replace naked uint16_t.
Use this type for arrays of physical registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168850 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| f29c05e883dc46f3f1be9b3a5f5c50ee73899380 |
|
27-Oct-2012 |
Lang Hames <lhames@gmail.com> |
MCRegisterClass should be returned by const ref, not by value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166822 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 59f45e4610e64b88bcee4cd46816ef64e815ff7e |
|
11-Sep-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add MCRI::getNumSubRegIndices() and start checking SubRegIndex ranges.
Apparently, NumSubRegIndices was completely unused before. Adjust it by
one to include the null subreg index, just like getNumRegs() includes
the null register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163628 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 46c0dc7858da65707340ca62b258f8956def78e8 |
|
27-Jul-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Give MCRegisterInfo an implementation file.
Move some functions from MCRegisterInfo.h that don't need to be inline.
This shrinks llc by 8K.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160865 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 0371cd8b1c0d2101295ca9381a0b437e1f2d8fa2 |
|
27-Jul-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Eliminate the large XXXSubRegTable constant arrays.
These tables were indexed by [register][subreg index] which made them,
very large and sparse.
Replace them with lists of sub-register indexes that match the existing
lists of sub-registers. MCRI::getSubReg() becomes a very short linear
search, like getSubRegIndex() already was.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160843 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 303c909d5bb014fbeec395090eb467d724969195 |
|
25-Jul-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Differentially encode all MC register lists.
This simplifies MCRegisterInfo and shrinks the target descriptions a bit
more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160758 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 22de91aec556d44ee580c2e42f45c7675da98349 |
|
02-Jun-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove the old register list functions from MCRegisterInfo.
These functions exposed the layout of the underlying data tables as
null-terminated uint16_t arrays.
Use the new MCSubRegIterator, MCSuperRegIterator, and MCRegAliasIterator
classes instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157855 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 396618b43a85e12d290a90b181c6af5d7c0c5f11 |
|
02-Jun-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Switch all register list clients to the new MC*Iterator interface.
No functional change intended.
Sorry for the churn. The iterator classes are supposed to help avoid
giant commits like this one in the future. The TableGen-produced
register lists are getting quite large, and it may be necessary to
change the table representation.
This makes it possible to do so without changing all clients (again).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157854 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| f5d4e5158fcbec26d1c243daa725878ca1ae560b |
|
31-May-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Emit register unit root tables.
Each register unit has one or two root registers. The full set of
registers containing a given register unit can be computed as the union
of the root registers and their super-registers.
Provide an MCRegUnitRootIterator class to enumerate the roots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157753 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| cd00ef033cf944fc96a0d06ffcf49cd805fc4ee3 |
|
30-May-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add MCRegisterInfo::RegListIterator.
Also add subclasses MCSubRegIterator, MCSuperRegIterator, and
MCRegAliasIterator.
These iterators provide an abstract interface to the MCRegisterInfo
register lists so the internal representation can be changed without
changing all clients.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157695 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 209cdc2999208e9783349e970bd96fc37557fd97 |
|
30-May-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Make DiffListIterator public to unbreak the gcc buildbots.
Apparently, a friend can't derive from a private class according to gcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157654 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| f52baf72c116d9cf8680d25a8e751ce354c7d44b |
|
30-May-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Emit register unit lists for each register.
Register units are already used internally in TableGen to compute
register pressure sets and overlapping registers. This patch makes them
available to the code generators.
The register unit lists are differentially encoded so they can be reused
for many related registers. This keeps the total size of the lists below
200 bytes for most targets. ARM has the largest table at 560 bytes.
Add an MCRegUnitIterator for traversing the register unit lists. It
provides an abstract interface so the representation can be changed in
the future without changing all clients.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157650 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| d5ce3ffa67698b9d21f58011f370a210a214d301 |
|
25-May-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Compress MCRegisterInfo register name tables.
Store (debugging) register names as offsets into a string table instead
of as char pointers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157449 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 0ee07e013095e8c298fbcc5203e0bc9f334e15e1 |
|
15-May-2012 |
Jim Grosbach <grosbach@apple.com> |
TableGen'erate mapping physical registers to encoding values.
Many targets always use the same bitwise encoding value for physical
registers in all (or most) instructions. Add this mapping to the
.td files and TableGen'erate the information and expose an accessor
in MCRegisterInfo.
patch by Tom Stellard.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156829 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 32d1774d45532508c9c76fa8e4dad9454ec50656 |
|
04-Apr-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Implement DwarfLLVMRegPair::operator< without violating asymmetry.
MSVC8 verifies this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154002 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 243018ffcf764e4dde2968f909f4a2e578aafe86 |
|
01-Apr-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Emit the LLVM<->DWARF register mapping as a sorted table and use binary search to do the lookup.
This also avoids emitting the information twice, which led to code bloat. On i386-linux-Release+Asserts
with all targets built this change shaves a whopping 1.3 MB off clang. The number is probably exaggerated
by recent inliner changes but the methods were already enormous with the old inline cost computation.
The DWARF reg -> LLVM reg mapping doesn't seem to have holes in it, so it could be a simple lookup table.
I didn't implement that optimization yet to avoid potentially changing functionality.
There is still some duplication both in tablegen and the generated code that should be cleaned up eventually.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153837 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 0d4e2ea00eac5d51a74a54dd504a8f34580041d7 |
|
30-Mar-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Reapply 153764 and 153761 with a fix.
Use an explicit comparator instead of the default.
The sets are sorted, but not using the default comparator. Hopefully,
this will unbreak the Linux builders.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153772 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 77ff8bbc2abf13b269bf1e66526e813955b078a7 |
|
30-Mar-2012 |
Rafael Espindola <rafael.espindola@gmail.com> |
Revert 153764 and 153761. They broke a --enable-optimized --enable-assertions
--enable-expensive-checks build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153771 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 8f36b0b139b5ba683eedf022f1b0c1279b680cf7 |
|
30-Mar-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Compress register lists by sharing suffixes.
TableGen emits lists of sub-registers, super-registers, and overlaps. Put
them all in a single table and use a SequenceToOffsetTable to share
suffixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153761 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| aff18aee5632d8cb5ed7e299df4cb451bf12c834 |
|
06-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Increase number of allowed registers in register classes to 64k instead of 256. Widen register class ID to 16-bits. Widen register size and alignment to be up to 64k bytes instead of 256 bytes. This partially reverts r152019 to be less restrictive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152100 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 696f5ab12ef4beea368c5343ed1db443e9a7fead |
|
06-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Revert r152016 and allow overlap, sub, super register tables to be more than 64k entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152099 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 28f08c93e75d291695ea89b9004145103292e85b |
|
05-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM refactor away a bunch of VLD/VST pseudo instructions.
With the new composite physical registers to represent arbitrary pairs
of DPR registers, we don't need the pseudo-registers anymore. Get rid of
a bunch of them that use DPR register pairs and just use the real
instructions directly instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152045 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 33ca87affb81b60c4d50214eb7458bd26d397d53 |
|
05-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
MCRegisterInfo-ize getMatchingSuperReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152044 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 52b89dd303424582d054e18417099f3a7e343b41 |
|
05-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Shrink and reorder fields in MCRegisterClass to reduce size of static data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152019 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 9ebfbf8b9fd5f982e0db9293808bd32168615ba9 |
|
05-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce static data size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152016 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| e4fd907e72a599eddfa7a81eac4366b5b82523e3 |
|
04-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Use uint16_t to store register overlaps to reduce static data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152001 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| b6632ba380cf624e60fe16b03d6e21b05dd07724 |
|
04-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Use uint16_t instead of unsigned to store registers in reg classes. Reduces static data size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151998 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 4b1212b4bfac98c688d484bf22ae158875f06ad5 |
|
01-Mar-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Move getSubRegIndex out of generated code into MCRegisterInfo, devirtualize it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151821 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| b3acdcc00c9dfb01663780e858e586cc5f04423f |
|
01-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
Move TargetRegisterInfo::getSubReg() to MCRegisterInfo.
Allows us to de-virtualize the function and provides access to it in
the instruction printer, which is useful for handling composite
physical registers (e.g., ARM register lists).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151815 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 9d91c5d31c6758124559c0916d852295f47a2bec |
|
23-Feb-2012 |
Craig Topper <craig.topper@gmail.com> |
Remove 'if' from getSuperRegisters, getSubRegisters, and getOverlaps that were added in r151038.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151246 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| 7d9b20792bfc528647f8bd7644934b228cc6c60b |
|
21-Feb-2012 |
Craig Topper <craig.topper@gmail.com> |
Reorder some members in MCRegisterClass to remove padding on 64-bit builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151043 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
|
| f3e3783012dc7875ed37be8aaaefd96f98454781 |
|
21-Feb-2012 |
Craig Topper <craig.topper@gmail.com> |
In generated RegisterInfo files, replace a pointer to the end of an array with just the size of the array to avoid relocations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151041 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
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| 4472838fc8a7f2f08aec27c284b64bc28bef0468 |
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21-Feb-2012 |
Craig Topper <craig.topper@gmail.com> |
Merge some tables in generated RegisterInfo file. Store indices into larger table instead of pointers to reduce relocations and shrink table size on 64-bit builds. Shaves ~24K off X86MCTargetDesc.o
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151038 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
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| 90a468c424f7d0a85b3dc783634106d9a46d6688 |
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08-Feb-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Value initialize MCRegisterClasses. Not sure how could miss this during the MCTargetDesc refactor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150076 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
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| 50bee42b54cd9aec5f49566307df2b0cf23afcf6 |
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05-Feb-2012 |
Craig Topper <craig.topper@gmail.com> |
Convert assert(0) to llvm_unreachable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149849 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
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| 492be647722fc2f372e650ce4a5d9e10171dbe0e |
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27-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
Trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143113 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
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| 59a4f9af0a2e94ec04840a066251eca34bf3e3f8 |
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23-Jul-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Fix a silly off by one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135842 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
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| 71883edee29bbbbf3af2aca08de9e50e257252e7 |
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23-Jul-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Add more constness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135838 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
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| 9df8567548e15c6cd91e8a5851784574c4f09528 |
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23-Jul-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Turn the DenseSet in MCRegisterClass into a tblgenerated bit field. This should be faster and smaller.
Goodbye static ctors and dtors!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135836 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
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| 8ca9a862038e8c4e9a2ca73b3b75e1be3425155f |
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22-Jul-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Teach tblgen to emit MCRegisterClasses.
- This currently introduces more instances of the static DenseSet dtor, but that should be fixable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135735 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
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| a50c175fe3c7a3034df18747cfacb3b153c493c8 |
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21-Jul-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Sink parts of TargetRegisterClass into MCRegisterClass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135683 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
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| 0e6a052331f674dd70e28af41f654a7874405eab |
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18-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down
to MCRegisterInfo. Also initialize the mapping at construction time.
This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step
towards fixing the layering violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135424 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
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| e837dead3c8dc3445ef6a0e2322179c57e264a13 |
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28-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134021 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
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| 5e6b4605bd620a864055276a6d454e5a18f9fee8 |
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25-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
Rename TargetRegisterDesc to MCRegisterDesc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133845 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
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| f5fa52ed064098be7130aa4ec1236037907ce3fa |
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24-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
- Add MCRegisterInfo registration machinery. Also added x86 registration routines.
- Rename TargetRegisterDesc to MCRegisterDesc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133820 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
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| a347f85dbeee37a7f2bb68df1a7d4cdfbb7b576d |
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24-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
Starting to refactor Target to separate out code that's needed to fully describe
target machine from those that are only needed by codegen. The goal is to
sink the essential target description into MC layer so we can start building
MC based tools without needing to link in the entire codegen.
First step is to refactor TargetRegisterInfo. This patch added a base class
MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to
separate register description from the rest of the stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133782 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/MC/MCRegisterInfo.h
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