Searched defs:CondCycles (Results 1 - 5 of 5) sorted by relevance
| /external/llvm/lib/CodeGen/ |
| H A D | EarlyIfConversion.cpp | 114 int CondCycles, TCycles, FCycles; member in struct:__anon25739::SSAIfConv::PHIInfo
117 : PHI(phi), TReg(0), FReg(0), CondCycles(0), TCycles(0), FCycles(0) {}
424 PI.CondCycles, PI.TCycles, PI.FCycles)) {
725 unsigned CondDepth = adjCycles(BranchDepth, PI.CondCycles);
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| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 371 unsigned TrueReg, unsigned FalseReg, int &CondCycles, int &TrueCycles,
388 CondCycles = 1 + ExtraCondLat;
401 CondCycles = 5 + ExtraCondLat;
369 canInsertSelect( const MachineBasicBlock &MBB, const SmallVectorImpl<MachineOperand> &Cond, unsigned TrueReg, unsigned FalseReg, int &CondCycles, int &TrueCycles, int &FalseCycles) const argument
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| /external/llvm/include/llvm/Target/ |
| H A D | TargetInstrInfo.h | 418 /// instruction will be 1 cycle, so CondCycles = TrueCycles = FalseCycles = 1
426 /// @param CondCycles Latency from Cond+Branch to select output.
432 int &CondCycles,
429 canInsertSelect(const MachineBasicBlock &MBB, const SmallVectorImpl<MachineOperand> &Cond, unsigned TrueReg, unsigned FalseReg, int &CondCycles, int &TrueCycles, int &FalseCycles) const argument
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| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 587 int &CondCycles, int &TrueCycles, int &FalseCycles) const {
617 CondCycles = 1;
584 canInsertSelect(const MachineBasicBlock &MBB, const SmallVectorImpl<MachineOperand> &Cond, unsigned TrueReg, unsigned FalseReg, int &CondCycles, int &TrueCycles, int &FalseCycles) const argument
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| /external/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 2974 int &CondCycles, int &TrueCycles, int &FalseCycles) const {
2997 CondCycles = 2;
2971 canInsertSelect(const MachineBasicBlock &MBB, const SmallVectorImpl<MachineOperand> &Cond, unsigned TrueReg, unsigned FalseReg, int &CondCycles, int &TrueCycles, int &FalseCycles) const argument
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