Searched refs:TRI (Results 26 - 50 of 233) sorted by relevance

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/external/llvm/lib/CodeGen/
H A DAggressiveAntiDepBreaker.cpp123 TRI(MF.getTarget().getRegisterInfo()),
129 BitVector CPSet = TRI->getAllocatableSet(MF, CriticalPathRCs[i]);
139 dbgs() << " " << TRI->getName(r));
149 State = new AggressiveAntiDepState(TRI->getNumRegs(), BB);
160 for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI) {
173 for (const MCPhysReg *I = TRI->getCalleeSavedRegs(&MF); *I; ++I) {
176 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) {
204 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) {
213 dbgs() << " " << TRI->getName(Reg) << "=g" <<
251 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSel
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H A DCriticalAntiDepBreaker.cpp35 TRI(MF.getTarget().getRegisterInfo()),
37 Classes(TRI->getNumRegs(), nullptr),
38 KillIndices(TRI->getNumRegs(), 0),
39 DefIndices(TRI->getNumRegs(), 0),
40 KeepRegs(TRI->getNumRegs(), false) {}
47 for (unsigned i = 0, e = TRI->getNumRegs(); i != e; ++i) {
66 for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI) {
79 for (const MCPhysReg *I = TRI->getCalleeSavedRegs(&MF); *I; ++I) {
81 for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI) {
108 for (unsigned Reg = 0; Reg != TRI
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H A DInterferenceCache.cpp35 if (PhysRegEntriesCount == TRI->getNumRegs()) return;
37 PhysRegEntriesCount = TRI->getNumRegs();
49 TRI = tri;
58 if (!Entries[E].valid(LIUArray, TRI))
59 Entries[E].revalidate(LIUArray, TRI);
73 Entries[E].reset(PhysReg, LIUArray, TRI, MF);
82 const TargetRegisterInfo *TRI) {
88 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units, ++i)
94 const TargetRegisterInfo *TRI,
105 for (MCRegUnitIterator Units(PhysReg, TRI); Unit
81 revalidate(LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI) argument
92 reset(unsigned physReg, LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI, const MachineFunction *MF) argument
111 valid(LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI) argument
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H A DLocalStackSlotAllocation.cpp105 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo(); local
110 if (!TRI->requiresVirtualBaseRegisters(MF) || LocalObjectCount == 0)
258 const TargetRegisterInfo *TRI) {
262 return TRI->isFrameOffsetLegal(MI, Offset);
275 const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo(); local
312 if (!TRI->needsFrameBaseReg(MI, LocalOffset))
364 LocalOffset, MI, TRI)) {
371 int64_t InstrOffset = TRI->getFrameIndexInstrOffset(MI, idx);
385 FrameReferenceInsns[ref + 1].getMachineInstr(), TRI)) {
391 const TargetRegisterClass *RC = TRI
254 lookupCandidateBaseReg(int64_t BaseOffset, int64_t FrameSizeAdjust, int64_t LocalFrameOffset, const MachineInstr *MI, const TargetRegisterInfo *TRI) argument
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H A DStackMapLivenessAnalysis.cpp70 TRI = MF->getTarget().getRegisterInfo();
88 LiveRegs.init(TRI);
122 uint32_t *Mask = MF->allocateRegisterMask(TRI->getNumRegs());
H A DRegAllocFast.cpp59 const TargetRegisterInfo *TRI; member in class:__anon25790::RAFast
126 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units)
132 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units)
241 LR.LastUse->addRegisterKilled(LR.PhysReg, TRI, true);
286 DEBUG(dbgs() << "Spilling " << PrintReg(LRI->VirtReg, TRI)
287 << " in " << PrintReg(LR.PhysReg, TRI));
291 TII->storeRegToStackSlot(*MBB, MI, LR.PhysReg, SpillKill, FI, RC, TRI);
366 for (MCRegAliasIterator AI(PhysReg, TRI, false); AI.isValid(); ++AI) {
372 assert(TRI->isSuperRegister(PhysReg, Alias) &&
376 MO.getParent()->addRegisterKilled(Alias, TRI, tru
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H A DStackMaps.cpp139 static unsigned getDwarfRegNum(unsigned Reg, const TargetRegisterInfo *TRI) { argument
140 int RegNo = TRI->getDwarfRegNum(Reg, false);
141 for (MCSuperRegIterator SR(Reg, TRI); SR.isValid() && RegNo < 0; ++SR)
142 RegNo = TRI->getDwarfRegNum(*SR, false);
150 StackMaps::createLiveOutReg(unsigned Reg, const TargetRegisterInfo *TRI) const {
151 unsigned RegNo = getDwarfRegNum(Reg, TRI);
152 unsigned Size = TRI->getMinimalPhysRegClass(Reg)->getSize();
161 const TargetRegisterInfo *TRI = AP.TM.getRegisterInfo(); local
165 for (unsigned Reg = 0, NumRegs = TRI->getNumRegs(); Reg != NumRegs; ++Reg)
167 LiveOuts.push_back(createLiveOutReg(Reg, TRI));
359 emitCallsiteEntries(MCStreamer &OS, const TargetRegisterInfo *TRI) argument
488 const TargetRegisterInfo *TRI = AP.TM.getRegisterInfo(); local
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H A DLiveStackAnalysis.cpp52 TRI = MF.getTarget().getRegisterInfo();
69 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC);
H A DInterferenceCache.h25 const TargetRegisterInfo *TRI; member in class:llvm::InterferenceCache
113 void revalidate(LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI);
116 bool valid(LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI);
121 const TargetRegisterInfo *TRI,
153 : TRI(nullptr), LIUArray(nullptr), MF(nullptr), PhysRegEntries(nullptr),
H A DLiveVariables.cpp197 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) {
219 if (TRI->isSubRegister(Reg, DefReg)) {
220 for (MCSubRegIterator SubRegs(DefReg, TRI, /*IncludeSelf=*/true);
251 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) {
263 for (MCSubRegIterator SS(SubReg, TRI); SS.isValid(); ++SS)
274 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
290 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) {
339 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) {
353 for (MCSubRegIterator SS(SubReg, TRI, /*IncludeSelf=*/true); SS.isValid();
369 PhysRegDef[Reg]->addRegisterDead(Reg, TRI, tru
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H A DRegisterCoalescer.cpp82 const TargetRegisterInfo* TRI; member in class:__anon25794::RegisterCoalescer
258 if (!isMoveInstr(TRI, MI, Src, Dst, SrcSub, DstSub))
276 Dst = TRI.getSubReg(Dst, DstSub);
283 Dst = TRI.getMatchingSuperReg(Dst, SrcSub, MRI.getRegClass(Src));
299 NewRC = TRI.getCommonSuperRegClass(SrcRC, SrcSub, DstRC, DstSub,
306 NewRC = TRI.getMatchingSuperRegClass(DstRC, SrcRC, DstSub);
310 NewRC = TRI.getMatchingSuperRegClass(SrcRC, DstRC, SrcSub);
313 NewRC = TRI.getCommonSubClass(DstRC, SrcRC);
352 if (!isMoveInstr(TRI, MI, Src, Dst, SrcSub, DstSub))
370 Dst = TRI
1306 const TargetRegisterInfo *TRI; member in class:__anon25795::JoinVals
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/external/eigen/test/
H A Dproduct_trsolve.cpp12 #define VERIFY_TRSM(TRI,XB) { \
14 (TRI).solveInPlace(XB); \
15 VERIFY_IS_APPROX((TRI).toDenseMatrix() * (XB), ref); \
17 (XB) = (TRI).solve(XB); \
18 VERIFY_IS_APPROX((TRI).toDenseMatrix() * (XB), ref); \
21 #define VERIFY_TRSM_ONTHERIGHT(TRI,XB) { \
23 (TRI).transpose().template solveInPlace<OnTheRight>(XB.transpose()); \
24 VERIFY_IS_APPROX((XB).transpose() * (TRI).transpose().toDenseMatrix(), ref.transpose()); \
26 (XB).transpose() = (TRI).transpose().template solve<OnTheRight>(XB.transpose()); \
27 VERIFY_IS_APPROX((XB).transpose() * (TRI)
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H A Dproduct_mmtr.cpp12 #define CHECK_MMTR(DEST, TRI, OP) { \
14 DEST.template triangularView<TRI>() OP; \
16 ref2.template triangularView<TRI>() = ref1; \
/external/llvm/include/llvm/CodeGen/
H A DMachineInstr.h782 const TargetRegisterInfo *TRI = nullptr) const {
783 return findRegisterUseOperandIdx(Reg, false, TRI) != -1;
804 const TargetRegisterInfo *TRI = nullptr) const {
805 return findRegisterUseOperandIdx(Reg, true, TRI) != -1;
813 const TargetRegisterInfo *TRI = nullptr) const {
814 return findRegisterDefOperandIdx(Reg, false, false, TRI) != -1;
820 bool modifiesRegister(unsigned Reg, const TargetRegisterInfo *TRI) const {
821 return findRegisterDefOperandIdx(Reg, false, true, TRI) != -1;
828 const TargetRegisterInfo *TRI = nullptr) const {
829 return findRegisterDefOperandIdx(Reg, true, false, TRI) !
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H A DRegisterPressure.h43 void increase(unsigned Reg, const TargetRegisterInfo *TRI,
50 void decrease(unsigned Reg, const TargetRegisterInfo *TRI,
53 void dump(const TargetRegisterInfo *TRI) const;
252 const TargetRegisterInfo *TRI;
288 MF(nullptr), TRI(nullptr), RCI(nullptr), LIS(nullptr), MBB(nullptr), P(rp),
292 MF(nullptr), TRI(nullptr), RCI(nullptr), LIS(nullptr), MBB(nullptr), P(rp),
438 const TargetRegisterInfo *TRI);
/external/llvm/lib/Target/AArch64/
H A DAArch64FrameLowering.h49 const TargetRegisterInfo *TRI) const override;
54 const TargetRegisterInfo *TRI) const override;
/external/llvm/lib/Target/ARM/
H A DThumb2InstrInfo.h51 const TargetRegisterInfo *TRI) const override;
57 const TargetRegisterInfo *TRI) const override;
H A DThumb2ITBlockPass.cpp34 const TargetRegisterInfo *TRI; member in class:__anon26005::Thumb2ITBlockPass
59 const TargetRegisterInfo *TRI) {
78 for (MCSubRegIterator Subreg(Reg, TRI, /*IncludeSelf=*/true);
85 for (MCSubRegIterator Subreg(Reg, TRI, /*IncludeSelf=*/true);
180 TrackDefUses(MI, Defs, Uses, TRI);
230 TrackDefUses(NMI, Defs, Uses, TRI);
259 TRI = TM.getRegisterInfo();
56 TrackDefUses(MachineInstr *MI, SmallSet<unsigned, 4> &Defs, SmallSet<unsigned, 4> &Uses, const TargetRegisterInfo *TRI) argument
/external/llvm/lib/Target/MSP430/
H A DMSP430InstrInfo.h65 const TargetRegisterInfo *TRI) const override;
70 const TargetRegisterInfo *TRI) const override;
/external/llvm/lib/Target/Sparc/
H A DSparcInstrInfo.h87 const TargetRegisterInfo *TRI) const override;
93 const TargetRegisterInfo *TRI) const override;
/external/llvm/lib/Target/SystemZ/
H A DSystemZFrameLowering.h35 const TargetRegisterInfo *TRI) const override;
39 const TargetRegisterInfo *TRI) const
/external/llvm/lib/Target/XCore/
H A DXCoreInstrInfo.h74 const TargetRegisterInfo *TRI) const override;
80 const TargetRegisterInfo *TRI) const override;
/external/llvm/lib/Target/Hexagon/
H A DHexagonCopyToCombine.cpp60 const TargetRegisterInfo *TRI; member in class:__anon26009::HexagonCopyToCombine
171 static bool areCombinableOperations(const TargetRegisterInfo *TRI, argument
183 static_cast<const HexagonRegisterInfo *>(TRI);
223 const TargetRegisterInfo *TRI) {
224 return (UseReg && (I->modifiesRegister(UseReg, TRI))) ||
225 I->modifiesRegister(DestReg, TRI) ||
226 I->readsRegister(DestReg, TRI) ||
244 if (I2UseReg && I1->modifiesRegister(I2UseReg, TRI))
274 if (isUnsafeToMoveAcross(&*I, I2UseReg, I2DestReg, TRI)) {
281 I->readsRegister(KilledOperand, TRI))
221 isUnsafeToMoveAcross(MachineInstr *I, unsigned UseReg, unsigned DestReg, const TargetRegisterInfo *TRI) argument
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/external/llvm/lib/CodeGen/AsmPrinter/
H A DDbgValueHistoryCalculator.cpp116 const TargetRegisterInfo *TRI,
121 for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid(); ++AI)
150 const TargetRegisterInfo *TRI,
158 collectClobberedRegisters(MI, TRI, Regs);
164 const TargetRegisterInfo *TRI,
167 collectChangingRegs(MF, TRI, ChangingRegs);
176 collectClobberedRegisters(MI, TRI, MIClobberedRegs);
115 collectClobberedRegisters(const MachineInstr &MI, const TargetRegisterInfo *TRI, std::set<unsigned> &Regs) argument
149 collectChangingRegs(const MachineFunction *MF, const TargetRegisterInfo *TRI, std::set<unsigned> &Regs) argument
163 calculateDbgValueHistory(const MachineFunction *MF, const TargetRegisterInfo *TRI, DbgValueHistoryMap &Result) argument
/external/llvm/include/llvm/Target/
H A DTargetFrameLowering.h104 const TargetRegisterInfo *TRI,
152 const TargetRegisterInfo *TRI) const {
163 const TargetRegisterInfo *TRI) const {
103 assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector<CalleeSavedInfo> &CSI) const argument

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