/external/llvm/lib/CodeGen/ |
H A D | AggressiveAntiDepBreaker.cpp | 123 TRI(MF.getTarget().getRegisterInfo()), 129 BitVector CPSet = TRI->getAllocatableSet(MF, CriticalPathRCs[i]); 139 dbgs() << " " << TRI->getName(r)); 149 State = new AggressiveAntiDepState(TRI->getNumRegs(), BB); 160 for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI) { 173 for (const MCPhysReg *I = TRI->getCalleeSavedRegs(&MF); *I; ++I) { 176 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { 204 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { 213 dbgs() << " " << TRI->getName(Reg) << "=g" << 251 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSel [all...] |
H A D | CriticalAntiDepBreaker.cpp | 35 TRI(MF.getTarget().getRegisterInfo()), 37 Classes(TRI->getNumRegs(), nullptr), 38 KillIndices(TRI->getNumRegs(), 0), 39 DefIndices(TRI->getNumRegs(), 0), 40 KeepRegs(TRI->getNumRegs(), false) {} 47 for (unsigned i = 0, e = TRI->getNumRegs(); i != e; ++i) { 66 for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI) { 79 for (const MCPhysReg *I = TRI->getCalleeSavedRegs(&MF); *I; ++I) { 81 for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI) { 108 for (unsigned Reg = 0; Reg != TRI [all...] |
H A D | InterferenceCache.cpp | 35 if (PhysRegEntriesCount == TRI->getNumRegs()) return; 37 PhysRegEntriesCount = TRI->getNumRegs(); 49 TRI = tri; 58 if (!Entries[E].valid(LIUArray, TRI)) 59 Entries[E].revalidate(LIUArray, TRI); 73 Entries[E].reset(PhysReg, LIUArray, TRI, MF); 82 const TargetRegisterInfo *TRI) { 88 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units, ++i) 94 const TargetRegisterInfo *TRI, 105 for (MCRegUnitIterator Units(PhysReg, TRI); Unit 81 revalidate(LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI) argument 92 reset(unsigned physReg, LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI, const MachineFunction *MF) argument 111 valid(LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI) argument [all...] |
H A D | LocalStackSlotAllocation.cpp | 105 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo(); local 110 if (!TRI->requiresVirtualBaseRegisters(MF) || LocalObjectCount == 0) 258 const TargetRegisterInfo *TRI) { 262 return TRI->isFrameOffsetLegal(MI, Offset); 275 const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo(); local 312 if (!TRI->needsFrameBaseReg(MI, LocalOffset)) 364 LocalOffset, MI, TRI)) { 371 int64_t InstrOffset = TRI->getFrameIndexInstrOffset(MI, idx); 385 FrameReferenceInsns[ref + 1].getMachineInstr(), TRI)) { 391 const TargetRegisterClass *RC = TRI 254 lookupCandidateBaseReg(int64_t BaseOffset, int64_t FrameSizeAdjust, int64_t LocalFrameOffset, const MachineInstr *MI, const TargetRegisterInfo *TRI) argument [all...] |
H A D | StackMapLivenessAnalysis.cpp | 70 TRI = MF->getTarget().getRegisterInfo(); 88 LiveRegs.init(TRI); 122 uint32_t *Mask = MF->allocateRegisterMask(TRI->getNumRegs());
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H A D | RegAllocFast.cpp | 59 const TargetRegisterInfo *TRI; member in class:__anon25790::RAFast 126 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) 132 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) 241 LR.LastUse->addRegisterKilled(LR.PhysReg, TRI, true); 286 DEBUG(dbgs() << "Spilling " << PrintReg(LRI->VirtReg, TRI) 287 << " in " << PrintReg(LR.PhysReg, TRI)); 291 TII->storeRegToStackSlot(*MBB, MI, LR.PhysReg, SpillKill, FI, RC, TRI); 366 for (MCRegAliasIterator AI(PhysReg, TRI, false); AI.isValid(); ++AI) { 372 assert(TRI->isSuperRegister(PhysReg, Alias) && 376 MO.getParent()->addRegisterKilled(Alias, TRI, tru [all...] |
H A D | StackMaps.cpp | 139 static unsigned getDwarfRegNum(unsigned Reg, const TargetRegisterInfo *TRI) { argument 140 int RegNo = TRI->getDwarfRegNum(Reg, false); 141 for (MCSuperRegIterator SR(Reg, TRI); SR.isValid() && RegNo < 0; ++SR) 142 RegNo = TRI->getDwarfRegNum(*SR, false); 150 StackMaps::createLiveOutReg(unsigned Reg, const TargetRegisterInfo *TRI) const { 151 unsigned RegNo = getDwarfRegNum(Reg, TRI); 152 unsigned Size = TRI->getMinimalPhysRegClass(Reg)->getSize(); 161 const TargetRegisterInfo *TRI = AP.TM.getRegisterInfo(); local 165 for (unsigned Reg = 0, NumRegs = TRI->getNumRegs(); Reg != NumRegs; ++Reg) 167 LiveOuts.push_back(createLiveOutReg(Reg, TRI)); 359 emitCallsiteEntries(MCStreamer &OS, const TargetRegisterInfo *TRI) argument 488 const TargetRegisterInfo *TRI = AP.TM.getRegisterInfo(); local [all...] |
H A D | LiveStackAnalysis.cpp | 52 TRI = MF.getTarget().getRegisterInfo(); 69 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC);
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H A D | InterferenceCache.h | 25 const TargetRegisterInfo *TRI; member in class:llvm::InterferenceCache 113 void revalidate(LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI); 116 bool valid(LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI); 121 const TargetRegisterInfo *TRI, 153 : TRI(nullptr), LIUArray(nullptr), MF(nullptr), PhysRegEntries(nullptr),
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H A D | LiveVariables.cpp | 197 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { 219 if (TRI->isSubRegister(Reg, DefReg)) { 220 for (MCSubRegIterator SubRegs(DefReg, TRI, /*IncludeSelf=*/true); 251 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { 263 for (MCSubRegIterator SS(SubReg, TRI); SS.isValid(); ++SS) 274 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); 290 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { 339 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { 353 for (MCSubRegIterator SS(SubReg, TRI, /*IncludeSelf=*/true); SS.isValid(); 369 PhysRegDef[Reg]->addRegisterDead(Reg, TRI, tru [all...] |
H A D | RegisterCoalescer.cpp | 82 const TargetRegisterInfo* TRI; member in class:__anon25794::RegisterCoalescer 258 if (!isMoveInstr(TRI, MI, Src, Dst, SrcSub, DstSub)) 276 Dst = TRI.getSubReg(Dst, DstSub); 283 Dst = TRI.getMatchingSuperReg(Dst, SrcSub, MRI.getRegClass(Src)); 299 NewRC = TRI.getCommonSuperRegClass(SrcRC, SrcSub, DstRC, DstSub, 306 NewRC = TRI.getMatchingSuperRegClass(DstRC, SrcRC, DstSub); 310 NewRC = TRI.getMatchingSuperRegClass(SrcRC, DstRC, SrcSub); 313 NewRC = TRI.getCommonSubClass(DstRC, SrcRC); 352 if (!isMoveInstr(TRI, MI, Src, Dst, SrcSub, DstSub)) 370 Dst = TRI 1306 const TargetRegisterInfo *TRI; member in class:__anon25795::JoinVals [all...] |
/external/eigen/test/ |
H A D | product_trsolve.cpp | 12 #define VERIFY_TRSM(TRI,XB) { \ 14 (TRI).solveInPlace(XB); \ 15 VERIFY_IS_APPROX((TRI).toDenseMatrix() * (XB), ref); \ 17 (XB) = (TRI).solve(XB); \ 18 VERIFY_IS_APPROX((TRI).toDenseMatrix() * (XB), ref); \ 21 #define VERIFY_TRSM_ONTHERIGHT(TRI,XB) { \ 23 (TRI).transpose().template solveInPlace<OnTheRight>(XB.transpose()); \ 24 VERIFY_IS_APPROX((XB).transpose() * (TRI).transpose().toDenseMatrix(), ref.transpose()); \ 26 (XB).transpose() = (TRI).transpose().template solve<OnTheRight>(XB.transpose()); \ 27 VERIFY_IS_APPROX((XB).transpose() * (TRI) [all...] |
H A D | product_mmtr.cpp | 12 #define CHECK_MMTR(DEST, TRI, OP) { \ 14 DEST.template triangularView<TRI>() OP; \ 16 ref2.template triangularView<TRI>() = ref1; \
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/external/llvm/include/llvm/CodeGen/ |
H A D | MachineInstr.h | 782 const TargetRegisterInfo *TRI = nullptr) const { 783 return findRegisterUseOperandIdx(Reg, false, TRI) != -1; 804 const TargetRegisterInfo *TRI = nullptr) const { 805 return findRegisterUseOperandIdx(Reg, true, TRI) != -1; 813 const TargetRegisterInfo *TRI = nullptr) const { 814 return findRegisterDefOperandIdx(Reg, false, false, TRI) != -1; 820 bool modifiesRegister(unsigned Reg, const TargetRegisterInfo *TRI) const { 821 return findRegisterDefOperandIdx(Reg, false, true, TRI) != -1; 828 const TargetRegisterInfo *TRI = nullptr) const { 829 return findRegisterDefOperandIdx(Reg, true, false, TRI) ! [all...] |
H A D | RegisterPressure.h | 43 void increase(unsigned Reg, const TargetRegisterInfo *TRI, 50 void decrease(unsigned Reg, const TargetRegisterInfo *TRI, 53 void dump(const TargetRegisterInfo *TRI) const; 252 const TargetRegisterInfo *TRI; 288 MF(nullptr), TRI(nullptr), RCI(nullptr), LIS(nullptr), MBB(nullptr), P(rp), 292 MF(nullptr), TRI(nullptr), RCI(nullptr), LIS(nullptr), MBB(nullptr), P(rp), 438 const TargetRegisterInfo *TRI);
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64FrameLowering.h | 49 const TargetRegisterInfo *TRI) const override; 54 const TargetRegisterInfo *TRI) const override;
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/external/llvm/lib/Target/ARM/ |
H A D | Thumb2InstrInfo.h | 51 const TargetRegisterInfo *TRI) const override; 57 const TargetRegisterInfo *TRI) const override;
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H A D | Thumb2ITBlockPass.cpp | 34 const TargetRegisterInfo *TRI; member in class:__anon26005::Thumb2ITBlockPass 59 const TargetRegisterInfo *TRI) { 78 for (MCSubRegIterator Subreg(Reg, TRI, /*IncludeSelf=*/true); 85 for (MCSubRegIterator Subreg(Reg, TRI, /*IncludeSelf=*/true); 180 TrackDefUses(MI, Defs, Uses, TRI); 230 TrackDefUses(NMI, Defs, Uses, TRI); 259 TRI = TM.getRegisterInfo(); 56 TrackDefUses(MachineInstr *MI, SmallSet<unsigned, 4> &Defs, SmallSet<unsigned, 4> &Uses, const TargetRegisterInfo *TRI) argument
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/external/llvm/lib/Target/MSP430/ |
H A D | MSP430InstrInfo.h | 65 const TargetRegisterInfo *TRI) const override; 70 const TargetRegisterInfo *TRI) const override;
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/external/llvm/lib/Target/Sparc/ |
H A D | SparcInstrInfo.h | 87 const TargetRegisterInfo *TRI) const override; 93 const TargetRegisterInfo *TRI) const override;
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZFrameLowering.h | 35 const TargetRegisterInfo *TRI) const override; 39 const TargetRegisterInfo *TRI) const
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/external/llvm/lib/Target/XCore/ |
H A D | XCoreInstrInfo.h | 74 const TargetRegisterInfo *TRI) const override; 80 const TargetRegisterInfo *TRI) const override;
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonCopyToCombine.cpp | 60 const TargetRegisterInfo *TRI; member in class:__anon26009::HexagonCopyToCombine 171 static bool areCombinableOperations(const TargetRegisterInfo *TRI, argument 183 static_cast<const HexagonRegisterInfo *>(TRI); 223 const TargetRegisterInfo *TRI) { 224 return (UseReg && (I->modifiesRegister(UseReg, TRI))) || 225 I->modifiesRegister(DestReg, TRI) || 226 I->readsRegister(DestReg, TRI) || 244 if (I2UseReg && I1->modifiesRegister(I2UseReg, TRI)) 274 if (isUnsafeToMoveAcross(&*I, I2UseReg, I2DestReg, TRI)) { 281 I->readsRegister(KilledOperand, TRI)) 221 isUnsafeToMoveAcross(MachineInstr *I, unsigned UseReg, unsigned DestReg, const TargetRegisterInfo *TRI) argument [all...] |
/external/llvm/lib/CodeGen/AsmPrinter/ |
H A D | DbgValueHistoryCalculator.cpp | 116 const TargetRegisterInfo *TRI, 121 for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid(); ++AI) 150 const TargetRegisterInfo *TRI, 158 collectClobberedRegisters(MI, TRI, Regs); 164 const TargetRegisterInfo *TRI, 167 collectChangingRegs(MF, TRI, ChangingRegs); 176 collectClobberedRegisters(MI, TRI, MIClobberedRegs); 115 collectClobberedRegisters(const MachineInstr &MI, const TargetRegisterInfo *TRI, std::set<unsigned> &Regs) argument 149 collectChangingRegs(const MachineFunction *MF, const TargetRegisterInfo *TRI, std::set<unsigned> &Regs) argument 163 calculateDbgValueHistory(const MachineFunction *MF, const TargetRegisterInfo *TRI, DbgValueHistoryMap &Result) argument
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/external/llvm/include/llvm/Target/ |
H A D | TargetFrameLowering.h | 104 const TargetRegisterInfo *TRI, 152 const TargetRegisterInfo *TRI) const { 163 const TargetRegisterInfo *TRI) const { 103 assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector<CalleeSavedInfo> &CSI) const argument
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