Searched refs:TT (Results 26 - 50 of 195) sorted by relevance

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/external/chromium_org/third_party/skia/src/sfnt/
H A DSkOTTable_maxp.h28 struct TT : SkOTTableMaximumProfile_TT { } tt; struct in union:SkOTTableMaximumProfile::Version
/external/clang/test/CXX/temp/temp.arg/temp.arg.template/
H A Dp3-0x.cpp5 template <template <class, class...> class TT, class T1, class... Rest>
6 struct eval<TT<T1, Rest...>> { };
20 template<template <int ...N> class TT> struct X0 { }; // expected-note{{previous non-type template parameter with type 'int' is here}}
30 template <T ...N> class TT> // expected-note{{previous non-type template parameter with type 'short' is here}}
/external/clang/test/SemaTemplate/
H A Dtemp_arg.cpp4 template<typename> class TT>
H A Ddependent-base-classes.cpp21 template <class TT>
23 typedef typename A<TT>::type type;
26 template <class TT>
27 struct FI : II<TT>
32 template <class TT>
35 C<typename FI2::type> a; // expected-error{{no type named 'type' in 'FI2<TT>'}}
H A Ddeduction.cpp60 template<template<typename> class TT, typename T1, typename Arg1, typename Arg2>
61 struct Replace<TT<T1>, Arg1, Arg2> {
62 typedef TT<typename Replace<T1, Arg1, Arg2>::type> type;
65 template<template<typename, typename> class TT, typename T1, typename T2,
67 struct Replace<TT<T1, T2>, Arg1, Arg2> {
68 typedef TT<typename Replace<T1, Arg1, Arg2>::type,
73 template<template<typename, typename> class TT, typename T1,
75 struct Replace<TT<T1, _2>, Arg1, Arg2> {
76 typedef TT<typename Replace<T1, Arg1, Arg2>::type, Arg2> type;
/external/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCAsmInfo.h31 explicit AArch64MCAsmInfoELF(StringRef TT);
H A DAArch64MCTargetDesc.h42 const MCRegisterInfo &MRI, StringRef TT,
45 const MCRegisterInfo &MRI, StringRef TT,
/external/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCAsmInfo.cpp22 ARMMCAsmInfoDarwin::ARMMCAsmInfoDarwin(StringRef TT) { argument
23 Triple TheTriple(TT);
44 ARMELFMCAsmInfo::ARMELFMCAsmInfo(StringRef TT) { argument
45 Triple TheTriple(TT);
H A DARMMCTargetDesc.h40 std::string ParseARMTriple(StringRef TT, StringRef CPU);
45 MCSubtargetInfo *createARMMCSubtargetInfo(StringRef TT, StringRef CPU,
67 StringRef TT, StringRef CPU,
71 StringRef TT, StringRef CPU);
74 StringRef TT, StringRef CPU);
77 StringRef TT, StringRef CPU);
80 StringRef TT, StringRef CPU);
/external/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCAsmInfo.cpp21 HexagonMCAsmInfo::HexagonMCAsmInfo(StringRef TT) { argument
/external/llvm/lib/Target/MSP430/MCTargetDesc/
H A DMSP430MCTargetDesc.cpp40 static MCRegisterInfo *createMSP430MCRegisterInfo(StringRef TT) { argument
46 static MCSubtargetInfo *createMSP430MCSubtargetInfo(StringRef TT, StringRef CPU, argument
49 InitMSP430MCSubtargetInfo(X, TT, CPU, FS);
53 static MCCodeGenInfo *createMSP430MCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
/external/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsMCTargetDesc.h46 const MCRegisterInfo &MRI, StringRef TT,
49 const MCRegisterInfo &MRI, StringRef TT,
52 const MCRegisterInfo &MRI, StringRef TT,
55 const MCRegisterInfo &MRI, StringRef TT,
/external/llvm/lib/Target/SystemZ/MCTargetDesc/
H A DSystemZMCAsmInfo.cpp16 SystemZMCAsmInfo::SystemZMCAsmInfo(StringRef TT) { argument
/external/llvm/lib/Target/XCore/MCTargetDesc/
H A DXCoreMCAsmInfo.cpp16 XCoreMCAsmInfo::XCoreMCAsmInfo(StringRef TT) { argument
/external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/
H A DAMDGPUMCAsmInfo.h24 explicit AMDGPUMCAsmInfo(const Target &T, StringRef &TT);
H A DAMDGPUMCTargetDesc.cpp43 static MCRegisterInfo *createAMDGPUMCRegisterInfo(StringRef TT) { argument
49 static MCSubtargetInfo *createAMDGPUMCSubtargetInfo(StringRef TT, StringRef CPU, argument
52 InitAMDGPUMCSubtargetInfo(X, TT, CPU, FS);
56 static MCCodeGenInfo *createAMDGPUMCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
83 static MCStreamer *createMCStreamer(const Target &T, StringRef TT, argument
/external/skia/src/sfnt/
H A DSkOTTable_maxp.h28 struct TT : SkOTTableMaximumProfile_TT { } tt; struct in union:SkOTTableMaximumProfile::Version
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/MCTargetDesc/
H A DAMDGPUMCTargetDesc.cpp43 static MCRegisterInfo *createAMDGPUMCRegisterInfo(StringRef TT) { argument
49 static MCSubtargetInfo *createAMDGPUMCSubtargetInfo(StringRef TT, StringRef CPU, argument
52 InitAMDGPUMCSubtargetInfo(X, TT, CPU, FS);
56 static MCCodeGenInfo *createAMDGPUMCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
83 static MCStreamer *createMCStreamer(const Target &T, StringRef TT, argument
/external/llvm/lib/Target/R600/MCTargetDesc/
H A DAMDGPUMCTargetDesc.cpp44 static MCRegisterInfo *createAMDGPUMCRegisterInfo(StringRef TT) { argument
50 static MCSubtargetInfo *createAMDGPUMCSubtargetInfo(StringRef TT, StringRef CPU, argument
53 InitAMDGPUMCSubtargetInfo(X, TT, CPU, FS);
57 static MCCodeGenInfo *createAMDGPUMCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
85 static MCStreamer *createMCStreamer(const Target &T, StringRef TT, argument
/external/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCTargetDesc.h54 std::string ParseX86Triple(StringRef TT);
68 unsigned getDwarfRegFlavour(Triple TT, bool isEH);
75 MCSubtargetInfo *createX86MCSubtargetInfo(StringRef TT, StringRef CPU,
85 StringRef TT, StringRef CPU);
87 StringRef TT, StringRef CPU);
/external/llvm/lib/Target/ARM/
H A DARMTargetMachine.cpp48 ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, StringRef TT, argument
53 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
54 Subtarget(TT, CPU, FS, *this, isLittle, Options) {
73 ARMTargetMachine::ARMTargetMachine(const Target &T, StringRef TT, StringRef CPU, argument
77 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, isLittle) {
86 ARMLETargetMachine::ARMLETargetMachine(const Target &T, StringRef TT, argument
91 : ARMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}
95 ARMBETargetMachine::ARMBETargetMachine(const Target &T, StringRef TT, argument
100 : ARMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}
104 ThumbTargetMachine::ThumbTargetMachine(const Target &T, StringRef TT, argument
116 ThumbLETargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
125 ThumbBETargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
[all...]
/external/llvm/lib/Target/R600/
H A DAMDGPUSubtarget.cpp28 AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef GPU, StringRef FS) : argument
29 AMDGPUGenSubtargetInfo(TT, GPU, FS),
/external/clang/test/CXX/temp/temp.type/
H A Dp1-0x.cpp4 template<template<class> class TT> struct X { };
/external/clang/test/SemaCXX/
H A Daccess.cpp81 template<template<int> class T> friend struct TT;
88 template<template<A::I> class T> struct TT { struct in namespace:PR15209::templates
92 template struct TT<B>;
94 template struct TT<D>;
/external/llvm/lib/MC/
H A DMCRelocationInfo.cpp37 MCRelocationInfo *llvm::createMCRelocationInfo(StringRef TT, MCContext &Ctx) { argument

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