/external/llvm/lib/Target/PowerPC/ |
H A D | PPCFastISel.cpp | 829 Value *Src = I->getOperand(0); local 830 EVT SrcVT = TLI.getValueType(Src->getType(), true); 836 unsigned SrcReg = getRegForValue(Src); 847 Value *Src = I->getOperand(0); local 848 EVT SrcVT = TLI.getValueType(Src->getType(), true); 854 unsigned SrcReg = getRegForValue(Src); 926 Value *Src = I->getOperand(0); 927 EVT SrcEVT = TLI.getValueType(Src->getType(), true); 937 unsigned SrcReg = getRegForValue(Src); 1037 Value *Src 1694 Value *Src = I->getOperand(0); local 1724 Value *Src = I->getOperand(0); local [all...] |
/external/llvm/lib/CodeGen/ |
H A D | PeepholeOptimizer.cpp | 466 // At most one of the register is a sub register, make it Src to avoid 490 // Copy instruction are supposed to be: Def = Src. 546 unsigned Src; local 558 Src = ValTracker.getReg(); 566 if (TargetRegisterInfo::isPhysicalRegister(Src)) 569 const TargetRegisterClass *SrcRC = MRI->getRegClass(Src); 577 if (!ShouldRewrite || Src == MI->getOperand(SrcIdx).getReg()) 585 .addReg(Src, 0, SrcSubReg); 590 // We extended the lifetime of Src. 592 MRI->clearKillFlags(Src); [all...] |
H A D | LiveInterval.cpp | 804 LiveRange::iterator Src = WriteI; 805 LiveRange::iterator Dst = Src + NumMoved; 812 // Now merge Src and Spills backwards. 813 while (Src != Dst) { 814 if (Src != B && Src[-1].start > SpillSrc[-1].start) 815 *--Dst = *--Src;
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/external/llvm/lib/Target/R600/ |
H A D | R600ISelLowering.cpp | 1378 SDValue Src[4] = { local 1384 SDValue Input = DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v4i32, Src); 2053 FoldOperand(SDNode *ParentNode, unsigned SrcIdx, SDValue &Src, SDValue &Neg, argument 2057 if (!Src.isMachineOpcode()) 2059 switch (Src.getMachineOpcode()) { 2063 Src = Src.getOperand(0); 2069 Src = Src.getOperand(0); 2079 SDValue CstOffset = Src 2238 SDValue &Src = Ops[i]; local 2243 SDValue Src = Node->getOperand(0); local [all...] |
H A D | SIInsertWaits.cpp | 307 static void increaseCounters(Counters &Dst, const Counters &Src) { argument 310 Dst.Array[i] = std::max(Dst.Array[i], Src.Array[i]);
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H A D | AMDGPUISelLowering.cpp | 448 bool AMDGPUTargetLowering::isZExtFree(Type *Src, Type *Dest) const { argument 450 unsigned SrcSize = DL->getTypeSizeInBits(Src->getScalarType()); 456 bool AMDGPUTargetLowering::isZExtFree(EVT Src, EVT Dest) const { argument 461 return Src == MVT::i32 && Dest == MVT::i64; 1668 SDValue Src = Op.getOperand(0); local 1674 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src); 1681 SDValue Lt0 = DAG.getSetCC(SL, SetCCVT, Src, Zero, ISD::SETOGT); 1682 SDValue NeTrunc = DAG.getSetCC(SL, SetCCVT, Src, Trunc, ISD::SETONE); 1691 SDValue Src = Op.getOperand(0); local 1698 SDValue VecSrc = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Src); 1747 SDValue Src = Op.getOperand(0); local 1778 SDValue Src = Op.getOperand(0); local [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeVectorOps.cpp | 746 SDValue Src = Op.getOperand(0); local 747 EVT SrcVT = Src.getValueType(); 762 DAG.getVectorShuffle(SrcVT, DL, Src, DAG.getUNDEF(SrcVT), ShuffleMask)); 768 SDValue Src = Op.getOperand(0); local 769 EVT SrcVT = Src.getValueType(); 773 Op = DAG.getAnyExtendVectorInReg(Src, DL, VT); 793 SDValue Src = Op.getOperand(0); local 794 EVT SrcVT = Src.getValueType(); 816 DAG.getVectorShuffle(SrcVT, DL, Zero, Src, ShuffleMask));
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/external/llvm/lib/Support/ |
H A D | CommandLine.cpp | 476 void cl::TokenizeGNUCommandLine(StringRef Src, StringSaver &Saver, argument 479 for (size_t I = 0, E = Src.size(); I != E; ++I) { 482 while (I != E && isWhitespace(Src[I])) 489 if (I + 1 < E && Src[I] == '\\' && isGNUSpecial(Src[I + 1])) { 491 Token.push_back(Src[I]); 496 if (isQuote(Src[I])) { 497 char Quote = Src[I++]; 498 while (I != E && Src[I] != Quote) { 500 if (Src[ 543 parseBackslash(StringRef Src, size_t I, SmallString<128> &Token) argument 564 TokenizeWindowsCommandLine(StringRef Src, StringSaver &Saver, SmallVectorImpl<const char *> &NewArgv) argument [all...] |
/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZInstrInfo.cpp | 690 MachineOperand &Src = MI->getOperand(1); local 692 unsigned SrcReg = Src.getReg(); 710 MIB.addReg(Src.getReg(), getKillRegState(Src.isKill()), Src.getSubReg()); 734 MachineOperand &Src = MI->getOperand(1); local 738 .addReg(Src.getReg(), getKillRegState(Src.isKill()), Src.getSubReg())
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/external/llvm/include/llvm/Support/ |
H A D | GCOV.h | 253 GCOVEdge(GCOVBlock &S, GCOVBlock &D) : Src(S), Dst(D), Count(0) {} 255 GCOVBlock &Src; member in struct:llvm::GCOVEdge 322 assert(&Edge->Src == this); // up to caller to ensure edge is valid
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/external/llvm/lib/Analysis/ |
H A D | ConstantFolding.cpp | 178 Constant *Src =dyn_cast<ConstantInt>(C->getAggregateElement(SrcElt++)); local 179 if (!Src) // Reject constantexpr elements. 183 Src = ConstantExpr::getZExt(Src, Elt->getType()); 186 Src = ConstantExpr::getShl(Src, 187 ConstantInt::get(Src->getType(), ShiftAmt)); 191 Elt = ConstantExpr::getOr(Elt, Src); 204 Constant *Src = dyn_cast<ConstantInt>(C->getAggregateElement(i)); local 205 if (!Src) // Rejec [all...] |
H A D | BasicAliasAnalysis.cpp | 547 /// \brief Dest and Src are the variable indices from two decomposed 552 const SmallVectorImpl<VariableGEPIndex> &Src); 1360 /// GetIndexDifference - Dest and Src are the variable indices from two 1366 const SmallVectorImpl<VariableGEPIndex> &Src) { 1367 if (Src.empty()) 1370 for (unsigned i = 0, e = Src.size(); i != e; ++i) { 1371 const Value *V = Src[i].V; 1372 ExtensionKind Extension = Src[i].Extension; 1373 int64_t Scale = Src[i].Scale; 1364 GetIndexDifference( SmallVectorImpl<VariableGEPIndex> &Dest, const SmallVectorImpl<VariableGEPIndex> &Src) argument
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/external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/tgsi/ |
H A D | tgsi_util.c | 175 const struct tgsi_full_src_register *src = &inst->Src[src_idx];
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H A D | tgsi_scan.c | 96 &fullinst->Src[i]; 302 &fullinst->Src[0];
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/external/mesa3d/src/gallium/auxiliary/tgsi/ |
H A D | tgsi_util.c | 175 const struct tgsi_full_src_register *src = &inst->Src[src_idx];
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H A D | tgsi_scan.c | 96 &fullinst->Src[i]; 302 &fullinst->Src[0];
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/external/clang/lib/CodeGen/ |
H A D | CGCXXABI.cpp | 100 llvm::Value *Src) { 106 llvm::Constant *Src) { 98 EmitMemberPointerConversion(CodeGenFunction &CGF, const CastExpr *E, llvm::Value *Src) argument 105 EmitMemberPointerConversion(const CastExpr *E, llvm::Constant *Src) argument
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H A D | MicrosoftCXXABI.cpp | 511 llvm::Value *Src) override; 514 llvm::Constant *Src) override; 2253 llvm::Value *Src) { 2259 if (isa<llvm::Constant>(Src)) 2260 return EmitMemberPointerConversion(E, cast<llvm::Constant>(Src)); 2272 return Src; 2278 return Src; 2282 // Branch past the conversion if Src is null. 2283 llvm::Value *IsNotNull = EmitMemberPointerIsNotNull(CGF, Src, SrcTy); 2291 assert(Src 2251 EmitMemberPointerConversion(CodeGenFunction &CGF, const CastExpr *E, llvm::Value *Src) argument 2366 EmitMemberPointerConversion(const CastExpr *E, llvm::Constant *Src) argument [all...] |
H A D | CGClass.cpp | 578 LValue Src = CGF.EmitLValueForFieldInitialization(ThisRHSLV, Field); local 581 CGF.EmitAggregateCopy(LHS.getAddress(), Src.getAddress(), FieldType, 838 LValue Src = CGF.EmitLValueForFieldInitialization(SrcLV, FirstField); local 841 Src.isBitField() ? Src.getBitFieldAddr() : Src.getAddress(), 1665 llvm::Value *Src = EmitLValue(E).getAddress(); local 1666 EmitAggregateCopy(This, Src, Ty); 1699 llvm::Value *This, llvm::Value *Src, 1706 EmitAggregateCopy(This, Src, (*ArgBe 1698 EmitSynthesizedCXXCopyCtorCall(const CXXConstructorDecl *D, llvm::Value *This, llvm::Value *Src, CallExpr::const_arg_iterator ArgBeg, CallExpr::const_arg_iterator ArgEnd) argument [all...] |
H A D | CGExpr.cpp | 1381 void CodeGenFunction::EmitStoreThroughLValue(RValue Src, LValue Dst, argument 1390 Vec = Builder.CreateInsertElement(Vec, Src.getScalarVal(), 1401 return EmitStoreThroughExtVectorComponentLValue(Src, Dst); 1404 return EmitStoreThroughGlobalRegLValue(Src, Dst); 1407 return EmitStoreThroughBitfieldLValue(Src, Dst); 1421 EmitARCStoreStrong(Dst, Src.getScalarVal(), /*ignore*/ true); 1425 EmitARCStoreWeak(Dst.getAddress(), Src.getScalarVal(), /*ignore*/ true); 1429 Src = RValue::get(EmitObjCExtendObjectLifetime(Dst.getType(), 1430 Src.getScalarVal())); 1439 llvm::Value *src = Src 1472 EmitStoreThroughBitfieldLValue(RValue Src, LValue Dst, llvm::Value **Result) argument 1543 EmitStoreThroughExtVectorComponentLValue(RValue Src, LValue Dst) argument 1618 EmitStoreThroughGlobalRegLValue(RValue Src, LValue Dst) argument [all...] |
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64AdvSIMDScalarPass.cpp | 265 unsigned Dst, unsigned Src, bool IsKill) { 269 .addReg(Src, getKillRegState(IsKill)); 264 insertCopy(const AArch64InstrInfo *TII, MachineInstr *MI, unsigned Dst, unsigned Src, bool IsKill) argument
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/external/llvm/lib/Target/X86/ |
H A D | X86FixupLEAs.cpp | 106 const MachineOperand &Src = MI->getOperand(1); local 112 .addOperand(Src)
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/external/llvm/lib/ExecutionEngine/ |
H A D | ExecutionEngine.cpp | 1009 const uint8_t *Src = (const uint8_t *)IntVal.getRawData(); local 1014 memcpy(Dst, Src, StoreBytes); 1022 memcpy(Dst + StoreBytes, Src, sizeof(uint64_t)); 1023 Src += sizeof(uint64_t); 1026 memcpy(Dst, Src + sizeof(uint64_t) - StoreBytes, StoreBytes); 1078 /// from Src into IntVal, which is assumed to be wide enough and to hold zero. 1079 static void LoadIntFromMemory(APInt &IntVal, uint8_t *Src, unsigned LoadBytes) { argument 1087 memcpy(Dst, Src, LoadBytes); 1096 memcpy(Dst, Src + LoadBytes, sizeof(uint64_t)); 1100 memcpy(Dst + sizeof(uint64_t) - LoadBytes, Src, LoadByte [all...] |
/external/bison/data/ |
H A D | yacc.c | 588 # define YYCOPY(Dst, Src, Count) \ 589 __builtin_memcpy (Dst, Src, (Count) * sizeof (*(Src))) 591 # define YYCOPY(Dst, Src, Count) \ 596 (Dst)[yyi] = (Src)[yyi]; \
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/external/chromium_org/third_party/angle/src/compiler/preprocessor/ |
H A D | ExpressionParser.cpp | 417 # define YYCOPY(Dst, Src, Count) \ 418 __builtin_memcpy (Dst, Src, (Count) * sizeof (*(Src))) 420 # define YYCOPY(Dst, Src, Count) \ 425 (Dst)[yyi] = (Src)[yyi]; \
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