/external/llvm/lib/CodeGen/ |
H A D | LiveStackAnalysis.cpp | 51 bool LiveStacks::runOnMachineFunction(MachineFunction &MF) { argument 52 TRI = MF.getTarget().getRegisterInfo();
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H A D | DeadMachineInstructionElim.cpp | 31 bool runOnMachineFunction(MachineFunction &MF) override; 87 bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) { argument 88 if (skipOptnoneFunction(*MF.getFunction())) 92 MRI = &MF.getRegInfo(); 93 TRI = MF.getTarget().getRegisterInfo(); 94 TII = MF.getTarget().getInstrInfo(); 99 for (MachineFunction::reverse_iterator I = MF.rbegin(), E = MF.rend();
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H A D | EdgeBundles.cpp | 40 MF = &mf; 42 EC.grow(2 * MF->getNumBlockIDs()); 44 for (const auto &MBB : *MF) { 59 for (unsigned i = 0, e = MF->getNumBlockIDs(); i != e; ++i) { 76 const MachineFunction *MF = G.getMachineFunction(); local 79 for (const auto &MBB : *MF) {
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H A D | LiveRegMatrix.cpp | 50 bool LiveRegMatrix::runOnMachineFunction(MachineFunction &MF) { argument 51 TRI = MF.getTarget().getRegisterInfo(); 52 MRI = &MF.getRegInfo();
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/external/llvm/lib/Target/ARM/ |
H A D | ARMOptimizeBarriersPass.cpp | 50 bool ARMOptimizeBarriersPass::runOnMachineFunction(MachineFunction &MF) { argument 59 for (auto &MBB : MF) {
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H A D | Thumb1InstrInfo.cpp | 65 MachineFunction &MF = *MBB.getParent(); local 66 MachineFrameInfo &MFI = *MF.getFrameInfo(); 68 MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FI), 93 MachineFunction &MF = *MBB.getParent(); local 94 MachineFrameInfo &MFI = *MF.getFrameInfo(); 96 MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FI),
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H A D | Thumb2RegisterInfo.cpp | 42 MachineFunction &MF = *MBB.getParent(); local 43 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); 44 MachineConstantPool *ConstantPool = MF.getConstantPool();
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/external/llvm/lib/Target/MSP430/ |
H A D | MSP430MachineFunctionInfo.h | 39 explicit MSP430MachineFunctionInfo(MachineFunction &MF) argument
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/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXFrameLowering.cpp | 33 bool NVPTXFrameLowering::hasFP(const MachineFunction &MF) const { return true; } 35 void NVPTXFrameLowering::emitPrologue(MachineFunction &MF) const { 36 if (MF.getFrameInfo()->hasStackObjects()) { 37 MachineBasicBlock &MBB = MF.front(); 44 MachineRegisterInfo &MRI = MF.getRegInfo(); 52 MF.getTarget().getInstrInfo()->get(NVPTX::cvta_local_yes_64), 55 MF.getTarget().getInstrInfo()->get(NVPTX::MOV_DEPOT_ADDR_64), 56 LocalReg).addImm(MF.getFunctionNumber()); 61 MF.getTarget().getInstrInfo()->get(NVPTX::cvta_local_yes), 64 MF 70 emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const argument 75 eliminateCallFramePseudoInstr( MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const argument [all...] |
/external/llvm/lib/Target/R600/ |
H A D | SIMachineFunctionInfo.cpp | 27 SIMachineFunctionInfo::SIMachineFunctionInfo(const MachineFunction &MF) argument 28 : AMDGPUMachineFunction(MF), 32 static unsigned createLaneVGPR(MachineRegisterInfo &MRI, MachineFunction *MF) { argument 59 for (MachineBasicBlock &MBB : *MF) { 61 MBB.back().addOperand(*MF, MachineOperand::CreateReg(VGPR, false, true)); 66 LLVMContext &Ctx = MF->getFunction()->getContext(); 73 MachineRegisterInfo &MRI, MachineFunction *MF, unsigned NumRegs) { 77 LaneVGPR = createLaneVGPR(MRI, MF); 81 LaneVGPR = createLaneVGPR(MRI, MF); 72 reserveLanes( MachineRegisterInfo &MRI, MachineFunction *MF, unsigned NumRegs) argument
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H A D | AMDGPUFrameLowering.cpp | 27 unsigned AMDGPUFrameLowering::getStackWidth(const MachineFunction &MF) const { 74 int AMDGPUFrameLowering::getFrameIndexOffset(const MachineFunction &MF, argument 76 const MachineFrameInfo *MFI = MF.getFrameInfo(); 80 unsigned OffsetBytes = 2 * (getStackWidth(MF) * 4); 94 return OffsetBytes / (getStackWidth(MF) * 4); 103 AMDGPUFrameLowering::emitPrologue(MachineFunction &MF) const { 106 AMDGPUFrameLowering::emitEpilogue(MachineFunction &MF, argument 111 AMDGPUFrameLowering::hasFP(const MachineFunction &MF) const {
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H A D | SIFixSGPRLiveRanges.cpp | 43 virtual bool runOnMachineFunction(MachineFunction &MF) override; 74 bool SIFixSGPRLiveRanges::runOnMachineFunction(MachineFunction &MF) { argument 75 MachineRegisterInfo &MRI = MF.getRegInfo(); 77 MF.getTarget().getRegisterInfo()); 80 for (MachineFunction::iterator BI = MF.begin(), BE = MF.end();
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H A D | SILowerI1Copies.cpp | 42 virtual bool runOnMachineFunction(MachineFunction &MF) override; 71 bool SILowerI1Copies::runOnMachineFunction(MachineFunction &MF) { argument 72 MachineRegisterInfo &MRI = MF.getRegInfo(); 74 MF.getTarget().getInstrInfo()); 75 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo(); 78 for (MachineFunction::iterator BI = MF.begin(), BE = MF.end();
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZInstrBuilder.h | 29 MachineFunction &MF = *MI->getParent()->getParent(); local 30 MachineFrameInfo *MFFrame = MF.getFrameInfo(); 39 MF.getMachineMemOperand(MachinePointerInfo(
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/external/llvm/lib/Target/XCore/ |
H A D | XCoreFrameToArgsOffsetElim.cpp | 44 bool XCoreFTAOElim::runOnMachineFunction(MachineFunction &MF) { argument 46 *static_cast<const XCoreInstrInfo*>(MF.getTarget().getInstrInfo()); 47 unsigned StackSize = MF.getFrameInfo()->getStackSize(); 48 for (MachineFunction::iterator MFI = MF.begin(), E = MF.end(); MFI != E;
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/external/mesa3d/src/gallium/drivers/radeon/ |
H A D | AMDGPUConvertToISA.cpp | 33 virtual bool runOnMachineFunction(MachineFunction &MF); 47 bool AMDGPUConvertToISAPass::runOnMachineFunction(MachineFunction &MF) argument 52 for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end(); 58 TII->convertToISA(MI, MF, MBB.findDebugLoc(I));
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H A D | AMDILFrameLowering.cpp | 29 int AMDGPUFrameLowering::getFrameIndexOffset(const MachineFunction &MF, argument 31 const MachineFrameInfo *MFI = MF.getFrameInfo(); 42 AMDGPUFrameLowering::emitPrologue(MachineFunction &MF) const 46 AMDGPUFrameLowering::emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const argument 50 AMDGPUFrameLowering::hasFP(const MachineFunction &MF) const
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H A D | SIInstrInfo.cpp | 52 MachineInstr * SIInstrInfo::getMovImmInstr(MachineFunction *MF, unsigned DstReg, argument 55 MachineInstr * MI = MF->CreateMachineInstr(get(AMDGPU::V_MOV_IMM_I32), DebugLoc());
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/external/llvm/include/llvm/CodeGen/ |
H A D | CalcSpillWeights.h | 50 MachineFunction &MF; member in class:llvm::VirtRegAuxInfo 62 : MF(mf), LIS(lis), Loops(loops), MBFI(mbfi), normalize(norm) {} 70 void calculateSpillWeightsAndHints(LiveIntervals &LIS, MachineFunction &MF,
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/external/llvm/include/llvm/ExecutionEngine/ |
H A D | JITEventListener.h | 38 /// using MF->getDebugLocTuple(). 43 const MachineFunction *MF; member in struct:llvm::JITEvent_EmittedFunctionDetails
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/external/llvm/lib/CodeGen/AsmPrinter/ |
H A D | DwarfCFIException.cpp | 76 void DwarfCFIException::beginFunction(const MachineFunction *MF) { argument
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | InstrEmitter.h | 30 MachineFunction *MF; member in class:llvm::InstrEmitter
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64CleanupLocalDynamicTLSPass.cpp | 41 bool runOnMachineFunction(MachineFunction &MF) override { 42 AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>(); 94 MachineFunction *MF = I->getParent()->getParent(); local 96 static_cast<const AArch64TargetMachine *>(&MF->getTarget()); 114 MachineFunction *MF = I->getParent()->getParent(); local 116 static_cast<const AArch64TargetMachine *>(&MF->getTarget()); 120 MachineRegisterInfo &RegInfo = MF->getRegInfo();
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H A D | AArch64DeadRegisterDefinitionsPass.cpp | 121 bool AArch64DeadRegisterDefinitions::runOnMachineFunction(MachineFunction &MF) { argument 122 TRI = MF.getTarget().getRegisterInfo(); 126 for (auto &MBB : MF)
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/external/llvm/lib/Target/Sparc/ |
H A D | SparcMachineFunctionInfo.h | 38 explicit SparcMachineFunctionInfo(MachineFunction &MF) argument
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