Searched defs:MF (Results 26 - 50 of 275) sorted by relevance

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/external/llvm/lib/CodeGen/
H A DLiveStackAnalysis.cpp51 bool LiveStacks::runOnMachineFunction(MachineFunction &MF) { argument
52 TRI = MF.getTarget().getRegisterInfo();
H A DDeadMachineInstructionElim.cpp31 bool runOnMachineFunction(MachineFunction &MF) override;
87 bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) { argument
88 if (skipOptnoneFunction(*MF.getFunction()))
92 MRI = &MF.getRegInfo();
93 TRI = MF.getTarget().getRegisterInfo();
94 TII = MF.getTarget().getInstrInfo();
99 for (MachineFunction::reverse_iterator I = MF.rbegin(), E = MF.rend();
H A DEdgeBundles.cpp40 MF = &mf;
42 EC.grow(2 * MF->getNumBlockIDs());
44 for (const auto &MBB : *MF) {
59 for (unsigned i = 0, e = MF->getNumBlockIDs(); i != e; ++i) {
76 const MachineFunction *MF = G.getMachineFunction(); local
79 for (const auto &MBB : *MF) {
H A DLiveRegMatrix.cpp50 bool LiveRegMatrix::runOnMachineFunction(MachineFunction &MF) { argument
51 TRI = MF.getTarget().getRegisterInfo();
52 MRI = &MF.getRegInfo();
/external/llvm/lib/Target/ARM/
H A DARMOptimizeBarriersPass.cpp50 bool ARMOptimizeBarriersPass::runOnMachineFunction(MachineFunction &MF) { argument
59 for (auto &MBB : MF) {
H A DThumb1InstrInfo.cpp65 MachineFunction &MF = *MBB.getParent(); local
66 MachineFrameInfo &MFI = *MF.getFrameInfo();
68 MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FI),
93 MachineFunction &MF = *MBB.getParent(); local
94 MachineFrameInfo &MFI = *MF.getFrameInfo();
96 MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FI),
H A DThumb2RegisterInfo.cpp42 MachineFunction &MF = *MBB.getParent(); local
43 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
44 MachineConstantPool *ConstantPool = MF.getConstantPool();
/external/llvm/lib/Target/MSP430/
H A DMSP430MachineFunctionInfo.h39 explicit MSP430MachineFunctionInfo(MachineFunction &MF) argument
/external/llvm/lib/Target/NVPTX/
H A DNVPTXFrameLowering.cpp33 bool NVPTXFrameLowering::hasFP(const MachineFunction &MF) const { return true; }
35 void NVPTXFrameLowering::emitPrologue(MachineFunction &MF) const {
36 if (MF.getFrameInfo()->hasStackObjects()) {
37 MachineBasicBlock &MBB = MF.front();
44 MachineRegisterInfo &MRI = MF.getRegInfo();
52 MF.getTarget().getInstrInfo()->get(NVPTX::cvta_local_yes_64),
55 MF.getTarget().getInstrInfo()->get(NVPTX::MOV_DEPOT_ADDR_64),
56 LocalReg).addImm(MF.getFunctionNumber());
61 MF.getTarget().getInstrInfo()->get(NVPTX::cvta_local_yes),
64 MF
70 emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const argument
75 eliminateCallFramePseudoInstr( MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const argument
[all...]
/external/llvm/lib/Target/R600/
H A DSIMachineFunctionInfo.cpp27 SIMachineFunctionInfo::SIMachineFunctionInfo(const MachineFunction &MF) argument
28 : AMDGPUMachineFunction(MF),
32 static unsigned createLaneVGPR(MachineRegisterInfo &MRI, MachineFunction *MF) { argument
59 for (MachineBasicBlock &MBB : *MF) {
61 MBB.back().addOperand(*MF, MachineOperand::CreateReg(VGPR, false, true));
66 LLVMContext &Ctx = MF->getFunction()->getContext();
73 MachineRegisterInfo &MRI, MachineFunction *MF, unsigned NumRegs) {
77 LaneVGPR = createLaneVGPR(MRI, MF);
81 LaneVGPR = createLaneVGPR(MRI, MF);
72 reserveLanes( MachineRegisterInfo &MRI, MachineFunction *MF, unsigned NumRegs) argument
H A DAMDGPUFrameLowering.cpp27 unsigned AMDGPUFrameLowering::getStackWidth(const MachineFunction &MF) const {
74 int AMDGPUFrameLowering::getFrameIndexOffset(const MachineFunction &MF, argument
76 const MachineFrameInfo *MFI = MF.getFrameInfo();
80 unsigned OffsetBytes = 2 * (getStackWidth(MF) * 4);
94 return OffsetBytes / (getStackWidth(MF) * 4);
103 AMDGPUFrameLowering::emitPrologue(MachineFunction &MF) const {
106 AMDGPUFrameLowering::emitEpilogue(MachineFunction &MF, argument
111 AMDGPUFrameLowering::hasFP(const MachineFunction &MF) const {
H A DSIFixSGPRLiveRanges.cpp43 virtual bool runOnMachineFunction(MachineFunction &MF) override;
74 bool SIFixSGPRLiveRanges::runOnMachineFunction(MachineFunction &MF) { argument
75 MachineRegisterInfo &MRI = MF.getRegInfo();
77 MF.getTarget().getRegisterInfo());
80 for (MachineFunction::iterator BI = MF.begin(), BE = MF.end();
H A DSILowerI1Copies.cpp42 virtual bool runOnMachineFunction(MachineFunction &MF) override;
71 bool SILowerI1Copies::runOnMachineFunction(MachineFunction &MF) { argument
72 MachineRegisterInfo &MRI = MF.getRegInfo();
74 MF.getTarget().getInstrInfo());
75 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo();
78 for (MachineFunction::iterator BI = MF.begin(), BE = MF.end();
/external/llvm/lib/Target/SystemZ/
H A DSystemZInstrBuilder.h29 MachineFunction &MF = *MI->getParent()->getParent(); local
30 MachineFrameInfo *MFFrame = MF.getFrameInfo();
39 MF.getMachineMemOperand(MachinePointerInfo(
/external/llvm/lib/Target/XCore/
H A DXCoreFrameToArgsOffsetElim.cpp44 bool XCoreFTAOElim::runOnMachineFunction(MachineFunction &MF) { argument
46 *static_cast<const XCoreInstrInfo*>(MF.getTarget().getInstrInfo());
47 unsigned StackSize = MF.getFrameInfo()->getStackSize();
48 for (MachineFunction::iterator MFI = MF.begin(), E = MF.end(); MFI != E;
/external/mesa3d/src/gallium/drivers/radeon/
H A DAMDGPUConvertToISA.cpp33 virtual bool runOnMachineFunction(MachineFunction &MF);
47 bool AMDGPUConvertToISAPass::runOnMachineFunction(MachineFunction &MF) argument
52 for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
58 TII->convertToISA(MI, MF, MBB.findDebugLoc(I));
H A DAMDILFrameLowering.cpp29 int AMDGPUFrameLowering::getFrameIndexOffset(const MachineFunction &MF, argument
31 const MachineFrameInfo *MFI = MF.getFrameInfo();
42 AMDGPUFrameLowering::emitPrologue(MachineFunction &MF) const
46 AMDGPUFrameLowering::emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const argument
50 AMDGPUFrameLowering::hasFP(const MachineFunction &MF) const
H A DSIInstrInfo.cpp52 MachineInstr * SIInstrInfo::getMovImmInstr(MachineFunction *MF, unsigned DstReg, argument
55 MachineInstr * MI = MF->CreateMachineInstr(get(AMDGPU::V_MOV_IMM_I32), DebugLoc());
/external/llvm/include/llvm/CodeGen/
H A DCalcSpillWeights.h50 MachineFunction &MF; member in class:llvm::VirtRegAuxInfo
62 : MF(mf), LIS(lis), Loops(loops), MBFI(mbfi), normalize(norm) {}
70 void calculateSpillWeightsAndHints(LiveIntervals &LIS, MachineFunction &MF,
/external/llvm/include/llvm/ExecutionEngine/
H A DJITEventListener.h38 /// using MF->getDebugLocTuple().
43 const MachineFunction *MF; member in struct:llvm::JITEvent_EmittedFunctionDetails
/external/llvm/lib/CodeGen/AsmPrinter/
H A DDwarfCFIException.cpp76 void DwarfCFIException::beginFunction(const MachineFunction *MF) { argument
/external/llvm/lib/CodeGen/SelectionDAG/
H A DInstrEmitter.h30 MachineFunction *MF; member in class:llvm::InstrEmitter
/external/llvm/lib/Target/AArch64/
H A DAArch64CleanupLocalDynamicTLSPass.cpp41 bool runOnMachineFunction(MachineFunction &MF) override {
42 AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
94 MachineFunction *MF = I->getParent()->getParent(); local
96 static_cast<const AArch64TargetMachine *>(&MF->getTarget());
114 MachineFunction *MF = I->getParent()->getParent(); local
116 static_cast<const AArch64TargetMachine *>(&MF->getTarget());
120 MachineRegisterInfo &RegInfo = MF->getRegInfo();
H A DAArch64DeadRegisterDefinitionsPass.cpp121 bool AArch64DeadRegisterDefinitions::runOnMachineFunction(MachineFunction &MF) { argument
122 TRI = MF.getTarget().getRegisterInfo();
126 for (auto &MBB : MF)
/external/llvm/lib/Target/Sparc/
H A DSparcMachineFunctionInfo.h38 explicit SparcMachineFunctionInfo(MachineFunction &MF) argument

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