Searched refs:Bits (Results 76 - 100 of 141) sorted by path

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/external/llvm/include/llvm/ADT/
H A DFoldingSet.h297 /// Bits - Vector of all the data bits that make the node unique.
299 SmallVector<unsigned, 32> Bits; member in class:llvm::FoldingSetNodeID
305 : Bits(Ref.getData(), Ref.getData() + Ref.getSize()) {}
325 inline void clear() { Bits.clear(); }
H A DPackedVector.h30 static T getValue(const BitVectorTy &Bits, unsigned Idx) { argument
33 val = T(val | ((Bits[(Idx << (BitNum-1)) + i] ? 1UL : 0UL) << i));
37 static void setValue(BitVectorTy &Bits, unsigned Idx, T val) { argument
40 Bits[(Idx << (BitNum-1)) + i] = val & (T(1) << i);
47 static T getValue(const BitVectorTy &Bits, unsigned Idx) { argument
50 val = T(val | ((Bits[(Idx << (BitNum-1)) + i] ? 1UL : 0UL) << i));
51 if (Bits[(Idx << (BitNum-1)) + BitNum-1])
56 static void setValue(BitVectorTy &Bits, unsigned Idx, T val) { argument
59 Bits.set((Idx << (BitNum-1)) + BitNum-1);
63 Bits[(Id
77 BitVectorTy Bits; member in class:llvm::PackedVector
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H A DSmallBitVector.h179 uintptr_t Bits = getSmallBits(); local
181 return CountPopulation_32(Bits);
183 return CountPopulation_64(Bits);
214 uintptr_t Bits = getSmallBits(); local
215 if (Bits == 0)
218 return countTrailingZeros(Bits);
220 return countTrailingZeros(Bits);
230 uintptr_t Bits = getSmallBits(); local
232 Bits &= ~uintptr_t(0) << (Prev + 1);
233 if (Bits
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H A DSparseBitVector.h58 BitWord Bits[BITWORDS_PER_ELEMENT]; member in struct:llvm::SparseBitVectorElement
63 memset(&Bits[0], 0, sizeof (BitWord) * BITWORDS_PER_ELEMENT);
69 memset(&Bits[0], 0, sizeof (BitWord) * BITWORDS_PER_ELEMENT);
77 if (Bits[i] != RHS.Bits[i])
89 return Bits[Idx];
98 if (Bits[i])
104 Bits[Idx / BITWORD_SIZE] |= 1L << (Idx % BITWORD_SIZE);
117 Bits[Idx / BITWORD_SIZE] &= ~(1L << (Idx % BITWORD_SIZE));
121 return Bits[Id
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/external/llvm/include/llvm/MC/
H A DSubtargetFeature.h85 uint64_t ToggleFeature(uint64_t Bits, const StringRef String,
/external/llvm/include/llvm/Support/
H A DCommandLine.h1502 unsigned Bits; // Where to store the bits...
1515 Bits |= Bit(V);
1518 unsigned getBits() { return Bits; }
1522 return (Bits & Bit(V)) != 0;
H A DMathExtras.h488 inline double BitsToDouble(uint64_t Bits) { argument
493 T.L = Bits;
499 inline float BitsToFloat(uint32_t Bits) { argument
504 T.I = Bits;
/external/llvm/include/llvm/TableGen/
H A DRecord.h501 convertInitializerBitRange(const std::vector<unsigned> &Bits) const {
578 convertInitializerBitRange(const std::vector<unsigned> &Bits) const override;
655 std::vector<Init*> Bits;
658 : Init(IK_BitsInit), Bits(Range.begin(), Range.end()) {}
671 unsigned getNumBits() const { return Bits.size(); }
677 convertInitializerBitRange(const std::vector<unsigned> &Bits) const override;
694 assert(Bit < Bits.size() && "Bit index out of range!");
695 return Bits[Bit];
722 convertInitializerBitRange(const std::vector<unsigned> &Bits) const override;
1195 //virtual Init *convertInitializerBitRange(const std::vector<unsigned> &Bits);
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/external/llvm/lib/Analysis/
H A DDependenceAnalysis.cpp1281 bool findGCD(unsigned Bits, APInt AM, APInt BM, APInt Delta, argument
1283 APInt A0(Bits, 1, true), A1(Bits, 0, true);
1284 APInt B0(Bits, 0, true), B1(Bits, 1, true);
1400 unsigned Bits = AM.getBitWidth(); local
1401 if (findGCD(Bits, AM, BM, ConstDelta->getValue()->getValue(), G, X, Y)) {
1411 APInt UM(Bits, 1, true);
1421 APInt TU(APInt::getSignedMaxValue(Bits));
1422 APInt TL(APInt::getSignedMinValue(Bits));
1804 unsigned Bits = AM.getBitWidth(); local
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/external/llvm/lib/CodeGen/
H A DLiveIntervalAnalysis.cpp671 ArrayRef<const uint32_t*> Bits; local
674 Bits = getRegMaskBitsInBlock(MBB->getNumber());
677 Bits = getRegMaskBits();
703 UsableRegs.clearBitsNotInMask(Bits[SlotI-Slots.begin()]);
/external/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp3177 SDValue Bits = DAG.getNode(ISD::BITCAST, dl, IntVT, Node->getOperand(0));
3180 DAG.getNode(ISD::AND, dl, IntVT, Bits, ExponentMask),
3185 DAG.getNode(ISD::AND, dl, IntVT, Bits, SignMask),
3190 DAG.getNode(ISD::AND, dl, IntVT, Bits, MantissaMask),
H A DSelectionDAGBuilder.cpp2572 CasesBits[i].Bits++;
2589 << ", Bits: " << CasesBits[i].Bits
H A DSelectionDAGBuilder.h153 unsigned Bits; member in struct:llvm::SelectionDAGBuilder::CaseBits
158 Mask(mask), BB(bb), Bits(bits), ExtraWeight(Weight) { }
199 return C1.Bits > C2.Bits;
/external/llvm/lib/IR/
H A DDataLayout.cpp215 static unsigned inBytes(unsigned Bits) { argument
216 assert(Bits % 8 == 0 && "number of bits must be a byte width multiple");
217 return Bits / 8;
/external/llvm/lib/MC/
H A DSubtargetFeature.cpp153 void SetImpliedBits(uint64_t &Bits, const SubtargetFeatureKV *FeatureEntry, argument
159 Bits |= FE.Value;
160 SetImpliedBits(Bits, &FE, FeatureTable);
169 void ClearImpliedBits(uint64_t &Bits, const SubtargetFeatureKV *FeatureEntry, argument
175 Bits &= ~FE.Value;
176 ClearImpliedBits(Bits, &FE, FeatureTable);
184 SubtargetFeatures::ToggleFeature(uint64_t Bits, const StringRef Feature, argument
192 if ((Bits & FeatureEntry->Value) == FeatureEntry->Value) {
193 Bits &= ~FeatureEntry->Value;
196 ClearImpliedBits(Bits, FeatureEntr
233 uint64_t Bits = 0; // Resulting bits local
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/external/llvm/lib/Support/
H A DFoldingSet.cpp57 Bits.append(reinterpret_cast<unsigned *>(&Ptr),
61 Bits.push_back(I);
64 Bits.push_back(I);
84 Bits.push_back(unsigned(I >> 32));
89 Bits.push_back(Size);
98 Bits.append(Base, Base + Units);
110 Bits.push_back(V);
119 Bits.push_back(V);
135 Bits.push_back(V);
140 Bits
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/external/llvm/lib/TableGen/
H A DRecord.cpp476 ProfileBitsInit(ID, Bits);
480 BitsInit::convertInitializerBitRange(const std::vector<unsigned> &Bits) const {
481 SmallVector<Init *, 16> NewBits(Bits.size());
483 for (unsigned i = 0, e = Bits.size(); i != e; ++i) {
484 if (Bits[i] >= getNumBits())
486 NewBits[i] = getBit(Bits[i]);
524 Init *CurBit = Bits[i];
588 IntInit::convertInitializerBitRange(const std::vector<unsigned> &Bits) const {
589 SmallVector<Init *, 16> NewBits(Bits.size());
591 for (unsigned i = 0, e = Bits
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H A DTGLexer.h46 Bit, Bits, Class, Code, Dag, Def, Foreach, Defm, Field, In, Int, Let, List, enumerator in enum:llvm::tgtok::TokKind
H A DTGParser.cpp694 case tgtok::Bits: {
1934 LetStack[i][j].Bits, LetStack[i][j].Value))
2163 std::vector<unsigned> Bits; local
2164 if (ParseOptionalRangeList(Bits))
2166 std::reverse(Bits.begin(), Bits.end());
2178 Result.push_back(LetRecord(Name, Bits, Val, NameLoc));
H A DTGParser.h36 std::vector<unsigned> Bits; member in struct:llvm::LetRecord
41 : Name(N), Bits(B), Value(V), Loc(L) {
/external/llvm/lib/Target/AArch64/
H A DAArch64BranchRelaxation.cpp257 unsigned Bits) {
258 unsigned MaxOffs = ((1 << (Bits - 1)) - 1) << 2;
255 isBlockInRange(MachineInstr *MI, MachineBasicBlock *DestBB, unsigned Bits) argument
H A DAArch64ISelLowering.cpp6536 unsigned Bits = VT.getVectorElementType().getSizeInBits(); local
6537 uint64_t BitMask = Bits == 64 ? -1ULL : ((1ULL << Bits) - 1);
/external/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp1478 uint32_t Bits = Mapper.fromString(getSysReg(), Valid); local
1480 Inst.addOperand(MCOperand::CreateImm(Bits));
1488 uint32_t Bits = Mapper.fromString(getSysReg(), Valid); local
1490 Inst.addOperand(MCOperand::CreateImm(Bits));
1497 uint32_t Bits = local
1500 Inst.addOperand(MCOperand::CreateImm(Bits));
/external/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.cpp805 uint32_t Bits; local
810 Bits = (Op0 << 14) | (Op1 << 11) | (CRn << 7) | (CRm << 3) | Op2;
813 return Bits;
817 AArch64SysReg::SysRegMapper::toString(uint32_t Bits, bool &Valid) const { argument
820 if (SysRegPairs[i].Value == Bits) {
829 if (CycloneSysRegPairs[i].Value == Bits) {
839 if (InstPairs[i].Value == Bits) {
845 uint32_t Op0 = (Bits >> 14) & 0x3;
846 uint32_t Op1 = (Bits >> 11) & 0x7;
847 uint32_t CRn = (Bits >>
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H A DAArch64BaseInfo.h1146 std::string toString(uint32_t Bits, bool &Valid) const;

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