Searched refs:SetCC (Results 1 - 24 of 24) sorted by relevance

/external/chromium_org/v8/test/cctest/
H A Dtest-disasm-arm.cc107 COMPARE(and_(r2, r3, Operand(r4), SetCC),
114 COMPARE(eor(r4, r5, Operand(r7, LSL, 1), SetCC),
118 COMPARE(eor(r4, r5, Operand(r9, LSL, 3), SetCC, cs),
123 COMPARE(sub(r5, r6, Operand(r10, LSL, 30), SetCC, cc),
127 COMPARE(sub(r5, r6, Operand(r10, LSL, 16), SetCC, mi),
134 COMPARE(rsb(r6, r7, Operand(fp, LSR, 0), SetCC),
143 COMPARE(add(r7, r8, Operand(ip), SetCC),
145 COMPARE(add(r7, r8, Operand(ip, ASR, 31), SetCC, vs),
152 COMPARE(adc(r5, sp, Operand(ip), SetCC),
154 COMPARE(adc(r8, lr, Operand(ip, ASR, 31), SetCC, v
[all...]
H A Dtest-assembler-arm.cc951 __ mov(r1, Operand(r1, ASR, 1), SetCC);
956 __ mov(r2, Operand(r2, ASR, 1), SetCC);
963 __ mov(r3, Operand(r1, ASR, 1), SetCC); // Set the carry.
969 __ mov(r3, Operand(r2, ASR, 1), SetCC); // Unset the carry.
/external/chromium_org/v8/src/compiler/arm/
H A Dcode-generator-arm.cc34 return SetCC;
260 DCHECK_EQ(SetCC, i.OutputSBit());
264 DCHECK_EQ(SetCC, i.OutputSBit());
268 DCHECK_EQ(SetCC, i.OutputSBit());
272 DCHECK_EQ(SetCC, i.OutputSBit());
277 DCHECK_EQ(SetCC, i.OutputSBit());
/external/chromium_org/v8/src/arm/
H A Dcodegen-arm.cc139 __ sub(chars, chars, Operand(64), SetCC);
198 __ bic(temp1, chars, Operand(0x3), SetCC);
206 __ bic(temp2, chars, Operand(0x3), SetCC);
218 __ mov(chars, Operand(chars, LSL, 31), SetCC);
301 __ mov(chars, Operand(chars, LSL, 31), SetCC); // bit0 => ne, bit1 => cs
H A Dcode-stubs-arm.cc193 __ rsb(scratch, scratch, Operand(51), SetCC);
370 __ orr(r0, r3, Operand(r2), SetCC);
908 __ mov(scratch, Operand(scratch, ASR, 1), SetCC);
1841 __ SmiUntag(r1, SetCC);
2022 SetCC);
2069 __ mov(r3, Operand(r0, ASR, 2), SetCC);
2275 __ sub(r1, r1, Operand(1), SetCC);
2904 __ add(count, count, Operand(count), SetCC);
2952 __ mov(r2, Operand(r2, ROR, 1), SetCC);
2953 __ mov(r3, Operand(r3, ROR, 1), SetCC, c
[all...]
H A Dconstants-arm.h215 SetCC = 1 << 20, // Set condition code. enumerator in enum:v8::internal::SBit
H A Dregexp-macro-assembler-arm.cc231 __ sub(r1, r1, r0, SetCC); // Length of capture.
342 __ sub(r1, r1, r0, SetCC); // Length to check.
618 __ sub(r0, sp, r0, SetCC);
681 __ sub(r2, r2, Operand(1), SetCC);
H A Dlithium-codegen-arm.cc873 __ sub(r1, r1, Operand(1), SetCC);
1159 __ rsb(dividend, dividend, Operand::Zero(), SetCC);
1186 __ sub(result, dividend, result, SetCC);
1295 __ sub(result_reg, left_reg, scratch, SetCC);
1376 __ sub(scratch0(), scratch0(), dividend, SetCC); local
1488 __ rsb(result, dividend, Operand::Zero(), SetCC);
1644 __ rsb(result, left, Operand::Zero(), SetCC);
1783 __ mov(result, Operand(left, LSR, scratch), SetCC);
1832 __ SmiTag(result, result, SetCC);
1834 __ SmiTag(result, left, SetCC);
[all...]
H A Dmacro-assembler-arm.cc1790 and_(scratch2, result, Operand(kDoubleAlignmentMask), SetCC);
1818 add(scratch2, source, bits_operand, SetCC, cond);
1904 and_(scratch2, result, Operand(kDoubleAlignmentMask), SetCC);
1920 add(scratch2, result, Operand(object_size, LSL, kPointerSizeLog2), SetCC);
1922 add(scratch2, result, Operand(object_size), SetCC);
2565 sub(result, result, Operand(1), SetCC);
2958 sub(scratch, reg, Operand(1), SetCC);
2970 sub(scratch, reg, Operand(1), SetCC);
2990 SmiUntag(dst, src, SetCC);
2998 SmiUntag(dst, src, SetCC);
[all...]
H A Dfull-codegen-arm.cc179 __ sub(r2, r2, Operand(1), SetCC);
345 __ sub(r3, r3, Operand(Smi::FromInt(delta)), SetCC);
1247 __ mov(r3, Operand(r0), SetCC);
2191 __ sub(r3, r3, Operand(Smi::FromInt(1)), SetCC);
2246 __ sub(r3, r3, Operand(1), SetCC);
2415 __ add(scratch1, left, Operand(right), SetCC);
2420 __ sub(scratch1, left, Operand(right), SetCC);
2433 __ add(scratch2, right, Operand(left), SetCC);
3948 __ SmiUntag(array_length, SetCC);
3985 __ add(string_length, string_length, Operand(scratch), SetCC);
[all...]
H A Dbuiltins-arm.cc496 __ sub(r3, r3, Operand(r6), SetCC);
645 __ sub(r3, r3, Operand(2), SetCC);
H A Dmacro-assembler-arm.h1234 SmiTag(ip, src, SetCC);
/external/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp544 SDValue SetCC = N->getOperand(0);
546 if ((SetCC.getOpcode() != ISD::SETCC) ||
547 !SetCC.getOperand(0).getValueType().isInteger())
571 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC.getOperand(2))->get();
574 SetCC = DAG.getSetCC(DL, SetCC.getValueType(), SetCC.getOperand(0),
575 SetCC.getOperand(1), ISD::getSetCCInverse(CC, true));
577 return DAG.getNode(ISD::SELECT, DL, FalseTy, SetCC, False, True);
600 return DAG.getNode(ISD::ADD, DL, SetCC
[all...]
H A DMipsSEISelLowering.cpp1023 SDValue SetCC = N->getOperand(0); local
1025 if (SetCC.getOpcode() != MipsISD::SETCC_DSP)
1029 SetCC.getOperand(0), SetCC.getOperand(1),
1030 N->getOperand(1), N->getOperand(2), SetCC.getOperand(2));
/external/chromium_org/v8/src/x64/
H A Ddisasm-x64.cc413 int SetCC(byte* data);
807 int DisassemblerX64::SetCC(byte* data) { function in class:disasm::DisassemblerX64
1294 current = data + SetCC(data);
/external/chromium_org/v8/src/ia32/
H A Ddisasm-ia32.cc338 int SetCC(byte* data);
662 int DisassemblerIA32::SetCC(byte* data) { function in class:disasm::DisassemblerIA32
1100 data += SetCC(data);
/external/chromium_org/v8/src/x87/
H A Ddisasm-x87.cc338 int SetCC(byte* data);
662 int DisassemblerX87::SetCC(byte* data) { function in class:disasm::DisassemblerX87
1121 data += SetCC(data);
/external/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp12406 && "SetCC type must be 8-bit or 1-bit integer");
12442 SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8,
12446 return DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, SetCC);
12447 return SetCC;
12465 SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8,
12468 return DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, SetCC);
12469 return SetCC;
13579 SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8,
13581 return DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, SetCC);
13917 SDValue SetCC
[all...]
/external/llvm/lib/Target/R600/
H A DSIISelLowering.cpp776 SDNode *SetCC = Intr; local
777 assert(SetCC->getConstantOperandVal(1) == 1);
778 assert(cast<CondCodeSDNode>(SetCC->getOperand(2).getNode())->get() ==
780 Intr = SetCC->getOperand(0).getNode();
/external/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp615 // isOneUseSetCC - Return true if this is a SetCC-equivalent operation with only
3747 llvm_unreachable("Unhandled SetCC Equivalent!");
4920 // Extend SetCC uses if necessary.
4922 SDNode *SetCC = SetCCs[i]; local
4926 SDValue SOp = SetCC->getOperand(j);
4933 Ops.push_back(SetCC->getOperand(2));
4934 CombineTo(SetCC, DAG.getNode(ISD::SETCC, DL, SetCC->getValueType(0), Ops));
5137 SDValue SetCC = DAG.getSetCC(DL, local
5142 DAG.getSExtOrTrunc(SetCC, D
7420 SDValue SetCC = local
7493 SDValue SetCC = DAG.getSetCC(SDLoc(TheXor), local
[all...]
H A DLegalizeIntegerTypes.cpp522 // Promote all the way up to the canonical SetCC type.
564 SDValue SetCC = DAG.getNode(N->getOpcode(), dl, SVT, LHS, RHS, local
569 return DAG.getNode(ISD::TRUNCATE, dl, NVT, SetCC);
922 // Promote all the way up to the canonical SetCC type.
1015 // Promote all the way up to the canonical SetCC type.
H A DLegalizeDAG.cpp1658 /// \returns true if the SetCC has been legalized, false if it hasn't.
3780 SDValue SetCC = DAG.getSetCC(dl, SetCCType, Sum, LHS, CC);
3782 Results.push_back(DAG.getBoolExtOrTrunc(SetCC, dl, ResultType, ResultType));
/external/chromium_org/v8/src/ic/arm/
H A Dic-arm.cc544 __ sub(r5, r5, r6, SetCC);
/external/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp6819 /// \brief Helper structure to keep track of SetCC information.
6825 /// \brief Helper structure to be able to read SetCC information. If set to
7658 SDValue SetCC = local
7662 return DAG.getNode(ISD::VSELECT, SDLoc(N), ResVT, SetCC,
7693 SDValue SetCC = DAG.getNode(ISD::SETCC, DL, CCVT, LHS, RHS, N0.getOperand(2)); local
7697 SDValue Mask = DAG.getVectorShuffle(CCVT, DL, SetCC, SetCC, DUPMask.data());

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