| /external/llvm/lib/Target/ARM/ |
| H A D | ARMOptimizeBarriersPass.cpp | 43 return !(MI->mayLoad() ||
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| H A D | ARMHazardRecognizer.cpp | 56 (LastMI->mayLoad() || LastMI->mayStore())) &&
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| /external/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrBuilder.h | 33 if (MCID.mayLoad())
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| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64A53Fix835769.cpp | 51 return (MI->mayLoad() || MI->mayStore());
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| H A D | AArch64RegisterInfo.cpp | 230 if (!MI->mayLoad() && !MI->mayStore())
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| H A D | AArch64LoadStoreOptimizer.cpp | 393 bool MayLoad = FirstMI->mayLoad();
505 if (FirstMI->mayStore() && MI->mayLoad())
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| H A D | AArch64ConditionalCompares.cpp | 412 if (I.mayLoad()) {
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| /external/llvm/lib/Target/Mips/ |
| H A D | MipsDelaySlotFiller.cpp | 387 if (!MI.mayStore() && !MI.mayLoad())
395 SeenLoad |= MI.mayLoad();
444 HasHazard |= MI.mayLoad() || OrigSeenStore;
446 SeenNoObjLoad |= MI.mayLoad();
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| H A D | MipsOptimizePICCall.cpp | 267 if (!DefMI->mayLoad() || DefMI->getNumOperands() < 3)
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| /external/llvm/lib/Target/X86/ |
| H A D | X86InstrBuilder.h | 155 if (MCID.mayLoad())
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| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCHazardRecognizers.cpp | 35 if (!MCID->mayLoad())
284 isLoad = MCID.mayLoad();
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| /external/llvm/include/llvm/MC/ |
| H A D | MCInstrDesc.h | 367 bool mayLoad() const { function in class:llvm::MCInstrDesc
386 /// 2. Memory accesses. Use mayLoad/mayStore.
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| /external/llvm/lib/CodeGen/ |
| H A D | TargetInstrInfo.cpp | 477 NewMI->mayLoad()) &&
600 if (MI->mayLoad() && !MI->isInvariantLoad(AA))
753 if (DefMI->mayLoad())
771 return MI->mayLoad() ? 2 : 1;
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| H A D | StackColoring.cpp | 555 bool TouchesMemory = I.mayLoad() || I.mayStore();
591 if (!I.mayLoad() && !I.mayStore())
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| H A D | ScheduleDAGInstrs.cpp | 465 (!MI->mayLoad() || !MI->isInvariantLoad(AA))))
636 Dep.setLatency(((*I)->getInstr()->mayLoad()) ? LatencyToLoad : 0);
839 && (HasVRegDef || MI->mayLoad())) {
889 if (AliasChain->getInstr()->mayLoad())
990 } else if (MI->mayLoad()) {
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| H A D | MachineInstr.cpp | 1302 (mayLoad() && hasOrderedMemoryRef())) {
1316 if (mayLoad() && !isInvariantLoad(AA))
1331 !mayLoad() &&
1356 if (!mayLoad())
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| H A D | EarlyIfConversion.cpp | 216 if (I->mayLoad()) {
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| H A D | MachineCSE.cpp | 342 if (MI->mayLoad()) {
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| /external/llvm/utils/TableGen/ |
| H A D | CodeGenInstruction.h | 234 bool mayLoad : 1;
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| H A D | CodeGenDAGPatterns.cpp | 2560 bool mayLoad; member in class:InstAnalyzer
2565 : CDP(cdp), hasSideEffects(false), mayStore(false), mayLoad(false),
2579 if (hasSideEffects || mayLoad || mayStore || isVariadic)
2610 if (CP.hasProperty(SDNPMayLoad)) mayLoad = true;
2629 if (N->NodeHasProperty(SDNPMayLoad, CDP)) mayLoad = true;
2636 mayLoad = true;// These may load memory.
2677 if (InstInfo.mayLoad != PatInfo.mayLoad && !InstInfo.mayLoad_Unset) {
2678 // Allow explicitly setting mayLoad = 1, even when the pattern has no loads.
2680 if (!InstInfo.mayLoad) {
[all...] |
| H A D | DAGISelMatcherGen.cpp | 690 return II.mayLoad || II.mayStore;
736 && (II.hasCtrlDep || II.mayLoad || II.mayStore || II.canFoldAsLoad ||
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| /external/llvm/lib/Target/Sparc/ |
| H A D | DelaySlotFiller.cpp | 239 if (candidate->mayLoad()) {
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| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVLIWPacketizer.cpp | 497 if (MI->getDesc().mayLoad()) {
511 llvm_unreachable("mayLoad or mayStore not set for Post Increment operation");
588 PacketMI->getDesc().mayLoad() &&
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| /external/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstr.h | 517 /// mayLoad - Return true if this instruction could possibly read memory.
520 bool mayLoad(QueryType Type = AnyInBundle) const {
1030 /// effects that are not modeled by mayLoad / mayStore, etc.
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| /external/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 977 if (MCID.mayLoad() || MCID.mayStore()) {
989 expandMemInst(Inst, IDLoc, Instructions, MCID.mayLoad(), true);
999 expandMemInst(Inst, IDLoc, Instructions, MCID.mayLoad(), false);
1003 expandMemInst(Inst, IDLoc, Instructions, MCID.mayLoad(), false);
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