/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
H A D | AMDGPUISelLowering.cpp | 315 unsigned Reg, EVT VT) const { 319 if (!MRI.isLiveIn(Reg)) { 321 MRI.addLiveIn(Reg, VirtualRegister); 323 VirtualRegister = MRI.getLiveInVirtReg(Reg); 313 CreateLiveInRegister(SelectionDAG &DAG, const TargetRegisterClass *RC, unsigned Reg, EVT VT) const argument
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H A D | AMDGPUInstrInfo.cpp | 165 unsigned Reg, bool UnfoldLoad, 164 unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI, unsigned Reg, bool UnfoldLoad, bool UnfoldStore, SmallVectorImpl<MachineInstr*> &NewMIs) const argument
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H A D | R600ISelLowering.cpp | 262 unsigned Reg = AMDGPU::R600_TReg32RegClass.getRegister(RegIndex); local 263 if (!MRI.isLiveOut(Reg)) { 264 MRI.addLiveOut(Reg); 266 return DAG.getCopyToReg(Chain, Op.getDebugLoc(), Reg, Op.getOperand(2)); 283 unsigned Reg = AMDGPU::R600_TReg32RegClass.getRegister(RegIndex); local 284 return CreateLiveInRegister(DAG, &AMDGPU::R600_TReg32RegClass, Reg, VT);
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H A D | R600InstrInfo.cpp | 349 unsigned Reg = MI->getOperand(idx).getReg(); local 350 switch (Reg) {
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H A D | SIISelLowering.cpp | 367 unsigned Reg = dstClass->getRegister(SGPRIndex); local 369 DAG.ReplaceAllUsesOfValueWith(Op, CreateLiveInRegister(DAG, dstClass, Reg,
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/external/chromium_org/third_party/mesa/src/src/mesa/program/ |
H A D | prog_optimize.c | 842 GLuint Reg; /** The temporary register index */ member in struct:interval 893 if (list->Intervals[k].Reg == inv->Reg) { 1078 inv.Reg = i; 1092 printf("Reg[%d] live [%d, %d]:", 1093 inv->Reg, inv->Start, inv->End); 1166 printf("Consider register %u\n", live->Reg); 1183 const GLint regNew = registerMap[inv->Reg]; 1187 printf(" expire interval for reg %u\n", inv->Reg); 1209 registerMap[live->Reg] [all...] |
/external/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
H A D | ProgramState.h | 337 bool isTainted(const MemRegion *Reg, TaintTagType Kind=TaintTagGeneric) const; 340 DynamicTypeInfo getDynamicTypeInfo(const MemRegion *Reg) const; 343 ProgramStateRef setDynamicTypeInfo(const MemRegion *Reg, 347 ProgramStateRef setDynamicTypeInfo(const MemRegion *Reg, argument 350 return setDynamicTypeInfo(Reg, DynamicTypeInfo(NewTy, CanBeSubClassed));
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/external/clang/lib/CodeGen/ |
H A D | CGValue.h | 344 static LValue MakeGlobalReg(llvm::Value *Reg, argument 349 R.V = Reg;
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/external/clang/lib/StaticAnalyzer/Core/ |
H A D | ExprEngine.cpp | 226 SVal Reg = loc::MemRegionVal(TR); local 231 State = State->bindLoc(Reg, V); 237 Reg = StoreMgr.evalDerivedToBase(Reg, *I); 240 State = State->BindExpr(Result, LC, Reg);
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H A D | ProgramState.cpp | 699 if (const MemRegion *Reg = V.getAsRegion()) 700 return isTainted(Reg, Kind); 704 bool ProgramState::isTainted(const MemRegion *Reg, TaintTagType K) const { argument 705 if (!Reg) 710 if (const ElementRegion *ER = dyn_cast<ElementRegion>(Reg)) 713 if (const SymbolicRegion *SR = dyn_cast<SymbolicRegion>(Reg)) 716 if (const SubRegion *ER = dyn_cast<SubRegion>(Reg)) 761 DynamicTypeInfo ProgramState::getDynamicTypeInfo(const MemRegion *Reg) const { 762 Reg = Reg 781 setDynamicTypeInfo(const MemRegion *Reg, DynamicTypeInfo NewTy) const argument [all...] |
/external/llvm/include/llvm/CodeGen/ |
H A D | CallingConvLower.h | 258 bool isAllocated(unsigned Reg) const { 259 return UsedRegs[Reg/32] & (1 << (Reg&31)); 310 unsigned AllocateReg(unsigned Reg) { argument 311 if (isAllocated(Reg)) return 0; 312 MarkAllocated(Reg); 313 return Reg; 317 unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) { argument 318 if (isAllocated(Reg)) return 0; 319 MarkAllocated(Reg); 333 unsigned Reg = Regs[FirstUnalloc]; local 371 unsigned Reg = Regs[FirstUnalloc], ShadowReg = ShadowRegs[FirstUnalloc]; local [all...] |
H A D | FunctionLoweringInfo.h | 154 const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg) { argument 155 if (!LiveOutRegInfo.inBounds(Reg)) 158 const LiveOutInfo *LOI = &LiveOutRegInfo[Reg]; 170 const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth); 173 void AddLiveOutRegInfo(unsigned Reg, unsigned NumSignBits, argument 179 LiveOutRegInfo.grow(Reg); 180 LiveOutInfo &LOI = LiveOutRegInfo[Reg]; 198 unsigned Reg = It->second; local 199 LiveOutRegInfo.grow(Reg); 200 LiveOutRegInfo[Reg] [all...] |
H A D | LiveInterval.h | 535 LiveInterval(unsigned Reg, float Weight) argument 536 : reg(Reg), weight(Weight) {}
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H A D | LiveIntervalAnalysis.h | 108 LiveInterval &getInterval(unsigned Reg) { argument 109 if (hasInterval(Reg)) 110 return *VirtRegIntervals[Reg]; 112 return createAndComputeVirtRegInterval(Reg); 115 const LiveInterval &getInterval(unsigned Reg) const { 116 return const_cast<LiveIntervals*>(this)->getInterval(Reg); 119 bool hasInterval(unsigned Reg) const { 120 return VirtRegIntervals.inBounds(Reg) && VirtRegIntervals[Reg]; 124 LiveInterval &createEmptyInterval(unsigned Reg) { argument 131 createAndComputeVirtRegInterval(unsigned Reg) argument 138 removeInterval(unsigned Reg) argument [all...] |
H A D | LivePhysRegs.h | 74 void addReg(unsigned Reg) { argument 76 assert(Reg <= TRI->getNumRegs() && "Expected a physical register."); 77 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); 84 void removeReg(unsigned Reg) { argument 86 assert(Reg <= TRI->getNumRegs() && "Expected a physical register."); 87 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); 90 for (MCSuperRegIterator SuperRegs(Reg, TRI, /*IncludeSelf=*/false); 98 /// \brief Returns true if register @p Reg is contained in the set. This also 99 /// works if only the super register of @p Reg has been defined, because we 101 bool contains(unsigned Reg) cons [all...] |
H A D | LiveVariables.h | 106 /// isLiveIn - Is Reg live in to MBB? This means that Reg is live through 107 /// MBB, or it is killed in MBB. If Reg is only used by PHI instructions in 110 unsigned Reg, 150 /// HandlePhysRegKill - Add kills of Reg and its sub-registers to the 153 bool HandlePhysRegKill(unsigned Reg, MachineInstr *MI); 158 void HandlePhysRegUse(unsigned Reg, MachineInstr *MI); 159 void HandlePhysRegDef(unsigned Reg, MachineInstr *MI, 165 MachineInstr *FindLastRefOrPartRef(unsigned Reg); 170 MachineInstr *FindLastPartialDef(unsigned Reg, 281 isLiveIn(unsigned Reg, const MachineBasicBlock &MBB) argument 299 isPHIJoin(unsigned Reg) argument 302 setPHIJoin(unsigned Reg) argument [all...] |
H A D | MachineBasicBlock.h | 320 void addLiveIn(unsigned Reg) { LiveIns.push_back(Reg); } argument 329 void removeLiveIn(unsigned Reg); 333 bool isLiveIn(unsigned Reg) const; 621 /// computeRegisterLiveness - Return whether (physical) register \c Reg 628 /// \c Reg must be a physical register. 630 unsigned Reg, MachineInstr *MI,
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H A D | MachineFrameInfo.h | 38 unsigned Reg; member in class:llvm::CalleeSavedInfo 43 : Reg(R), FrameIdx(FI) {} 46 unsigned getReg() const { return Reg; }
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H A D | MachineInstrBuilder.h | 352 unsigned Reg, 357 .addReg(Reg, RegState::Debug) 363 .addReg(Reg, RegState::Debug) 378 unsigned Reg, 382 MachineInstr *MI = BuildMI(MF, DL, MCID, IsIndirect, Reg, Offset, MD); 348 BuildMI(MachineFunction &MF, DebugLoc DL, const MCInstrDesc &MCID, bool IsIndirect, unsigned Reg, unsigned Offset, const MDNode *MD) argument 373 BuildMI(MachineBasicBlock &BB, MachineBasicBlock::iterator I, DebugLoc DL, const MCInstrDesc &MCID, bool IsIndirect, unsigned Reg, unsigned Offset, const MDNode *MD) argument
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H A D | MachineOperand.h | 167 } Reg; member in union:llvm::MachineOperand::__anon25488 342 void setReg(unsigned Reg); 351 /// subregister Reg:SubReg. Take any existing SubReg index into account, 353 /// Reg must be a virtual register, SubIdx can be 0. 355 void substVirtReg(unsigned Reg, unsigned SubIdx, const TargetRegisterInfo&); 358 /// Reg, taking any existing SubReg into account. For instance, 361 void substPhysReg(unsigned Reg, const TargetRegisterInfo&); 550 void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false, 576 static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp = false, 595 Op.SmallContents.RegNo = Reg; [all...] |
H A D | MachineRegisterInfo.h | 36 virtual void MRI_NoteNewVirtualRegister(unsigned Reg) = 0; 91 return MO->Contents.Reg.Next; 195 /// Verify the sanity of the use list for Reg. 196 void verifyUseList(unsigned Reg) const; 228 inline iterator_range<reg_iterator> reg_operands(unsigned Reg) const { 229 return iterator_range<reg_iterator>(reg_begin(Reg), reg_end()); 244 reg_instructions(unsigned Reg) const { 245 return iterator_range<reg_instr_iterator>(reg_instr_begin(Reg), 260 inline iterator_range<reg_bundle_iterator> reg_bundles(unsigned Reg) const { 261 return iterator_range<reg_bundle_iterator>(reg_bundle_begin(Reg), 599 setRegAllocationHint(unsigned Reg, unsigned Type, unsigned PrefReg) argument 652 setPhysRegUsed(unsigned Reg) argument 666 setPhysRegUnused(unsigned Reg) argument 739 addLiveIn(unsigned Reg, unsigned vreg = 0) argument [all...] |
H A D | MachineTraceMetrics.h | 121 unsigned Reg; member in struct:llvm::MachineTraceMetrics::LiveInReg 127 LiveInReg(unsigned Reg, unsigned Height = 0) : Reg(Reg), Height(Height) {} argument
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H A D | RegisterScavenging.h | 45 ScavengedInfo(int FI = -1) : FrameIndex(FI), Reg(0), Restore(nullptr) {} 52 unsigned Reg; member in struct:llvm::RegScavenger::ScavengedInfo 162 void setUsed(unsigned Reg); 165 bool isReserved(unsigned Reg) const { return MRI->isReserved(Reg); } 171 bool isUsed(unsigned Reg, bool CheckReserved = true) const { argument 172 return !RegsAvailable.test(Reg) || (CheckReserved && isReserved(Reg)); 175 /// isAliasUsed - Is Reg or an alias currently in use? 176 bool isAliasUsed(unsigned Reg) cons [all...] |
H A D | ScheduleDAG.h | 80 /// Reg - For Data, Anti, and Output dependencies, the associated 83 unsigned Reg; member in union:llvm::SDep::__anon25497 101 SDep(SUnit *S, Kind kind, unsigned Reg) argument 105 llvm_unreachable("Reg given for non-register dependence!"); 108 assert(Reg != 0 && 109 "SDep::Anti and SDep::Output must use a non-zero Reg!"); 110 Contents.Reg = Reg; 114 Contents.Reg = Reg; 240 setReg(unsigned Reg) argument [all...] |
H A D | ScheduleDAGInstrs.h | 50 unsigned Reg; member in struct:llvm::PhysRegSUOper 52 PhysRegSUOper(SUnit *su, int op, unsigned R): SU(su), OpIdx(op), Reg(R) {} 54 unsigned getSparseSetIndex() const { return Reg; }
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