| 68da5dfc2c2e9c0aca47431076be0cd43406d4aa |
|
30-Aug-2012 |
Paul Berry <stereotype441@gmail.com> |
intel: Add map_stencil_as_y_tiled to intel_region_get_aligned_offset.
This patch modifies intel_region_get_aligned_offset() to make the
appropriate calculation when the blorp engine sets up a W-tiled
stencil buffer using a Y-tiled SURFACE_STATE.
Acked-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit b760c9913dcff848a2aa0e60abeb48e596ae8fee)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 96fd94ba9421c7c3072988f999ee869534f2bc2a |
|
30-Aug-2012 |
Paul Berry <stereotype441@gmail.com> |
intel: Add map_stencil_as_y_tiled to intel_region_get_tile_masks.
When the blorp engine is performing a blit from one stencil buffer to
another, it sets up the surface state for these buffers as Y-tiled, so
it needs to be able to force intel_region_get_tile_masks() to return
the appropriate masks for a Y-tiled region.
Acked-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 50dec7fc2d5ba813aaa822596d124098a22db301)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 00978098794f723230a33cab1c1152686f1c4fa5 |
|
31-Aug-2012 |
Jakob Bornecrantz <jakob@vmware.com> |
dri: Rework planar image interface
As discussed with Kristian on #wayland. Pushes the decision of components into
the dri driver giving it greater freedom to allow t to implement YUV samplers
in hardware, and which mode to use.
This interface will also allow drivers like SVGA to implement YUV surfaces
without the need to sub-allocate and instead send 3 seperate buffers for each
channel, currently not implemented.
I have tested these changes on Gallium Svga. Scott tested them on both intel
and Gallium Radeon. Kristan and Pekka tested them on intel.
v2: Fix typo in dri2_from_planar.
v3: Merge in intel changes.
(cherry picked from commit 6a7dea93fa70d670a5954e47a47075a2703209d4)
Tested-by: Scott Moreau <oreaus@gmail.com>
Tested-by: Pekka Paalanen <ppaalanen@gmail.com>
Tested-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Signed-off-by: Jakob Bornecrantz <jakob@vmware.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 6bb71b8cbe6b17a5d59e369631502e642804406e |
|
15-Aug-2012 |
Jakob Bornecrantz <jakob@vmware.com> |
dri: Remove image write function
Since its not used by anything anymore and no release has gone out
where it was being used.
Tested-by: Scott Moreau <oreaus@gmail.com>
Signed-off-by: Jakob Bornecrantz <jakob@vmware.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 95bc0527e9f81c62cbfe02dace94e73d9950d04d |
|
05-Jul-2012 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Implement __DRIimage::createSubImage and bump supported version to 5
We use the new miptree offset to pick out the sub-image when we bind
the EGLImage to a texture.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| e408c17767c82c3bbd32d0386d5d9141c1fb20dc |
|
05-Jul-2012 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Remove unused __DRIimage::data_type field
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 434fc8bde41f07687ad8941ceba03c4b3e0e75bb |
|
27-Apr-2012 |
Paul Berry <stereotype441@gmail.com> |
intel: Add extern "C" declarations to headers
These declarations are necessary to allow C++ code to call C code
without causing unresolved symbols (which would make the driver fail
to load).
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 3ec0e55b63db3c1067f3bbf4563beb3b98a19288 |
|
15-Apr-2012 |
Paul Berry <stereotype441@gmail.com> |
i965: Fix mipmap offsets for HiZ and separate stencil buffers.
When rendering to a miplevel other than 0 within a color, depth,
stencil, or HiZ buffer, we need to tell the GPU to render to an offset
within the buffer, so that the data is written into the correct
miplevel. We do this using a coarse offset (in pages), and a fine
adjustment (the so-called "tile_x" and "tile_y" values, which are
measured in pixels).
We have always computed the coarse offset and fine adjustment using
intel_renderbuffer_tile_offsets() function. This worked fine for
color and combined depth/stencil buffers, but failed to work properly
when HiZ and separate stencil were in use. It failed to work because
there is only one set of fine adjustment controls shared by the HiZ,
depth, and stencil buffers, so we need to choose tile_x and tile_y
values that are compatible with the tiling of all three buffers, and
then compute separate coarse offsets for each buffer.
This patch fixes the HiZ and separate stencil case by replacing the
call to intel_renderbuffer_tile_offsets() with calls to two functions:
intel_region_get_tile_masks(), which determines how much of the
adjustment can be performed using offsets and how much can be
performed using tile_x and tile_y, and
intel_region_get_aligned_offset(), which computes the coarse offset.
intel_region_get_tile_offsets() is still used for color renderbuffers,
so to avoid code duplication, I've re-worked it to use
intel_region_get_tile_masks() and intel_region_get_aligned_offset().
On i965 Gen6, fixes piglit tests
"texturing/depthstencil-render-miplevels 1024 X" where X is one of
(depth, depth_and_stencil, depth_stencil_single_binding, depth_x,
depth_x_and_stencil, stencil, stencil_and_depth, stencil_and_depth_x).
On i965 Gen7, the variants of
"texturing/depthstencil-render-miplevels" that contain a stencil
buffer still fail, due to another problem: Gen7 seems to ignore the 3
LSB's of the tile_y adjustment (and possibly also tile_x).
v2: Removed spurious comments. Added assertions to check
preconditions of intel_region_get_aligned_offset().
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 4fddb2ba21add1c1968330e5224ecead59da3995 |
|
02-May-2012 |
Kristian Høgsberg <krh@bitplanet.net> |
gbm: Add gbm_bo_write entry point
This new gbm entry point allows writing data into a gbm bo. The bo has
to be created with the GBM_BO_USE_WRITE flag, and it's only required to
work for GBM_BO_USE_CURSOR_64X64 bos.
The gbm API is designed to be the glue layer between EGL and KMS, but there
was never a mechanism initialize a buffer suitable for use with KMS
hw cursors. The hw cursor bo is typically not compatible with anything EGL
can render to, and thus there's no way to get data into such a bo.
gbm_bo_write() fills that gap while staying out of the efficient
cpu->gpu pixel transfer business.
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 8de5c355fa2bf0f30df2c7cf39aee01e793284bf |
|
21-Feb-2012 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
gbm: track buffer format through DRI drivers
GBM needs the buffer format in order to communicate with DRM and clients
for things like scanout.
So track the DRI format requested in the various back ends and use it to
return the DRI format back to GBM when requested. GBM will then map
this into the GBM surface type (which is in turn based on the DRM fb
format list).
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 4cb1d6a25e4749ec5e0389ca3da468adbbe5299e |
|
30-Nov-2011 |
Eric Anholt <eric@anholt.net> |
intel: Make intel_region_map return void *.
We don't gripe about void * arithmetic for our driver, and this
prevents silly casting when assigning the result of mapping to
non-byte types.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| f8377b411dfe3c879eaab11bb86f509178796bd1 |
|
22-Sep-2011 |
Chad Versace <chad@chad-versace.us> |
intel: Add 'mode' param to intel_region_map
The 'mode' param is a bitset of GL_MAP_READ_BIT, GL_MAP_WRITE_BIT.
A future commit will perform buffer resolves in intel_region_map(). So,
even though the access mode is irrelevant to the GTT, the extra
information allows us to intelligently avoid unneccessary buffer resolves.
Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 2e5a1a254ed81b1d3efa6064f48183eefac784d0 |
|
07-Oct-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
intel: Convert from GLboolean to 'bool' from stdbool.h.
I initially produced the patch using this bash command:
for file in {intel,i915,i965}/*.{c,cpp,h}; do [ ! -h $file ] && sed -i
's/GLboolean/bool/g' $file && sed -i 's/GL_TRUE/true/g' $file && sed -i
's/GL_FALSE/false/g' $file; done
Then I manually added #include <stdbool.h> to fix compilation errors,
and converted a few functions back to GLboolean that were used in core
Mesa's function pointer table to avoid "incompatible pointer" warnings.
Finally, I cleaned up some whitespace issues introduced by the change.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Chad Versace <chad@chad-versace.us>
Acked-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| b07c78bfe94c17e6fccba70923b03a29c751fde1 |
|
29-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Consolidate texture validation copy code, and reuse it correctly.
The path for ->Data was failing to be called for the FBO draw offset
fallback, and also had mismatched compressed texture support code.
This drops the intel_prepare_render() in the blit path. We aren't
copying to/from a GL_FRONT buffer, so it doesn't matter.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 8004a1cb95b8a195f3f4bbaa8d39d2f3297167de |
|
22-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Rename region->buffer to region->bo, and remove accessor function.
We call all the other drm_intel_bo pointers in intel/*.h "bo", so this
one was rather out of place.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| bc0335fc0e0bd6a777ef16ad5245d35ccf7adcf6 |
|
21-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Remove the pbo zero-copy code.
There were notes about the possibility of slowdowns due to zcopy from
a PBO due to thrashing around of the region. Slowdowns are even more
likely now that textures are generally tiled, which a zcopy wouldn't
get. Additionally, there were no checks on the buffer size to ensure
that the hardware-required rounding was present, which could result in
GPU hangs on large zcopy PBOs.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| b17aab5753a6d14c9e757bedb186963b2dae8823 |
|
31-May-2011 |
Eric Anholt <eric@anholt.net> |
intel: Move the draw_x/draw_y to the renderbuffer where it belongs.
It was originally located in the region because the tracking of
depth/color buffers was on the regions, and getting back to the irb
would have been tricky. Now, we're keying off of the renderbuffer in
more places, which means we can move these fields where they belong.
This could fix potential rendering failure with a single texture
having multiple images attached to different renderbuffers across
shareCtx (as far as I can tell, this was the only failure we could
cause, since anything else should trigger intel_render_texture in
between, for example a BindFramebuffer).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 3e43adef95ee24dd218279d2de56939b90edcb4c |
|
13-May-2011 |
Eric Anholt <eric@anholt.net> |
i965: Add support for rendering to depthbuffer mipmap levels > 0.
Fixes
GL_ARB_depth_texture/fbo-clear-formats
GL_EXT_packed_depth_stencil/fbo-clear-formats
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| f301932dba4cc75e810e0c051e39247128a899fc |
|
07-Jun-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Support EGL_MESA_image_drm
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 9087ba128089ed0dc00e6eb38f37126fb7557d3b |
|
04-Jun-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Take an intel_screen pointer in intel_alloc_region_* functions
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 34474fa4119378ef9fbb9fb557cc19c0a1ca1f7e |
|
07-Jun-2010 |
Eric Anholt <eric@anholt.net> |
intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.
The slightly less mechanical change of converting the emit_reloc calls
will follow.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| da011faf48155a5c02ebc1fe1fa20a4f54b8c657 |
|
17-Mar-2010 |
Eric Anholt <eric@anholt.net> |
intel: Rely on allocated region pitch for the miptree pitch.
Bug #26966: 945 miptree pitch disagreement with libdrm.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 32f143b4327521a058dc05f0ab9087a5696b9618 |
|
17-Mar-2010 |
Eric Anholt <eric@anholt.net> |
intel: Remove extra tiling setting after allocating a tiled region.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| a589da14dee0c2a32e6e529f1a390b01a3ee4001 |
|
16-Mar-2010 |
Eric Anholt <eric@anholt.net> |
i965: Fix inversion for glCopyPixels to/from FBOs.
fixes piglit fbo-copypix.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| c26247100bfd453a7ec013f630abe366c12fbd8b |
|
12-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Implement DRI image extension
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 2d99588b3556928a0879b4160210ac771dbf1f0b |
|
11-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Track named regions and make sure we only have one region per named bo
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| fa43956b5ce6b48d29f973fc54bd77d1a11e32e4 |
|
11-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
i915: Remove left-over drmUnmap()
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 2d17dbfb5346b6d75e87c839148cbe125bf5cd6d |
|
09-Jul-2009 |
Eric Anholt <eric@anholt.net> |
intel: Keep track of x,y offsets in miptrees and use them for blitting.
By just using offsets, we confused the hardware's tiling calculations,
resulting in failures in miptree validation and blit clears.
Fixes piglit fbo-clearmipmap.
Bug #23552. (automatic mipmap generation)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 8f81a6468fdbc7320800ea497791e3e1b8f782ca |
|
22-Jun-2009 |
Eric Anholt <eric@anholt.net> |
intel: Avoid trying to do blits to Y tiled regions.
This is somewhat nasty, but we need to do Y-tiled depth for FBO support.
May help with corruption and hangs since enabling texture tiling, and
since switching depth textures to Y tiled.
Fixes piglit depthtex.c on 965.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 246d59c29e3e5a57dcf2f60ad429eb1606193ef0 |
|
22-Jun-2009 |
Eric Anholt <eric@anholt.net> |
intel: Fix some potential writes to zero-copy PBOs when used as regions.
I was in the midst of fixing some blitting-with-Y-tiled issues when I
noticed this. Hopefully PBO usage will be a little more robust, as a
result.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 6a49473ab5797b1e6ce021e396902f9cb77674ef |
|
22-Jun-2009 |
Eric Anholt <eric@anholt.net> |
intel: Remove long-unused intel_region_fill and intelEmitFillBlit.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 1ba96651e12b3c74fb9c8f5a61b183ef36a27b1e |
|
03-Jun-2009 |
Eric Anholt <eric@anholt.net> |
intel: Add support for tiled textures.
This is about a 30% performance win in OA with high settings on my GM45,
and experiments with 915GM indicate that it'll be around a 20% win there.
Currently, 915-class hardware is seriously hurt by the fact that we use
fence regs to control the tiling even for 3D instructions that could live
without them, so we spend a bunch of time waiting on previous rendering in
order to pull fences off. Thus, the texture_tiling driconf option defaults
off there for now.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 40dd024be618d805b3744e15d25e115018641324 |
|
18-Feb-2009 |
Eric Anholt <eric@anholt.net> |
intel: tell libdrm whether we want a cpu-ready or gpu-ready BO for regions.
This lets us avoid allocing new buffers for renderbuffers, finalized miptrees,
and PBO-uploaded textures when there's an unreferenced but still active one
cached, while also avoiding CPU waits for batchbuffers and CPU-uploaded
textures. The size of BOs allocated for a desktop running current GL
cairogears on i915 is cut in half with this.
Note that this means we require libdrm 2.4.5.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| ecadb51bbcb972a79f3ed79e65a7986b9396e757 |
|
18-Sep-2008 |
Brian Paul <brian.paul@tungstengraphics.com> |
mesa: added "main/" prefix to includes, remove some -I paths from Makefile.template
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 8db761409dadc2e899d4e7107eff3aa07b07aa11 |
|
13-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: Add a width field to regions, and use it for making miptrees in TFP.
Otherwise, we would use the pitch as width of the texture, and compiz would
render the pitch padding on the right hand side.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 3628185f566e178a12b493fb89abf52b4b281f99 |
|
06-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: track bufmgr move to libdrm_intel and bufmgr_fake irq emit/wait change.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| f56b569e9af356c11869ee49a4669bb01b75397e |
|
13-Aug-2008 |
Kristian Høgsberg <krh@redhat.com> |
DRI2: Drop sarea, implement swap buffers in the X server.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| f75843a517bd188639e6866db2a7b04de3524e16 |
|
24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Revert "Merge branch 'drm-gem'""
This reverts commit 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a |
|
24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Merge branch 'drm-gem'"
This reverts commit 53675e5c05c0598b7ea206d5c27dbcae786a2c03.
Conflicts:
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 2e841880cfc1006a2818d4a8bfefd21136dc39a9 |
|
11-Jul-2008 |
Eric Anholt <eric@anholt.net> |
drm-gem: Use new GEM ioctls for tiling state, and support new swizzle modes.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| c5c73c1b605611faf0f06df9b5d08d8984388238 |
|
21-Jan-2008 |
Kristian Høgsberg <krh@temari.boston.redhat.com> |
Hook up i915 driver to new DRI2 infrastructure.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| a9a483b43ec090408148d069bc184c0a21323654 |
|
01-Feb-2008 |
Zou Nan hai <nanhai.zou@intel.com> |
[intel] use _mesa_copy_rect for upload compressed texture,
this fix bad texture issue in some games(UT and quake).
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| c5456a6b24525e9307e58fc2a02a6f62ca507730 |
|
14-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Remove useless intel_region_idle.
The idling it was trying to ensure was covered by the
intel_miptree_image_map()->intel_region_map() that immediately followed it.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 7c71ef3a3d0cf2620525f468960cdc76a0fb0d33 |
|
12-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Move bufmgr back to context instead of screen, fixing glthreads.
Putting the bufmgr in the screen is not thread-safe since the emit_reloc
changes. It also led to a significant performance hit from pthread usage
for the attempted thread-safety (up to 12% of a cpu spent on refcounting
protection in single-threaded 965). The motivation had been to allow
multi-context bufmgr sharing in classic mode, but it wasn't worth the cost.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| f00a64999c197e6a96e65fd00f64224a6f22c9fa |
|
17-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Add 965 support to shared intel_blit.c
This requires that regions grow a marker of whether they are tiled or not,
because fence (surface) registers are ignored by the 965 2D engine.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 9b461d4d029497dd6f71e60220849e1b66bb8cf5 |
|
17-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[i915] Pass static region names in so debugging says more than "static region".
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|
| 77a5bcaff43df8d54e0e0ef833726e4b41d7eb36 |
|
07-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Move over files that will be shared with 965-fbo work.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.h
|