History log of /external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
Revision Date Author Comments (<<< Hide modified files) (Show modified files >>>)
cd81d94322a39503e4a3e87b6ee03d4fcb3465fb 21-Jul-2014 Stephen Hines <srhines@google.com> Update LLVM for rebase to r212749.

Includes a cherry-pick of:
r212948 - fixes a small issue with atomic calls

Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
36b56886974eae4f9c5ebc96befd3e7bfe5de338 24-Apr-2014 Stephen Hines <srhines@google.com> Update to LLVM 3.5a.

Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
d975a82e08ab15242724bc46e53d58b4ff3e4815 06-Nov-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Handle vectors in getSetCCResultType

I don't have a standalone testcase for this, but it should allow r193676
to be reapplied.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194148 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
d1a4f579bf45aec933c79292b6b9663581438738 16-Oct-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Improve handling of SETCC

We previously used the default expansion to SELECT_CC, which in turn would
expand to "LHI; BRC; LHI". In most cases it's better to use an IPM-based
sequence instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192784 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
8dac19c0708c9bd0da0b832014918e00ded44d86 27-Sep-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Improve handling of PC-relative addresses

The backend previously folded offsets into PC-relative addresses
whereever possible. That's the right thing to do when the address
can be used directly in a PC-relative memory reference (using things
like LRL). But if we have a register-based memory reference and need
to load the PC-relative address separately, it's better to use an anchor
point that could be shared with other accesses to the same area of the
variable.

Fixes a FIXME.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191524 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
299fdd814f4c2850d44387d24c440980c5377d3e 10-Sep-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Add TM and TMY

The main complication here is that TM and TMY (the memory forms) set
CC differently from the register forms. When the tested bits contain
some 0s and some 1s, the register forms set CC to 1 or 2 based on the
value the uppermost bit. The memory forms instead set CC to 1
regardless of the uppermost bit.

Until now, I've tried to make it so that a branch never tests for an
impossible CC value. E.g. NR only sets CC to 0 or 1, so branches on the
result will only test for 0 or 1. Originally I'd tried to do the same
thing for TM and TMY by using custom matching code in ISelDAGToDAG.
That ended up being very ugly though, and would have meant duplicating
some of the chain checks that the common isel code does.

I've therefore gone for the simpler alternative of adding an extra
operand to the TM DAG opcode to say whether a memory form would be OK.
This means that the inverse of a "TM;JE" is "TM;JNE" rather than the
more precise "TM;JNLE", just like the inverse of "TMLL;JE" is "TMLL;JNE".
I suppose that's arguably less confusing though...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190400 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
aff1c6427ce22125adfa29de4145030aa3214a2e 06-Sep-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Tweak integer comparison code

The architecture has many comparison instructions, including some that
extend one of the operands. The signed comparison instructions use sign
extensions and the unsigned comparison instructions use zero extensions.
In cases where we had a free choice between signed or unsigned comparisons,
we were trying to decide at lowering time which would best fit the available
instructions, taking things like extension type into account. The code
to do that was getting increasingly hairy and was also making some bad
decisions. E.g. when comparing the result of two LLCs, it is better to use
CR rather than CLR, since CR can be fused with a branch while CLR can't.

This patch removes the lowering code and instead adds an operand to
integer comparisons to say whether signed comparison is required,
whether unsigned comparison is required, or whether either is OK.
We can then leave the choice of instruction up to the normal isel code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190138 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
16277c4698f36a756c540fae326874774156aaed 05-Sep-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Add NC, OC and XC

For now these are just used to handle scalar ANDs, ORs and XORs in which
all operands are memory.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190041 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
477168192c98e1f75a5bc6db3d34a177f327bd34 28-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Add support for TMHH, TMHL, TMLH and TMLL

For now just handles simple comparisons of an ANDed value with zero.
The CC value provides enough information to do any comparison for a
2-bit mask, and some nonzero comparisons with more populated masks,
but that's all future work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189469 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
842a1be06c53757e7498c9894abc1431b633a92f 27-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Extend memcpy and memset support to all constant lengths

Lengths up to a certain threshold (currently 6 * 256) use a series of MVCs.
Lengths above that threshold use a loop to handle X*256 bytes followed
by a single MVC to handle the excess (if any). This loop will also be
needed in future when support for variable lengths is added.

Because the same tablegen classes are used to define MVC and CLC,
the patch also has the side-effect of defining a pseudo loop instruction
for CLC. That instruction isn't used yet (and wouldn't be handled correctly
if it were). I'm planning to use it soon though.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189331 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
a550b51bac50493db75a7b5788a3f2c3b62fd913 23-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Add basic prefetch support

Just the instructions and intrinsics for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189100 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
df40f8e8ad0aa93defa44b8a136e8d871cfd44ea 21-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Define remainig *MUL_LOHI patterns

The initial port used MLG(R) for i64 UMUL_LOHI but left the other three
combinations as not-legal-or-custom. Although 32x32->{32,32}
multiplications exist, they're not as quick as doing a normal 64-bit
multiplication, so it didn't seem like i32 SMUL_LOHI and UMUL_LOHI
would be useful. There's also no direct instruction for i64 SMUL_LOHI,
so it needs to be implemented in terms of UMUL_LOHI.

However, not defining these patterns means that we don't convert
division by a constant into multiplication, so this patch fills
in the other cases. The new i64 SMUL_LOHI sequence is simpler
than the one that we used previously for 64x64->128 multiplication,
so int-mul-08.ll now tests the full sequence.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188898 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
80f54784da0bd42fb79176bbf447a31d69287fe3 19-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Add support for sibling calls

This first cut is pretty conservative. The final argument register (R6)
is call-saved, so we would need to make sure that the R6 argument to a
sibling call is the same as the R6 argument to the calling function,
which seems worth keeping as a separate patch.

Saying that integer truncations are free means that we no longer
use the extending instructions LGF and LLGF for spills in int-conv-09.ll
and int-conv-10.ll. Instead we treat the registers as 64 bits wide and
truncate them to 32-bits where necessary. I think it's unlikely we'd
use LGF and LLGF for spills in other situations for the same reason,
so I'm removing the tests rather than replacing them. The associated
code is generic and applies to many more instructions than just
LGF and LLGF, so there is no corresponding code removal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188669 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
19262ee0725a09b7c621a3d2eb66ba1513ae932a 16-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Use SRST to implement strlen and strnlen

It would also make sense to use it for memchr; I'm working on that now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188547 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
4fc7355a21e1fa838406e15459aaf54a58fcf909 16-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Use MVST to implement strcpy and stpcpy


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188546 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
e1b2af731e2a45344a7c502232f66c55cd746da0 16-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Use CLST to implement strcmp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188544 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
ac168b8bc8773a083a10902f64e4ae57a925aee4 12-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Use CLC and IPM to implement memcmp

For now this is restricted to fixed-length comparisons with a length
in the range [1, 256], as for memcpy() and MVC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188163 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
e03a56d62fc623e2f72d623b816f91b293d5904b 12-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Add a definition of the CLC instruction


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188162 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
04ded924f3583438c6633823eddb87761fa73cce 31-Jul-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Implement isLegalAddressingMode()

The loop optimizers were assuming that scales > 1 were OK. I think this
is actually a bug in TargetLoweringBase::isLegalAddressingMode(),
since it seems to be trying to reject anything that isn't r+i or r+r,
but it has no default case for scales other than 0, 1 or 2. Implementing
the hook for z means that z can no longer test any change there though.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187497 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
b284e1bf08d24deb20b7deab71fce6f3034cc89a 25-Jul-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Add STOC and STOCG

These instructions are allowed to trap even if the condition is false,
so for now they are only used for "*ptr = (cond ? x : *ptr)"-style
constructs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187111 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
e54885af9b54bfc7436a928a48d3db1ef88a2a70 09-Jul-2013 Stephen Lin <stephenwlin@gmail.com> AArch64/PowerPC/SystemZ/X86: This patch fixes the interface, usage, and all
in-tree implementations of TargetLoweringBase::isFMAFasterThanMulAndAdd in
order to resolve the following issues with fmuladd (i.e. optional FMA)
intrinsics:

1. On X86(-64) targets, ISD::FMA nodes are formed when lowering fmuladd
intrinsics even if the subtarget does not support FMA instructions, leading
to laughably bad code generation in some situations.

2. On AArch64 targets, ISD::FMA nodes are formed for operations on fp128,
resulting in a call to a software fp128 FMA implementation.

3. On PowerPC targets, FMAs are not generated from fmuladd intrinsics on types
like v2f32, v8f32, v4f64, etc., even though they promote, split, scalarize,
etc. to types that support hardware FMAs.

The function has also been slightly renamed for consistency and to force a
merge/build conflict for any out-of-tree target implementing it. To resolve,
see comments and fixed in-tree examples.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185956 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
dff0009d0ced62b92cb5900bc2203ec40142ba15 08-Jul-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Use MVC for memcpy

Use MVC for memcpy in cases where a single MVC is enough. Using MVC is
a win for longer copies too, but I'll leave that for later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185802 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
35b7bebe1162326c38217ff80d4a49fbbffcc365 02-Jul-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Use DSGFR over DSGR in more cases

Fixes some cases where we were using full 64-bit division for (sdiv i32, i32)
and (sdiv i64, i32).

The "32" in "SDIVREM32" just refers to the second operand. The first operand
of all *DIVREM*s is a GR128.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185435 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
722e9e6d0a5b67d136be40bc015abc5b0b32f97b 27-Jun-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Add conditional store patterns

Add pseudo conditional store instructions, so that we use:

branch foo:
store
foo:

instead of:

load
branch foo:
move
foo:
store

z196 has real 32-bit and 64-bit conditional stores, but we don't use
any z196 instructions yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185065 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
5b3fca50a08865f0db55fc92ad1c037a04e12177 22-Jun-2013 Chad Rosier <mcrosier@apple.com> The getRegForInlineAsmConstraint function should only accept MVT value types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184642 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
14a926f13b768ee3771bb944bbbb29529a40dbe1 30-May-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Enable unaligned accesses

The code to distinguish between unaligned and aligned addresses was
already there, so this is mostly just a switch-on-and-test process.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182920 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
d50bcb2162a529534da42748ab4a418bfc9aaf06 28-May-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Register compare-and-branch support

This patch adds support for the CRJ and CGRJ instructions. Support for
the immediate forms will be a separate patch.

The architecture has a large number of comparison instructions. I think
it's generally better to concentrate on using the "best" comparison
instruction first and foremost, then only use something like CRJ if
CR really was the natual choice of comparison instruction. The patch
therefore opportunistically converts separate CR and BRC instructions
into a single CRJ while emitting instructions in ISelLowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182764 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
ac6d9bec671252dd1e596fa71180ff6b39d06b5d 25-May-2013 Andrew Trick <atrick@apple.com> Track IR ordering of SelectionDAG nodes 2/4.

Change SelectionDAG::getXXXNode() interfaces as well as call sites of
these functions to pass in SDLoc instead of DebugLoc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182703 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
225ed7069caae9ece32d8bd3d15c6e41e21cc04b 18-May-2013 Matt Arsenault <Matthew.Arsenault@amd.com> Add LLVMContext argument to getSetCCResultType

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182180 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
1d09d56fe1e3f3faadd4bf4ccf3e585ddb3c3b07 06-May-2013 Ulrich Weigand <ulrich.weigand@de.ibm.com> [SystemZ] Add back end

This adds the actual lib/Target/SystemZ target files necessary to
implement the SystemZ target. Note that at this point, the target
cannot yet be built since the configure bits are missing. Those
will be provided shortly by a follow-on patch.

This version of the patch incorporates feedback from reviews by
Chris Lattner and Anton Korobeynikov. Thanks to all reviewers!

Patch by Richard Sandiford.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181203 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
29074ccf6cb00a3cbe32a3b7809d970ecaf8c9bf 25-Oct-2011 Dan Gohman <gohman@apple.com> Remove the SystemZ backend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
fc5d305597ea6336d75bd7f3b741e8d57d6a5105 06-May-2011 Eli Friedman <eli.friedman@gmail.com> Make the logic for determining function alignment more explicit. No functionality change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131012 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
95771afbfd604ad003fa3723cac66c9370fed55d 25-Feb-2011 Owen Anderson <resistor@mac.com> Allow targets to specify a the type of the RHS of a shift parameterized on the type of the LHS.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126518 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
c9403659a98bf6487ab6fbf40b81628b5695c02e 07-Jul-2010 Dan Gohman <gohman@apple.com> Split the SDValue out of OutputArg so that SelectionDAG-independent
code can do calling-convention queries. This obviates OutputArgReg.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107786 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
af1d8ca44a18f304f207e209b3bdb94b590f86ff 01-May-2010 Dan Gohman <gohman@apple.com> Get rid of the EdgeMapping map. Instead, just check for BasicBlock
changes before doing phi lowering for switches.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102809 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
d858e90f039f5fcdc2fa93035e911a5a9505cc50 17-Apr-2010 Dan Gohman <gohman@apple.com> Use const qualifiers with TargetLowering. This eliminates several
const_casts, and it reinforces the design of the Target classes being
immutable.

SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.

And PIC16's AsmPrinter no longer uses TargetLowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101635 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
022d9e1cef7586a80a96446ae8691a37def9bbf4 03-Feb-2010 Evan Cheng <evan.cheng@apple.com> Revert 95130.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95160 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
942619695f4bd77934c09a1cae0fb39ae59edac3 02-Feb-2010 Evan Cheng <evan.cheng@apple.com> Pass callsite return type to TargetLowering::LowerCall and use that to check sibcall eligibility.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95130 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
0c439eb2c8397996cbccaf2798e598052d9982c8 27-Jan-2010 Evan Cheng <evan.cheng@apple.com> Eliminate target hook IsEligibleForTailCallOptimization.

Target independent isel should always pass along the "tail call" property. Change
target hook LowerCall's parameter "isTailCall" into a refernce. If the target
decides it's impossible to honor the tail call request, it should set isTailCall
to false to make target independent isel happy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94626 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
a1eaa3c52b75d4fe2bcd4f7c52e56c405ee91d3c 28-Oct-2009 Evan Cheng <evan.cheng@apple.com> Add a second ValueType argument to isFPImmLegal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85361 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
eb2f969a4ddfb0bc8fdcb5bce3b52e53abff321d 27-Oct-2009 Evan Cheng <evan.cheng@apple.com> Do away with addLegalFPImmediate. Add a target hook isFPImmLegal which returns true if the fp immediate can be natively codegened by target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85281 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
fb2e752e4175920d0531f2afc93a23d0cdf4db14 18-Sep-2009 Evan Cheng <evan.cheng@apple.com> Enhance EmitInstrWithCustomInserter() so target can specify CFG changes that sdisel will use to properly complete phi nodes.
Not functionality change yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82273 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
65c3c8f323198b99b88b109654194540cf9b3fa5 02-Sep-2009 Sandeep Patel <deeppatel1987@gmail.com> Retype from unsigned to CallingConv::ID accordingly. Approved by Bob Wilson.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80773 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
3c2734c82bbd9fd6524a541a85c4a228c6648b9d 21-Aug-2009 Anton Korobeynikov <asl@math.spbu.ru> Handle 'r' inline asm constraint

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79648 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
98ca4f2a325f72374a477f9deba7d09e8999c29b 05-Aug-2009 Dan Gohman <gohman@apple.com> Major calling convention code refactoring.

Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.

This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.

This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78142 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
7df8462038c4393771a0961c60a2686169e4fd9a 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Unbreak

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76064 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
ae53567de16cae164f98d2b06317e062d96c728a 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Add constpool lowering / printing

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76016 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
c16cdc5de7a319523d69f4e335ffbfe21ec9348b 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Add jump tables

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/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
bad769f11aadb0b4aef1c998d2cbbfdb47de12da 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Lower addresses of globals

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75960 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
7d1e39b7c62265637ea821136e83aa66afa2aad4 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> SELECT_CC lowering

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75948 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
4ec3e5ffd10b23c3614cd9a766c2a3ec1fe62ba4 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Conditional branches and comparisons

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/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
656ac6f0f6f728ddc178f92c25b2278d23ff4e61 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Provide proper stack offsets for outgoing arguments

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/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
ba249e41f3ffa9e947b9173e3965385ec6324ffb 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Some preliminary call lowering

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/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
87a24e3ee43559fc4d1c6a7f442d49d1e3ccf663 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Minimal lowering for formal_arguments / ret

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75911 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h
4403b930f867f61b48304a23a6843026b0b9a32a 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Let's start another backend :)

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/external/llvm/lib/Target/SystemZ/SystemZISelLowering.h