Searched defs:TBB (Results 1 - 25 of 28) sorted by relevance

12

/external/llvm/lib/Target/MSP430/
H A DMSP430InstrInfo.cpp173 MachineBasicBlock *&TBB,
203 TBB = I->getOperand(0).getMBB();
215 TBB = nullptr;
221 // TBB is used to indicate the unconditinal destination.
222 TBB = I->getOperand(0).getMBB();
235 FBB = TBB;
236 TBB = I->getOperand(0).getMBB();
244 assert(TBB);
248 if (TBB != I->getOperand(0).getMBB())
263 MSP430InstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, argument
172 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
[all...]
/external/llvm/lib/Target/NVPTX/
H A DNVPTXInstrInfo.cpp153 /// just return false, leaving TBB/FBB null.
154 /// 2. If this block ends with only an unconditional branch, it sets TBB to be
157 /// an successor block, it sets TBB to be the branch destination block and a
162 /// block, it returns the 'true' destination in TBB, the 'false' destination
171 MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB,
184 TBB = LastInst->getOperand(0).getMBB();
188 TBB = LastInst->getOperand(1).getMBB();
206 TBB = SecondLastInst->getOperand(1).getMBB();
216 TBB = SecondLastInst->getOperand(0).getMBB();
252 MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBloc
170 AnalyzeBranch( MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
251 InsertBranch( MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument
[all...]
/external/llvm/unittests/IR/
H A DIRBuilderTest.cpp82 BasicBlock *TBB = BasicBlock::Create(Ctx, "", F); local
85 BranchInst *BI = Builder.CreateCondBr(Builder.getTrue(), TBB, FBB);
89 EXPECT_EQ(TBB, TI->getSuccessor(0));
94 BI = Builder.CreateCondBr(Builder.getTrue(), TBB, FBB, Weights);
98 EXPECT_EQ(TBB, TI->getSuccessor(0));
/external/llvm/lib/Target/AArch64/
H A DAArch64BranchRelaxation.cpp406 MachineBasicBlock *TBB, *FBB; local
408 TII->AnalyzeBranch(*MBB, TBB, FBB, Cond, false);
H A DAArch64ConditionalCompares.cpp270 // corresponding to TBB.
498 MachineBasicBlock *TBB = nullptr, *FBB = nullptr; local
499 if (TII->AnalyzeBranch(*Head, TBB, FBB, HeadCond)) {
507 if (!TBB || HeadCond.empty()) {
520 if (TBB != CmpBB) {
521 assert(TBB == Tail && "Unexpected TBB");
526 TBB = FBB = nullptr;
527 if (TII->AnalyzeBranch(*CmpBB, TBB, FBB, CmpBBCond)) {
533 if (!TBB || CmpBBCon
[all...]
H A DAArch64InstrInfo.cpp93 MachineBasicBlock *&TBB,
117 TBB = LastInst->getOperand(0).getMBB();
122 parseCondBranch(LastInst, TBB, Cond);
141 TBB = LastInst->getOperand(0).getMBB();
156 parseCondBranch(SecondLastInst, TBB, Cond);
164 TBB = SecondLastInst->getOperand(0).getMBB();
256 MachineBasicBlock &MBB, DebugLoc DL, MachineBasicBlock *TBB,
260 BuildMI(&MBB, DL, get(AArch64::Bcc)).addImm(Cond[0].getImm()).addMBB(TBB);
267 MIB.addMBB(TBB);
272 MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBloc
92 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
255 instantiateCondBranch( MachineBasicBlock &MBB, DebugLoc DL, MachineBasicBlock *TBB, const SmallVectorImpl<MachineOperand> &Cond) const argument
271 InsertBranch( MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument
[all...]
H A DAArch64FastISel.cpp762 MachineBasicBlock *TBB = FuncInfo.MBBMap[BI->getSuccessor(0)]; local
779 .addMBB(TBB);
780 FuncInfo.MBB->addSuccessor(TBB);
812 if (FuncInfo.MBB->isLayoutSuccessor(TBB)) {
813 std::swap(TBB, FBB);
818 .addMBB(TBB);
819 FuncInfo.MBB->addSuccessor(TBB);
826 MachineBasicBlock *Target = (Imm == 0) ? FBB : TBB;
851 if (FuncInfo.MBB->isLayoutSuccessor(TBB)) {
852 std::swap(TBB, FB
[all...]
/external/llvm/lib/Target/Mips/
H A DMipsInstrInfo.cpp87 MachineBasicBlock *&TBB,
92 BranchType BT = AnalyzeBranch(MBB, TBB, FBB, Cond, AllowModify, BranchInstrs);
98 MachineBasicBlock *TBB, DebugLoc DL,
113 MIB.addMBB(TBB);
117 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, argument
122 assert(TBB && "InsertBranch must not be told to insert a fallthrough");
134 BuildCondBr(MBB, TBB, DL, Cond);
142 BuildMI(&MBB, DL, get(UncondBrOpc)).addMBB(TBB);
144 BuildCondBr(MBB, TBB, DL, Cond);
184 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, argument
86 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
97 BuildCondBr(MachineBasicBlock &MBB, MachineBasicBlock *TBB, DebugLoc DL, const SmallVectorImpl<MachineOperand>& Cond) const argument
[all...]
/external/llvm/lib/Target/Sparc/
H A DSparcInstrInfo.cpp129 MachineBasicBlock *&TBB,
156 TBB = I->getOperand(0).getMBB();
167 TBB = nullptr;
174 TBB = I->getOperand(0).getMBB();
218 FBB = TBB;
219 TBB = I->getOperand(0).getMBB();
231 SparcInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB, argument
235 assert(TBB && "InsertBranch must not be told to insert a fallthrough");
241 BuildMI(&MBB, DL, get(SP::BA)).addMBB(TBB);
249 BuildMI(&MBB, DL, get(SP::BCOND)).addMBB(TBB)
128 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
[all...]
/external/llvm/lib/Target/XCore/
H A DXCoreInstrInfo.cpp176 /// just return false, leaving TBB/FBB null.
177 /// 2. If this block ends with only an unconditional branch, it sets TBB to be
180 /// an successor block, it sets TBB to be the branch destination block and a
185 /// block, it returns the 'true' destination in TBB, the 'false' destination
194 XCoreInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, argument
217 TBB = LastInst->getOperand(0).getMBB();
228 TBB = LastInst->getOperand(1).getMBB();
250 TBB = SecondLastInst->getOperand(1).getMBB();
262 TBB = SecondLastInst->getOperand(0).getMBB();
282 XCoreInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB, argument
[all...]
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
H A DR600InstrInfo.cpp178 MachineBasicBlock *&TBB,
208 TBB = LastInst->getOperand(0).getMBB();
215 TBB = LastInst->getOperand(0).getMBB();
238 TBB = SecondLastInst->getOperand(0).getMBB();
262 MachineBasicBlock *TBB,
267 assert(TBB && "InsertBranch must not be told to insert a fallthrough");
271 BuildMI(&MBB, DL, get(AMDGPU::JUMP)).addMBB(TBB).addReg(0);
280 .addMBB(TBB)
290 .addMBB(TBB)
177 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
261 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument
/external/mesa3d/src/gallium/drivers/radeon/
H A DR600InstrInfo.cpp178 MachineBasicBlock *&TBB,
208 TBB = LastInst->getOperand(0).getMBB();
215 TBB = LastInst->getOperand(0).getMBB();
238 TBB = SecondLastInst->getOperand(0).getMBB();
262 MachineBasicBlock *TBB,
267 assert(TBB && "InsertBranch must not be told to insert a fallthrough");
271 BuildMI(&MBB, DL, get(AMDGPU::JUMP)).addMBB(TBB).addReg(0);
280 .addMBB(TBB)
290 .addMBB(TBB)
177 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
261 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument
/external/llvm/lib/CodeGen/
H A DEarlyIfConversion.cpp72 // | [TF]BB FBB TBB
77 // Instructions in the conditional blocks TBB and/or FBB are spliced into the
94 MachineBasicBlock *TBB; member in class:__anon25739::SSAIfConv
99 /// isTriangle - When there is no 'else' block, either TBB or FBB will be
101 bool isTriangle() const { return TBB == Tail || FBB == Tail; }
104 MachineBasicBlock *getTPred() const { return TBB == Tail ? Head : TBB; }
136 /// Insertion point in Head for speculatively executed instructions form TBB
342 TBB = FBB = Tail = nullptr;
389 if (TII->AnalyzeBranch(*Head, TBB, FB
[all...]
H A DMachineBlockPlacement.cpp887 MachineBasicBlock *TBB = nullptr, *FBB = nullptr; // For AnalyzeBranch. local
888 if (!TII->AnalyzeBranch(*BB, TBB, FBB, Cond) || !FI->canFallThrough())
991 MachineBasicBlock *TBB = nullptr, *FBB = nullptr; // For AnalyzeBranch. local
992 if (!TII->AnalyzeBranch(*PrevBB, TBB, FBB, Cond)) {
1008 TBB = FBB = nullptr;
1009 if (TII->AnalyzeBranch(*PrevBB, TBB, FBB, Cond)) {
1011 TBB = FBB = nullptr;
1017 if (TBB && !Cond.empty() && FBB &&
1018 MBPI->getEdgeWeight(PrevBB, FBB) > MBPI->getEdgeWeight(PrevBB, TBB) &&
1023 << " vs " << MBPI->getEdgeWeight(PrevBB, TBB) << "\
1036 MachineBasicBlock *TBB = nullptr, *FBB = nullptr; // For AnalyzeBranch. local
[all...]
H A DBranchFolding.cpp205 MachineBasicBlock *MBB = I, *TBB = nullptr, *FBB = nullptr; local
207 if (!TII->AnalyzeBranch(*MBB, TBB, FBB, Cond, true))
208 MadeChange |= MBB->CorrectExtraCFGEdges(TBB, FBB, !Cond.empty());
470 MachineBasicBlock *TBB = nullptr, *FBB = nullptr; local
474 !TII->AnalyzeBranch(*CurMBB, TBB, FBB, Cond, true)) {
476 if (TBB == NextBB && !Cond.empty() && !FBB) {
900 MachineBasicBlock *TBB = nullptr, *FBB = nullptr; local
902 if (!TII->AnalyzeBranch(*PBB, TBB, FBB, Cond, true)) {
906 if (!Cond.empty() && TBB == IBB) {
922 if (!TBB) {
1593 MachineBasicBlock *TBB = nullptr, *FBB = nullptr; local
[all...]
H A DMachineBasicBlock.cpp397 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
400 bool B = TII->AnalyzeBranch(*this, TBB, FBB, Cond);
404 if (TBB) {
407 if (isLayoutSuccessor(TBB))
416 assert(!TBB && "Found more than one non-landing-pad successor!");
417 TBB = *SI;
422 if (!TBB)
427 if (!isLayoutSuccessor(TBB))
428 TII->InsertBranch(*this, TBB, nullptr, Cond, dl);
435 if (isLayoutSuccessor(TBB)) {
694 MachineBasicBlock *TBB = nullptr, *FBB = nullptr; local
[all...]
H A DMachineLICM.cpp808 MachineBasicBlock *TBB = nullptr, *FBB = nullptr; local
810 if (!TII->AnalyzeBranch(*BB, TBB, FBB, Cond, false) && Cond.empty())
H A DIfConversion.cpp88 /// TargetInstrInfo::AnalyzeBranch() (i.e. TBB, FBB, and Cond), and its
223 bool MeetIfcvtSizeLimit(MachineBasicBlock &TBB, argument
229 TII->isProfitableToIfCvt(TBB, TCycle, TExtra, FBB, FCycle, FExtra,
823 // TBB FBB
840 // | TBB
863 // | TBB---> exit
965 MachineBasicBlock *TBB = nullptr, *FBB = nullptr; local
967 if (!TII->AnalyzeBranch(*BBI.BB, TBB, FBB, Cond))
968 BBI.BB->CorrectExtraCFGEdges(TBB, FBB, !Cond.empty());
H A DMachineVerifier.cpp555 MachineBasicBlock *TBB = nullptr, *FBB = nullptr; local
558 TBB, FBB, Cond)) {
561 if (!TBB && !FBB) {
589 } else if (TBB && !FBB && Cond.empty()) {
594 } else if (!MBB->isSuccessor(TBB)) {
608 } else if (TBB && !FBB && !Cond.empty()) {
616 if (&*MBBI != TBB)
619 else if (TBB != *MBB->succ_begin())
625 } else if (!matchPair(MBB->succ_begin(), TBB, MBBI)) {
639 } else if (TBB
[all...]
/external/llvm/include/llvm/Target/
H A DTargetInstrInfo.h279 /// just return false, leaving TBB/FBB null.
280 /// 2. If this block ends with only an unconditional branch, it sets TBB to be
283 /// successor block, it sets TBB to be the branch destination block and a
287 /// unconditional branch, it returns the 'true' destination in TBB, the
298 virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, argument
322 virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, argument
/external/llvm/lib/Target/SystemZ/
H A DSystemZInstrInfo.cpp242 MachineBasicBlock *&TBB,
278 TBB = Branch.Target->getMBB();
291 TBB = nullptr;
297 // TBB is used to indicate the unconditinal destination.
298 TBB = Branch.Target->getMBB();
305 FBB = TBB;
306 TBB = Branch.Target->getMBB();
313 assert(Cond.size() == 2 && TBB && "Should have seen a conditional branch");
317 if (TBB != Branch.Target->getMBB())
363 SystemZInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, argument
241 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
[all...]
/external/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.cpp122 HexagonInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB, argument
130 assert(TBB && "InsertBranch must not be told to insert a fallthrough");
157 return InsertBranch(MBB, TBB, nullptr, Cond, DL);
160 BuildMI(&MBB, DL, get(BOpc)).addMBB(TBB);
163 get(BccOpc)).addReg(Cond[regPos].getReg()).addMBB(TBB);
168 BuildMI(&MBB, DL, get(BccOpc)).addReg(Cond[regPos].getReg()).addMBB(TBB);
176 MachineBasicBlock *&TBB,
180 TBB = nullptr;
253 TBB = LastInst->getOperand(0).getMBB();
257 TBB
175 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
[all...]
/external/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp685 MachineBasicBlock *TBB = FuncInfo.MBBMap[BI->getSuccessor(0)]; local
697 if (FuncInfo.MBB->isLayoutSuccessor(TBB)) {
698 std::swap(TBB, FBB);
709 .addImm(PPCPred).addReg(CondReg).addMBB(TBB);
711 FuncInfo.MBB->addSuccessor(TBB);
717 MachineBasicBlock *Target = (Imm == 0) ? FBB : TBB;
H A DPPCInstrInfo.cpp337 bool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, argument
364 TBB = LastInst->getOperand(0).getMBB();
370 TBB = LastInst->getOperand(2).getMBB();
378 TBB = LastInst->getOperand(1).getMBB();
386 TBB = LastInst->getOperand(1).getMBB();
396 TBB = LastInst->getOperand(0).getMBB();
407 TBB = LastInst->getOperand(0).getMBB();
432 TBB = SecondLastInst->getOperand(2).getMBB();
442 TBB = SecondLastInst->getOperand(1).getMBB();
452 TBB
538 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument
[all...]
/external/llvm/lib/Target/ARM/
H A DARMFastISel.cpp1249 MachineBasicBlock *TBB = FuncInfo.MBBMap[BI->getSuccessor(0)]; local
1262 if (FuncInfo.MBB->isLayoutSuccessor(TBB)) {
1263 std::swap(TBB, FBB);
1278 .addMBB(TBB).addImm(ARMPred).addReg(ARM::CPSR);
1280 FuncInfo.MBB->addSuccessor(TBB);
1295 if (FuncInfo.MBB->isLayoutSuccessor(TBB)) {
1296 std::swap(TBB, FBB);
1302 .addMBB(TBB).addImm(CCMode).addReg(ARM::CPSR);
1305 FuncInfo.MBB->addSuccessor(TBB);
1311 MachineBasicBlock *Target = (Imm == 0) ? FBB : TBB;
[all...]

Completed in 1935 milliseconds

12