/external/llvm/lib/Target/Mips/ |
H A D | MipsSEFrameLowering.h | 28 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override; 31 MachineBasicBlock &MBB, 34 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
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H A D | Mips16FrameLowering.cpp | 36 MachineBasicBlock &MBB = MF.front(); local 40 MachineBasicBlock::iterator MBBI = MBB.begin(); 41 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); 52 TII.makeFrame(Mips::SP, StackSize, MBB, MBBI); 57 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) 72 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) 77 BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0) 83 MachineBasicBlock &MBB) const { 84 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); 95 BuildMI(MBB, MBB 104 spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) const argument 132 restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) const argument 148 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const argument [all...] |
H A D | MipsDelaySlotFiller.cpp | 81 /// Set bits in Uses corresponding to MBB's live-out registers except for 83 void addLiveOut(const MachineBasicBlock &MBB, 197 bool runOnMachineBasicBlock(MachineBasicBlock &MBB); 208 bool searchRange(MachineBasicBlock &MBB, IterTy Begin, IterTy End, 214 bool searchBackward(MachineBasicBlock &MBB, Iter Slot) const; 216 /// This function searches MBB in the forward direction for an instruction 218 bool searchForward(MachineBasicBlock &MBB, Iter Slot) const; 220 /// This function searches one of MBB's successor blocks for an instruction 223 bool searchSuccBBs(MachineBasicBlock &MBB, Iter Slot) const; 225 /// Pick a successor block of MBB 268 addLiveInRegs(Iter Filler, MachineBasicBlock &MBB) argument 338 addLiveOut(const MachineBasicBlock &MBB, const MachineBasicBlock &SuccBB) argument 494 runOnMachineBasicBlock(MachineBasicBlock &MBB) argument 534 searchRange(MachineBasicBlock &MBB, IterTy Begin, IterTy End, RegDefsUses &RegDU, InspectMemInstr& IM, IterTy &Filler) const argument 570 searchBackward(MachineBasicBlock &MBB, Iter Slot) const argument 589 searchForward(MachineBasicBlock &MBB, Iter Slot) const argument 609 searchSuccBBs(MachineBasicBlock &MBB, Iter Slot) const argument 668 getBranch(MachineBasicBlock &MBB, const MachineBasicBlock &Dst) const argument [all...] |
H A D | MipsSEInstrInfo.cpp | 82 void MipsSEInstrInfo::copyPhysReg(MachineBasicBlock &MBB, argument 110 BuildMI(MBB, I, DL, get(Mips::RDDSP), DestReg).addImm(1 << 4) 131 BuildMI(MBB, I, DL, get(Mips::WRDSP)) 170 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(Opc)); 183 storeRegToStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, argument 188 if (I != MBB.end()) DL = I->getDebugLoc(); 189 MachineMemOperand *MMO = GetMemOperand(MBB, FI, MachineMemOperand::MOStore); 221 BuildMI(MBB, I, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill)) 226 loadRegFromStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, argument 230 if (I != MBB 267 MachineBasicBlock &MBB = *MI->getParent(); local 360 adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const argument 379 loadImmediate(int64_t Imm, MachineBasicBlock &MBB, MachineBasicBlock::iterator II, DebugLoc DL, unsigned *NewImm) const argument 430 expandRetRA(MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const argument 453 expandPseudoMFHiLo(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned NewOpc) const argument 459 expandPseudoMTLoHi(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned LoOpc, unsigned HiOpc, bool HasExplicitDef) const argument 488 expandCvtFPInt(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned CvtOpc, unsigned MovOpc, bool IsI64) const argument 512 expandExtractElementF64(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, bool FP64) const argument 592 expandEhReturn(MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const argument [all...] |
H A D | MipsSEFrameLowering.cpp | 58 bool expandInstr(MachineBasicBlock &MBB, Iter I); 59 void expandLoadCCond(MachineBasicBlock &MBB, Iter I); 60 void expandStoreCCond(MachineBasicBlock &MBB, Iter I); 61 void expandLoadACC(MachineBasicBlock &MBB, Iter I, unsigned RegSize); 62 void expandStoreACC(MachineBasicBlock &MBB, Iter I, unsigned MFHiOpc, 64 bool expandCopy(MachineBasicBlock &MBB, Iter I); 65 bool expandCopyACC(MachineBasicBlock &MBB, Iter I, unsigned MFHiOpc, 87 bool ExpandPseudo::expandInstr(MachineBasicBlock &MBB, Iter I) { argument 90 expandLoadCCond(MBB, I); 93 expandStoreCCond(MBB, 123 expandLoadCCond(MachineBasicBlock &MBB, Iter I) argument 143 expandStoreCCond(MachineBasicBlock &MBB, Iter I) argument 163 expandLoadACC(MachineBasicBlock &MBB, Iter I, unsigned RegSize) argument 192 expandStoreACC(MachineBasicBlock &MBB, Iter I, unsigned MFHiOpc, unsigned MFLoOpc, unsigned RegSize) argument 220 expandCopy(MachineBasicBlock &MBB, Iter I) argument 230 expandCopyACC(MachineBasicBlock &MBB, Iter I, unsigned MFHiOpc, unsigned MFLoOpc) argument 276 MachineBasicBlock &MBB = MF.front(); local 449 spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) const argument 493 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const argument [all...] |
H A D | Mips16RegisterInfo.cpp | 62 (MachineBasicBlock &MBB, 68 const TargetInstrInfo &TII = *MBB.getParent()->getTarget().getInstrInfo(); 69 TII.copyPhysReg(MBB, I, DL, Mips::T0, Reg, true); 70 TII.copyPhysReg(MBB, UseMI, DL, Reg, Mips::T0, true); 139 MachineBasicBlock &MBB = *MI.getParent(); local 144 MBB.getParent()->getTarget().getInstrInfo()); 145 FrameReg = TII.loadImmediate(FrameReg, Offset, MBB, II, DL, NewImm); 61 saveScavengerRegister(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, MachineBasicBlock::iterator &UseMI, const TargetRegisterClass *RC, unsigned Reg) const argument
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H A D | MipsCodeEmitter.cpp | 85 MachineBasicBlock &MBB); 131 MachineBasicBlock &MBB, unsigned Opc) const; 135 MachineBasicBlock &MBB) const; 160 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end(); 161 MBB != E; ++MBB){ 162 MCE.StartMachineBasicBlock(MBB); 163 for (MachineBasicBlock::instr_iterator I = MBB->instr_begin(), 164 E = MBB->instr_end(); I != E;) 165 emitInstruction(*I++, *MBB); 342 emitInstruction(MachineBasicBlock::instr_iterator MI, MachineBasicBlock &MBB) argument 368 expandACCInstr(MachineBasicBlock::instr_iterator MI, MachineBasicBlock &MBB, unsigned Opc) const argument [all...] |
/external/llvm/lib/Target/Sparc/ |
H A D | SparcFrameLowering.h | 30 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override; 34 MachineBasicBlock &MBB, 52 MachineBasicBlock &MBB,
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H A D | SparcInstrInfo.cpp | 128 bool SparcInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, argument 135 MachineBasicBlock::iterator I = MBB.end(); 136 MachineBasicBlock::iterator UnCondBrIter = MBB.end(); 137 while (I != MBB.begin()) { 160 while (std::next(I) != MBB.end()) 166 if (MBB.isLayoutSuccessor(I->getOperand(0).getMBB())) { 169 I = MBB.end(); 170 UnCondBrIter = MBB.end(); 186 if (AllowModify && UnCondBrIter != MBB.end() && 187 MBB 231 InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument 281 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument 351 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 389 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument [all...] |
/external/llvm/lib/CodeGen/ |
H A D | MachineTraceMetrics.cpp | 84 /// Compute the resource usage in basic block MBB. 86 MachineTraceMetrics::getResources(const MachineBasicBlock *MBB) { argument 87 assert(MBB && "No basic block"); 88 FixedBlockInfo *FBI = &BlockInfo[MBB->getNumber()]; 100 for (const auto &MI : *MBB) { 124 unsigned PROffset = MBB->getNumber() * PRKinds; 159 MachineTraceMetrics::Ensemble::getLoopFor(const MachineBasicBlock *MBB) const { 160 return MTM.Loops->getLoopFor(MBB); 163 // Update resource-related information in the TraceBlockInfo for MBB. 164 // Only update resources related to the trace above MBB 166 computeDepthResources(const MachineBasicBlock *MBB) argument 199 computeHeightResources(const MachineBasicBlock *MBB) argument 317 pickTracePred(const MachineBasicBlock *MBB) argument 345 pickTraceSucc(const MachineBasicBlock *MBB) argument [all...] |
H A D | BranchFolding.h | 43 void setBlock(MachineBasicBlock *MBB) { argument 44 Block = MBB; 79 void setBlock(MachineBasicBlock *MBB) { argument 80 getMergePotentialsElt().setBlock(MBB); 116 bool OptimizeBlock(MachineBasicBlock *MBB); 117 void RemoveDeadBlock(MachineBasicBlock *MBB); 118 bool OptimizeImpDefsBlock(MachineBasicBlock *MBB); 121 bool HoistCommonCodeInSuccs(MachineBasicBlock *MBB);
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H A D | PHIElimination.cpp | 68 bool EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB); 69 void LowerPHINode(MachineBasicBlock &MBB, 81 bool SplitPHIEdges(MachineFunction &MF, MachineBasicBlock &MBB, 86 bool isLiveIn(unsigned Reg, MachineBasicBlock *MBB); 87 bool isLiveOutPastPHIs(unsigned Reg, MachineBasicBlock *MBB); 183 MachineBasicBlock &MBB) { 184 if (MBB.empty() || !MBB.front().isPHI()) 190 std::prev(MBB.SkipPHIsAndLabels(MBB 182 EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) argument 221 LowerPHINode(MachineBasicBlock &MBB, MachineBasicBlock::iterator LastPHIIt) argument 545 SplitPHIEdges(MachineFunction &MF, MachineBasicBlock &MBB, MachineLoopInfo *MLI) argument 621 isLiveIn(unsigned Reg, MachineBasicBlock *MBB) argument 630 isLiveOutPastPHIs(unsigned Reg, MachineBasicBlock *MBB) argument [all...] |
H A D | MachineSink.cpp | 81 bool ProcessBlock(MachineBasicBlock &MBB); 90 bool AllUsesDominatedByBlock(unsigned Reg, MachineBasicBlock *MBB, 93 MachineBasicBlock *FindSuccToSinkTo(MachineInstr *MI, MachineBasicBlock *MBB, 96 MachineBasicBlock *MBB, 100 MachineBasicBlock *MBB); 115 MachineBasicBlock *MBB) { 148 MachineBasicBlock *MBB, 159 // BreakPHIEdge is true if all the uses are in the successor MBB being sunken 179 if (!(UseBlock == MBB && UseInst->isPHI() && 203 if (!DT->dominates(MBB, UseBloc 114 PerformTrivialForwardCoalescing(MachineInstr *MI, MachineBasicBlock *MBB) argument 147 AllUsesDominatedByBlock(unsigned Reg, MachineBasicBlock *MBB, MachineBasicBlock *DefMBB, bool &BreakPHIEdge, bool &LocalUse) const argument 242 ProcessBlock(MachineBasicBlock &MBB) argument 440 isProfitableToSinkTo(unsigned Reg, MachineInstr *MI, MachineBasicBlock *MBB, MachineBasicBlock *SuccToSinkTo) argument 476 FindSuccToSinkTo(MachineInstr *MI, MachineBasicBlock *MBB, bool &BreakPHIEdge) argument [all...] |
H A D | DFAPacketizer.cpp | 147 void VLIWPacketizerList::endPacket(MachineBasicBlock *MBB, argument 151 finalizeBundle(*MBB, MIFirst, MI); 158 void VLIWPacketizerList::PacketizeMIs(MachineBasicBlock *MBB, argument 162 VLIWScheduler->startBlock(MBB); 163 VLIWScheduler->enterRegion(MBB, BeginItr, EndItr, 182 endPacket(MBB, MI); 187 if (this->ignorePseudoInstruction(MI, MBB)) 208 endPacket(MBB, MI); 215 endPacket(MBB, MI); 223 endPacket(MBB, EndIt [all...] |
H A D | LiveRangeCalc.cpp | 113 MachineBasicBlock *MBB = I->DomNode->getBlock(); local 116 std::tie(Start, End) = Indexes->getMBBRange(MBB); 124 assert(Seen.test(MBB->getNumber())); 125 LiveOut[MBB] = LiveOutPair(I->Value, (MachineDomTreeNode *)nullptr); 140 assert(KillMBB && "No MBB at Kill"); 142 // Is there a def in the same MBB we can extend? 182 MachineBasicBlock *MBB = MF->getBlockNumbered(WorkList[i]); local 185 if (MBB->pred_empty()) { 186 MBB->getParent()->verify(); 191 !MBB 266 MachineBasicBlock *MBB = MF->getBlockNumbered(*I); local 294 MachineBasicBlock *MBB = Node->getBlock(); local [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | ARMFrameLowering.h | 32 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override; 34 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, 39 bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, 59 void emitPushInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, 64 void emitPopInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, 72 MachineBasicBlock &MBB,
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H A D | Thumb2InstrInfo.h | 39 bool isLegalToSplitMBBAt(MachineBasicBlock &MBB, 42 void copyPhysReg(MachineBasicBlock &MBB, 47 void storeRegToStackSlot(MachineBasicBlock &MBB, 53 void loadRegFromStackSlot(MachineBasicBlock &MBB,
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
H A D | AMDGPUInstrInfo.cpp | 86 MachineBasicBlock &MBB) const { 87 while (iter != MBB.end()) { 100 MachineBasicBlock::iterator skipFlowControl(MachineBasicBlock *MBB) { argument 101 MachineBasicBlock::iterator tmp = MBB->end(); 102 if (!MBB->size()) { 103 return MBB->end(); 109 if (tmp == MBB->begin()) { 118 return MBB->end(); 122 AMDGPUInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, argument 132 AMDGPUInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, argument 204 insertNoop(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const argument [all...] |
H A D | R600InstrInfo.cpp | 49 R600InstrInfo::copyPhysReg(MachineBasicBlock &MBB, argument 58 BuildMI(MBB, MI, DL, get(AMDGPU::MOV)) 71 BuildMI(MBB, MI, DL, get(AMDGPU::MOV), DestReg) 163 findFirstPredicateSetterFrom(MachineBasicBlock &MBB, argument 166 while (I != MBB.begin()) { 177 R600InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, argument 186 MachineBasicBlock::iterator I = MBB.end(); 187 if (I == MBB.begin()) 191 if (I == MBB.begin()) 204 if (I == MBB 261 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument 367 isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCyles, unsigned ExtraPredCycles, const BranchProbability &Probability) const argument 387 isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCyles, const BranchProbability &Probability) const argument [all...] |
/external/mesa3d/src/gallium/drivers/radeon/ |
H A D | AMDGPUInstrInfo.cpp | 86 MachineBasicBlock &MBB) const { 87 while (iter != MBB.end()) { 100 MachineBasicBlock::iterator skipFlowControl(MachineBasicBlock *MBB) { argument 101 MachineBasicBlock::iterator tmp = MBB->end(); 102 if (!MBB->size()) { 103 return MBB->end(); 109 if (tmp == MBB->begin()) { 118 return MBB->end(); 122 AMDGPUInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, argument 132 AMDGPUInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, argument 204 insertNoop(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const argument [all...] |
H A D | R600InstrInfo.cpp | 49 R600InstrInfo::copyPhysReg(MachineBasicBlock &MBB, argument 58 BuildMI(MBB, MI, DL, get(AMDGPU::MOV)) 71 BuildMI(MBB, MI, DL, get(AMDGPU::MOV), DestReg) 163 findFirstPredicateSetterFrom(MachineBasicBlock &MBB, argument 166 while (I != MBB.begin()) { 177 R600InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, argument 186 MachineBasicBlock::iterator I = MBB.end(); 187 if (I == MBB.begin()) 191 if (I == MBB.begin()) 204 if (I == MBB 261 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument 367 isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCyles, unsigned ExtraPredCycles, const BranchProbability &Probability) const argument 387 isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCyles, const BranchProbability &Probability) const argument [all...] |
/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXInstrInfo.h | 42 * virtual void storeRegToStackSlot(MachineBasicBlock &MBB, 46 * virtual void loadRegFromStackSlot(MachineBasicBlock &MBB, 53 MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, 64 MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, 66 unsigned RemoveBranch(MachineBasicBlock &MBB) const override; 68 MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB,
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZFrameLowering.h | 32 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, 36 bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, 44 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override; 49 MachineBasicBlock &MBB,
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H A D | SystemZFrameLowering.cpp | 106 // block MBB. IsImplicit says whether this is an explicit operand to the 109 static void addSavedGPR(MachineBasicBlock &MBB, MachineInstrBuilder &MIB, argument 111 const TargetRegisterInfo *RI = MBB.getParent()->getTarget().getRegisterInfo(); 113 bool IsLive = MBB.isLiveIn(GPR64) || MBB.isLiveIn(GPR32); 117 MBB.addLiveIn(GPR64); 122 spillCalleeSavedRegisters(MachineBasicBlock &MBB, argument 129 MachineFunction &MF = *MBB.getParent(); 133 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); 174 MachineInstrBuilder MIB = BuildMI(MBB, MBB 211 restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) const argument 282 emitIncrement(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const DebugLoc &DL, unsigned Reg, int64_t NumBytes, const TargetInstrInfo *TII) argument 311 MachineBasicBlock &MBB = MF.front(); local 499 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const argument [all...] |
/external/llvm/lib/Target/XCore/ |
H A D | XCoreFrameLowering.cpp | 61 static void EmitDefCfaRegister(MachineBasicBlock &MBB, argument 67 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) 71 static void EmitDefCfaOffset(MachineBasicBlock &MBB, argument 77 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) 81 static void EmitCfiOffset(MachineBasicBlock &MBB, argument 87 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) 97 static void IfNeededExtSP(MachineBasicBlock &MBB, argument 107 BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(OpImm); 110 EmitDefCfaOffset(MBB, MBBI, dl, TII, MMI, Adjusted*4); 121 static void IfNeededLDAWSP(MachineBasicBlock &MBB, argument 176 getFrameIndexMMO(MachineBasicBlock &MBB, int FrameIndex, unsigned flags) argument 191 RestoreSpillList(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, DebugLoc dl, const TargetInstrInfo &TII, int &RemainingAdj, SmallVectorImpl<StackSlotInfo> &SpillList) argument 223 MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB local 408 spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) const argument 444 restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) const argument 479 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const argument [all...] |