Searched defs:regs (Results 126 - 150 of 166) sorted by relevance

1234567

/external/kernel-headers/original/uapi/asm-x86/asm/
H A Dkvm.h119 char regs[KVM_APIC_REG_SIZE]; member in struct:kvm_lapic_state
/external/libunwind/include/
H A Dlibunwind-arm.h258 unsigned long regs[16]; member in struct:unw_tdep_context
268 register unsigned long *unw_base asm ("r0") = unw_ctx->regs; \
276 register unsigned long *unw_base asm ("r0") = unw_ctx->regs; \
/external/linux-tools-perf/perf-3.12.0/arch/x86/include/uapi/asm/
H A Dkvm.h119 char regs[KVM_APIC_REG_SIZE]; member in struct:kvm_lapic_state
/external/linux-tools-perf/perf-3.12.0/include/linux/
H A Dperf_event.h83 struct pt_regs *regs; member in struct:perf_regs_user
95 int idx; /* index in shared_regs->regs[] */
271 struct pt_regs *regs);
598 data->regs_user.regs = NULL;
611 struct pt_regs *regs);
615 struct pt_regs *regs);
635 static inline void perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip) { } argument
639 * Take a snapshot of the regs. Skip ip and frame pointer to
640 * the nth caller. We only need a few of the regs:
646 static inline void perf_fetch_caller_regs(struct pt_regs *regs) argument
654 perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) argument
787 perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) argument
[all...]
/external/linux-tools-perf/perf-3.12.0/tools/perf/util/
H A Dsession.c736 static void regs_dump__printf(u64 mask, u64 *regs) argument
741 u64 val = regs[i++];
752 if (user_regs->regs) {
753 printf("... user regs: mask 0x%" PRIx64 "\n", mask);
754 regs_dump__printf(mask, user_regs->regs);
/external/mesa3d/src/gallium/drivers/nv50/codegen/
H A Dnv50_ir_ra.cpp63 // for regs of size >= 4, id is counted in 4-byte words (like nv50/c0 binary)
308 if (begin != end) // empty ranges are only added as hazards for fixed regs
573 if (i->getDef(d)->reg.data.id >= 0) // add hazard for fixed regs
590 if (it->get()->reg.data.id >= 0) // add hazard for fixed regs
701 RegisterSet regs; member in class:nv50_ir::GCRA
739 GCRA::RIG_Node::init(const RegisterSet& regs, LValue *lval) argument
745 colors = regs.units(lval->reg.file, lval->reg.size);
749 reg = regs.idToUnits(lval);
753 degreeLimit = regs.getFileSize(f, lval->reg.size);
782 WARN("forced coalescing of values in different fixed regs !\
[all...]
/external/qemu/android/config/linux-x86/asm/
H A Dkvm.h96 char regs[KVM_APIC_REG_SIZE]; member in struct:kvm_lapic_state
/external/qemu/android/config/linux-x86_64/asm/
H A Dkvm.h96 char regs[KVM_APIC_REG_SIZE]; member in struct:kvm_lapic_state
/external/vixl/src/a64/
H A Dmacro-assembler-a64.h272 void PushXRegList(RegList regs) { argument
273 PushSizeRegList(regs, kXRegSize);
275 void PopXRegList(RegList regs) { argument
276 PopSizeRegList(regs, kXRegSize);
278 void PushWRegList(RegList regs) { argument
279 PushSizeRegList(regs, kWRegSize);
281 void PopWRegList(RegList regs) { argument
282 PopSizeRegList(regs, kWRegSize);
284 inline void PushDRegList(RegList regs) { argument
285 PushSizeRegList(regs, kDRegSiz
287 PopDRegList(RegList regs) argument
290 PushSRegList(RegList regs) argument
293 PopSRegList(RegList regs) argument
[all...]
H A Dassembler-a64.cc2255 const CPURegister regs[] = {reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8}; local
2257 for (unsigned i = 0; i < sizeof(regs) / sizeof(regs[0]); i++) {
2258 if (regs[i].IsRegister()) {
2260 unique_regs |= regs[i].Bit();
2261 } else if (regs[i].IsFPRegister()) {
2263 unique_fpregs |= regs[i].Bit();
2265 VIXL_ASSERT(!regs[i].IsValid());
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/
H A Dr300_context.h240 struct r300_texture_sampler_state regs[16]; member in struct:r300_textures_state
532 /* Framebuffer state (pipelined regs). */
/external/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp1248 unsigned regs = fieldFromInstruction(Val, 0, 8); local
1251 if (regs == 0 || (Vd + regs) > 32) {
1252 regs = Vd + regs > 32 ? 32 - Vd : regs;
1253 regs = std::max( 1u, regs);
1259 for (unsigned i = 0; i < (regs - 1); ++i) {
1272 unsigned regs local
[all...]
/external/mesa3d/src/gallium/drivers/r300/
H A Dr300_context.h240 struct r300_texture_sampler_state regs[16]; member in struct:r300_textures_state
532 /* Framebuffer state (pipelined regs). */
/external/qemu/tcg/
H A Dtcg.h616 TCGRegSet regs; member in union:TCGArgConstraint::__anon30203
/external/valgrind/main/coregrind/m_debuginfo/
H A Ddebuginfo.c2725 regs, which supplies ip,sp,fp values, will be NULL for global
2730 RegSummary* regs,
2769 res = ML_(evaluate_GX)( var->gexpr, var->fbGX, regs, di );
3097 RegSummary regs; local
3145 regs.ip = ip;
3146 regs.sp = sp;
3147 regs.fp = fp;
3191 var, &regs,
3411 RegSummary regs; local
3449 regs
2727 data_address_is_in_var( PtrdiffT* offset, XArray* tyents, DiVariable* var, RegSummary* regs, Addr data_addr, const DebugInfo* di ) argument
[all...]
/external/valgrind/main/coregrind/m_syswrap/
H A Dsyswrap-darwin.c6447 thread_state_t regs; local
6456 regs = (thread_state_t)req->new_state;
6459 new_thread = build_thread(regs, req->flavor, req->new_stateCnt);
6462 hijack_thread_state(regs, req->flavor, req->new_stateCnt, new_thread);
7679 the integer regs) from the ucontext in ARG1 (and do all the
7687 overwrite all the regs anyway -- since the primary purpose of
/external/valgrind/main/include/vki/
H A Dvki-arm64-linux.h190 __vki_u64 regs[31]; member in struct:vki_sigcontext
488 __vki_u64 regs[31]; member in struct:vki_user_pt_regs
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/
H A Dbrw_context.h908 struct ra_regs *regs; member in struct:brw_context::__anon14339
917 * Mapping for register-allocated objects in *regs to the first
1006 struct ra_regs *regs; member in struct:brw_context::__anon14343
1014 * Mapping for register-allocated objects in *regs to the first
/external/chromium_org/v8/src/arm/
H A Dsimulator-arm.cc3505 int regs = 0; local
3508 regs = 1;
3511 regs = 2;
3514 regs = 3;
3517 regs = 4;
3524 while (r < regs) {
3546 int regs = 0; local
3549 regs = 1;
3552 regs = 2;
3555 regs
[all...]
/external/chromium_org/v8/src/arm64/
H A Dassembler-arm64.cc208 CPURegList regs(reg1, reg2, reg3, reg4);
211 if (regs.IncludesAliasOf(candidate)) continue;
229 const CPURegister regs[] = {reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8}; local
231 for (unsigned i = 0; i < arraysize(regs); i++) {
232 if (regs[i].IsRegister()) {
234 unique_regs |= regs[i].Bit();
235 } else if (regs[i].IsFPRegister()) {
237 unique_fpregs |= regs[i].Bit();
239 DCHECK(!regs[i].IsValid());
/external/chromium_org/v8/src/ia32/
H A Dmacro-assembler-ia32.cc3022 RegList regs = 0; local
3023 if (reg1.is_valid()) regs |= reg1.bit();
3024 if (reg2.is_valid()) regs |= reg2.bit();
3025 if (reg3.is_valid()) regs |= reg3.bit();
3026 if (reg4.is_valid()) regs |= reg4.bit();
3027 if (reg5.is_valid()) regs |= reg5.bit();
3028 if (reg6.is_valid()) regs |= reg6.bit();
3029 if (reg7.is_valid()) regs |= reg7.bit();
3030 if (reg8.is_valid()) regs |= reg8.bit();
3031 int n_of_non_aliasing_regs = NumRegs(regs);
[all...]
/external/chromium_org/v8/src/mips64/
H A Dmacro-assembler-mips64.cc1151 void MacroAssembler::MultiPush(RegList regs) { argument
1152 int16_t num_to_push = NumberOfBitsSet(regs);
1157 if ((regs & (1 << i)) != 0) {
1165 void MacroAssembler::MultiPushReversed(RegList regs) { argument
1166 int16_t num_to_push = NumberOfBitsSet(regs);
1171 if ((regs & (1 << i)) != 0) {
1179 void MacroAssembler::MultiPop(RegList regs) { argument
1183 if ((regs & (1 << i)) != 0) {
1192 void MacroAssembler::MultiPopReversed(RegList regs) { argument
1196 if ((regs
1205 MultiPushFPU(RegList regs) argument
1219 MultiPushReversedFPU(RegList regs) argument
1233 MultiPopFPU(RegList regs) argument
1246 MultiPopReversedFPU(RegList regs) argument
5938 RegList regs = 0; local
5992 RegList regs = 0; local
[all...]
/external/chromium_org/v8/src/x64/
H A Dmacro-assembler-x64.cc4996 RegList regs = 0; local
4997 if (reg1.is_valid()) regs |= reg1.bit();
4998 if (reg2.is_valid()) regs |= reg2.bit();
4999 if (reg3.is_valid()) regs |= reg3.bit();
5000 if (reg4.is_valid()) regs |= reg4.bit();
5001 if (reg5.is_valid()) regs |= reg5.bit();
5002 if (reg6.is_valid()) regs |= reg6.bit();
5003 if (reg7.is_valid()) regs |= reg7.bit();
5004 if (reg8.is_valid()) regs |= reg8.bit();
5005 int n_of_non_aliasing_regs = NumRegs(regs);
[all...]
/external/chromium_org/v8/src/x87/
H A Dmacro-assembler-x87.cc2982 RegList regs = 0; local
2983 if (reg1.is_valid()) regs |= reg1.bit();
2984 if (reg2.is_valid()) regs |= reg2.bit();
2985 if (reg3.is_valid()) regs |= reg3.bit();
2986 if (reg4.is_valid()) regs |= reg4.bit();
2987 if (reg5.is_valid()) regs |= reg5.bit();
2988 if (reg6.is_valid()) regs |= reg6.bit();
2989 if (reg7.is_valid()) regs |= reg7.bit();
2990 if (reg8.is_valid()) regs |= reg8.bit();
2991 int n_of_non_aliasing_regs = NumRegs(regs);
[all...]
/external/lldb/source/Plugins/Instruction/ARM/
H A DEmulateInstructionARM.cpp1995 for r = 0 to regs-1
1998 for r = 0 to regs-1
2017 uint32_t regs; // number of registers local
2025 regs = Bits32(opcode, 7, 0) / 2;
2026 // if regs == 0 || regs > 16 || (d+regs) > 32 then UNPREDICTABLE;
2027 if (regs == 0 || regs > 16 || (d + regs) > 3
2113 uint32_t regs; // number of registers local
10649 uint32_t regs; local
10841 uint32_t regs; local
11291 uint32_t regs; local
11633 uint32_t regs; local
11959 uint32_t regs; local
[all...]

Completed in 605 milliseconds

1234567