/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 467 DAG.getTarget().getRegisterInfo()); 726 DAG.getTarget().getRegisterInfo()); 820 DAG.getTarget().getRegisterInfo()); 967 const TargetRegisterInfo *TRI = DAG.getTarget().getRegisterInfo(); 994 static_cast<const HexagonRegisterInfo *>(DAG.getTarget().getRegisterInfo());
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H A D | HexagonMachineScheduler.cpp | 208 const TargetMachine &TM = DAG->MF.getTarget();
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrInfo.cpp | 1590 return getInlineAsmLength(AsmStr, *MF->getTarget().getMCAsmInfo()); 1822 TM = static_cast<const PPCTargetMachine *>(&MF.getTarget()); 1979 TM = static_cast<const PPCTargetMachine *>(&MF.getTarget()); 2056 TM = static_cast<const PPCTargetMachine *>(&MF.getTarget()); 2216 TM = static_cast<const PPCTargetMachine *>(&MF.getTarget());
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/external/clang/lib/CodeGen/ |
H A D | CGObjCMac.cpp | 1950 unsigned WordSizeInBits = CGM.getTarget().getPointerWidth(0); 1951 unsigned ByteSizeInBits = CGM.getTarget().getCharWidth(); 2077 unsigned ByteSizeInBits = CGM.getTarget().getCharWidth(); 2310 unsigned WordSizeInBits = CGM.getTarget().getPointerWidth(0); 2311 unsigned ByteSizeInBits = CGM.getTarget().getCharWidth(); 2462 unsigned WordSizeInBits = CGM.getTarget().getPointerWidth(0); 2463 unsigned ByteSizeInBits = CGM.getTarget().getCharWidth(); 4320 const llvm::Triple &Triple = CGM.getTarget().getTriple(); 4514 unsigned WordSizeInBits = CGM.getTarget().getPointerWidth(0); 4515 unsigned ByteSizeInBits = CGM.getTarget() [all...] |
H A D | CGException.cpp | 406 if (CGM.getTarget().getTriple().isWindowsMSVCEnvironment()) { 579 if (CGM.getTarget().getTriple().isWindowsMSVCEnvironment()) { 1480 CGM.getTarget().getCXXABI().isItaniumFamily());
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H A D | CGClass.cpp | 700 assert((CGM.getTarget().getCXXABI().hasConstructorVariants() || 707 CGM.getTarget().getCXXABI().hasConstructorVariants()) { 1142 !CGM.getTarget().getCXXABI().hasConstructorVariants()) { 1295 assert((Body || getTarget().getCXXABI().isMicrosoft()) &&
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H A D | CGDeclCXX.cpp | 239 CGM.getTarget().getStaticInitSectionSpecifier())
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H A D | CodeGenAction.cpp | 684 CI.getLangOpts(), CI.getTarget().getTargetDescription(),
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H A D | CodeGenTypes.cpp | 35 Target(cgm.getTarget()), TheCXXABI(cgm.getCXXABI()),
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/external/llvm/lib/CodeGen/ |
H A D | BranchFolding.cpp | 92 bool EnableTailMerge = !MF.getTarget().requiresStructuredCFG() && 96 MF.getTarget().getInstrInfo(), 97 MF.getTarget().getRegisterInfo(),
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H A D | SplitKit.cpp | 50 TII(*MF.getTarget().getInstrInfo()), 332 TII(*vrm.getMachineFunction().getTarget().getInstrInfo()), 333 TRI(*vrm.getMachineFunction().getTarget().getRegisterInfo()),
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H A D | PHIElimination.cpp | 243 const TargetInstrInfo *TII = MF.getTarget().getInstrInfo();
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H A D | ScheduleDAG.cpp | 38 : TM(mf.getTarget()),
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/external/llvm/lib/Target/ARM/ |
H A D | ARMConstantIslandPass.cpp | 385 TII = (const ARMBaseInstrInfo*)MF->getTarget().getInstrInfo(); 387 STI = &MF->getTarget().getSubtarget<ARMSubtarget>(); 532 const DataLayout &TD = *MF->getTarget().getDataLayout();
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/ |
H A D | nv50_ir_ra.cpp | 394 RegisterSet clobberSet(prog->getTarget()); 821 switch (func->getProgram()->getTarget()->getChipset() & ~0xf) { 995 regs(fn->getProgram()->getTarget()), 1892 targ = bb->getProgram()->getTarget();
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H A D | nv50_ir_ssa.cpp | 448 const Target *targ = prog->getTarget();
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/external/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
H A D | CoreEngine.h | 487 const Expr *getTarget() const { return E; } function in class:clang::ento::IndirectGotoNodeBuilder
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/external/clang/lib/Frontend/ |
H A D | FrontendActions.cpp | 289 if (!Module->isAvailable(CI.getLangOpts(), CI.getTarget(), Requirement,
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/external/clang/lib/StaticAnalyzer/Core/ |
H A D | CoreEngine.cpp | 410 builder(Pred, B, cast<IndirectGotoStmt>(Term)->getTarget(),
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | FunctionLoweringInfo.cpp | 211 const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
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H A D | ResourcePriorityQueue.cpp | 52 const TargetMachine &tm = (*IS->MF).getTarget();
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H A D | SelectionDAGBuilder.h | 541 : CurInst(nullptr), SDNodeOrder(LowestSDNodeOrder), TM(dag.getTarget()),
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64A57FPLoadBalancing.cpp | 298 const TargetMachine &TM = F.getTarget();
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/external/llvm/lib/Target/Mips/ |
H A D | MipsDelaySlotFiller.cpp | 278 assert(MF.getTarget().getRegisterInfo()->getAllocatableSet(MF).test(R) &&
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/external/mesa3d/src/gallium/drivers/nv50/codegen/ |
H A D | nv50_ir_ra.cpp | 394 RegisterSet clobberSet(prog->getTarget()); 821 switch (func->getProgram()->getTarget()->getChipset() & ~0xf) { 995 regs(fn->getProgram()->getTarget()), 1892 targ = bb->getProgram()->getTarget();
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