Searched refs:getTarget (Results 226 - 250 of 379) sorted by relevance

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/external/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp467 DAG.getTarget().getRegisterInfo());
726 DAG.getTarget().getRegisterInfo());
820 DAG.getTarget().getRegisterInfo());
967 const TargetRegisterInfo *TRI = DAG.getTarget().getRegisterInfo();
994 static_cast<const HexagonRegisterInfo *>(DAG.getTarget().getRegisterInfo());
H A DHexagonMachineScheduler.cpp208 const TargetMachine &TM = DAG->MF.getTarget();
/external/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp1590 return getInlineAsmLength(AsmStr, *MF->getTarget().getMCAsmInfo());
1822 TM = static_cast<const PPCTargetMachine *>(&MF.getTarget());
1979 TM = static_cast<const PPCTargetMachine *>(&MF.getTarget());
2056 TM = static_cast<const PPCTargetMachine *>(&MF.getTarget());
2216 TM = static_cast<const PPCTargetMachine *>(&MF.getTarget());
/external/clang/lib/CodeGen/
H A DCGObjCMac.cpp1950 unsigned WordSizeInBits = CGM.getTarget().getPointerWidth(0);
1951 unsigned ByteSizeInBits = CGM.getTarget().getCharWidth();
2077 unsigned ByteSizeInBits = CGM.getTarget().getCharWidth();
2310 unsigned WordSizeInBits = CGM.getTarget().getPointerWidth(0);
2311 unsigned ByteSizeInBits = CGM.getTarget().getCharWidth();
2462 unsigned WordSizeInBits = CGM.getTarget().getPointerWidth(0);
2463 unsigned ByteSizeInBits = CGM.getTarget().getCharWidth();
4320 const llvm::Triple &Triple = CGM.getTarget().getTriple();
4514 unsigned WordSizeInBits = CGM.getTarget().getPointerWidth(0);
4515 unsigned ByteSizeInBits = CGM.getTarget()
[all...]
H A DCGException.cpp406 if (CGM.getTarget().getTriple().isWindowsMSVCEnvironment()) {
579 if (CGM.getTarget().getTriple().isWindowsMSVCEnvironment()) {
1480 CGM.getTarget().getCXXABI().isItaniumFamily());
H A DCGClass.cpp700 assert((CGM.getTarget().getCXXABI().hasConstructorVariants() ||
707 CGM.getTarget().getCXXABI().hasConstructorVariants()) {
1142 !CGM.getTarget().getCXXABI().hasConstructorVariants()) {
1295 assert((Body || getTarget().getCXXABI().isMicrosoft()) &&
H A DCGDeclCXX.cpp239 CGM.getTarget().getStaticInitSectionSpecifier())
H A DCodeGenAction.cpp684 CI.getLangOpts(), CI.getTarget().getTargetDescription(),
H A DCodeGenTypes.cpp35 Target(cgm.getTarget()), TheCXXABI(cgm.getCXXABI()),
/external/llvm/lib/CodeGen/
H A DBranchFolding.cpp92 bool EnableTailMerge = !MF.getTarget().requiresStructuredCFG() &&
96 MF.getTarget().getInstrInfo(),
97 MF.getTarget().getRegisterInfo(),
H A DSplitKit.cpp50 TII(*MF.getTarget().getInstrInfo()),
332 TII(*vrm.getMachineFunction().getTarget().getInstrInfo()),
333 TRI(*vrm.getMachineFunction().getTarget().getRegisterInfo()),
H A DPHIElimination.cpp243 const TargetInstrInfo *TII = MF.getTarget().getInstrInfo();
H A DScheduleDAG.cpp38 : TM(mf.getTarget()),
/external/llvm/lib/Target/ARM/
H A DARMConstantIslandPass.cpp385 TII = (const ARMBaseInstrInfo*)MF->getTarget().getInstrInfo();
387 STI = &MF->getTarget().getSubtarget<ARMSubtarget>();
532 const DataLayout &TD = *MF->getTarget().getDataLayout();
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/
H A Dnv50_ir_ra.cpp394 RegisterSet clobberSet(prog->getTarget());
821 switch (func->getProgram()->getTarget()->getChipset() & ~0xf) {
995 regs(fn->getProgram()->getTarget()),
1892 targ = bb->getProgram()->getTarget();
H A Dnv50_ir_ssa.cpp448 const Target *targ = prog->getTarget();
/external/clang/include/clang/StaticAnalyzer/Core/PathSensitive/
H A DCoreEngine.h487 const Expr *getTarget() const { return E; } function in class:clang::ento::IndirectGotoNodeBuilder
/external/clang/lib/Frontend/
H A DFrontendActions.cpp289 if (!Module->isAvailable(CI.getLangOpts(), CI.getTarget(), Requirement,
/external/clang/lib/StaticAnalyzer/Core/
H A DCoreEngine.cpp410 builder(Pred, B, cast<IndirectGotoStmt>(Term)->getTarget(),
/external/llvm/lib/CodeGen/SelectionDAG/
H A DFunctionLoweringInfo.cpp211 const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
H A DResourcePriorityQueue.cpp52 const TargetMachine &tm = (*IS->MF).getTarget();
H A DSelectionDAGBuilder.h541 : CurInst(nullptr), SDNodeOrder(LowestSDNodeOrder), TM(dag.getTarget()),
/external/llvm/lib/Target/AArch64/
H A DAArch64A57FPLoadBalancing.cpp298 const TargetMachine &TM = F.getTarget();
/external/llvm/lib/Target/Mips/
H A DMipsDelaySlotFiller.cpp278 assert(MF.getTarget().getRegisterInfo()->getAllocatableSet(MF).test(R) &&
/external/mesa3d/src/gallium/drivers/nv50/codegen/
H A Dnv50_ir_ra.cpp394 RegisterSet clobberSet(prog->getTarget());
821 switch (func->getProgram()->getTarget()->getChipset() & ~0xf) {
995 regs(fn->getProgram()->getTarget()),
1892 targ = bb->getProgram()->getTarget();

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