/external/clang/lib/CodeGen/ |
H A D | CGDecl.cpp | 453 llvm::Value *Addr = CGF.EmitDeclRefLValue(&DRE).getAddress(); variable 463 CGF.Builder.CreateBitCast(Addr, CGF.ConvertType(ArgTy)); 474 llvm::Value *Addr; member in class:__anon17823::CallLifetimeEnd 478 : Addr(addr), Size(size) {} 481 llvm::Value *castAddr = CGF.Builder.CreateBitCast(Addr, CGF.Int8PtrTy);
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H A D | CodeGenFunction.cpp | 632 llvm::Value *Addr = Builder.CreateStructGEP(EI, Idx); local 633 ReturnValue = Builder.CreateLoad(Addr, "agg.result");
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H A D | CGClass.cpp | 350 llvm::Value *Addr = variable 355 /*Delegating=*/false, Addr); 1777 llvm::Value *Addr; member in struct:__anon17818::CallDelegatingCtorDtor 1780 CallDelegatingCtorDtor(const CXXDestructorDecl *D, llvm::Value *Addr, argument 1782 : Dtor(D), Addr(Addr), Type(Type) {} 1786 /*Delegating=*/true, Addr); 1831 llvm::Value *Addr; member in struct:__anon17819::CallLocalDtor 1833 CallLocalDtor(const CXXDestructorDecl *D, llvm::Value *Addr) argument 1834 : Dtor(D), Addr(Add 1844 PushDestructorCleanup(const CXXDestructorDecl *D, llvm::Value *Addr) argument 1849 PushDestructorCleanup(QualType T, llvm::Value *Addr) argument [all...] |
H A D | CGBuiltin.cpp | 1801 CodeGenFunction::EmitPointerWithAlignment(const Expr *Addr) { argument 1802 assert(Addr->getType()->isPointerType()); 1803 Addr = Addr->IgnoreParens(); 1804 if (const ImplicitCastExpr *ICE = dyn_cast<ImplicitCastExpr>(Addr)) { 1810 ConvertType(Addr->getType())); 1827 if (const UnaryOperator *UO = dyn_cast<UnaryOperator>(Addr)) { 1845 QualType PtTy = Addr->getType()->getPointeeType(); 1849 return std::make_pair(EmitScalarExpr(Addr), Align); 2908 Value *Addr local 2936 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ops[0], vi); local 2956 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ops[0], vi); local 5510 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ops[0], vi); local 5529 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ops[0], vi); local 5549 Value *Addr = Builder.CreateConstInBoundsGEP1_32(Ops[0], vi); local [all...] |
H A D | CGCall.cpp | 2308 DestroyUnpassedArg(llvm::Value *Addr, QualType Ty) argument 2309 : Addr(Addr), Ty(Ty) {} 2311 llvm::Value *Addr; member in struct:__anon17813::DestroyUnpassedArg 2318 /*Delegating=*/false, Addr); 2529 llvm::Value *Addr = RV.getAggregateAddr(); local 2531 llvm::Value *EltAddr = Builder.CreateConstGEP2_32(Addr, 0, Elt); 2650 llvm::Value *Addr = local 2652 Builder.CreateStore(SRetPtr, Addr); 2685 llvm::Value *Addr local 2691 llvm::Value *Addr = local 2728 llvm::Value *Addr = RV.getAggregateAddr(); local [all...] |
H A D | CGExpr.cpp | 1062 llvm::Value *CodeGenFunction::EmitLoadOfScalar(llvm::Value *Addr, bool Volatile, argument 1072 cast<llvm::PointerType>(Addr->getType())->getElementType(); 1085 Addr->getType()))->getAddressSpace()); 1086 llvm::Value *Cast = Builder.CreateBitCast(Addr, ptVec4Ty, 1108 LValue lvalue = LValue::MakeAddr(Addr, Ty, 1114 llvm::LoadInst *Load = Builder.CreateLoad(Addr); 1181 void CodeGenFunction::EmitStoreOfScalar(llvm::Value *Value, llvm::Value *Addr, argument 1211 auto *DstPtr = cast<llvm::PointerType>(Addr->getType()); 1215 Addr = Builder.CreateBitCast(Addr, MemT 1954 llvm::Value *Addr = LV.getAddress(); local 2525 llvm::Value *Addr = base.getAddress(); local [all...] |
/external/llvm/include/llvm/Object/ |
H A D | ELF.h | 255 DynRegionInfo() : Addr(nullptr), Size(0), EntSize(0) {} 257 const void *Addr; member in struct:llvm::object::ELFFile::DynRegionInfo 352 if (DynSymRegion.Addr) 353 return Elf_Sym_Iter(DynSymRegion.EntSize, (const char *)DynSymRegion.Addr, 359 if (DynSymRegion.Addr) 361 (const char *)DynSymRegion.Addr + DynSymRegion.Size, 495 if (!DynSymRegion.Addr || !dot_gnu_version_sec) 675 if (DynSymRegion.Addr) 678 DynSymRegion.Addr = base() + Sec.sh_offset; 682 DynStrRegion.Addr [all...] |
/external/llvm/include/llvm/Target/ |
H A D | TargetLowering.h | 928 /// Perform a load-linked operation on Addr, returning a "Value *" with the 932 virtual Value *emitLoadLinked(IRBuilder<> &Builder, Value *Addr, argument 937 /// Perform a store-conditional operation to Addr. Return the status of the 940 Value *Addr, AtomicOrdering Ord) const { 939 emitStoreConditional(IRBuilder< &Builder, Value *Val, Value *Addr, AtomicOrdering Ord) const argument
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/external/llvm/lib/MC/ |
H A D | MCDwarf.cpp | 618 const MCExpr *Addr = MCSymbolRefExpr::Create( local 622 MCOS->EmitValue(Addr, AddrSize);
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/external/llvm/lib/Object/ |
H A D | MachOObjectFile.cpp | 316 uint64_t Addr; local 319 if ((ec = Symbol.getAddress(Addr))) 321 if (Addr != Val) 333 uint64_t Addr; local 336 if ((ec = Section.getAddress(Addr))) 338 if (Addr != Val)
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 115 bool ComputeAddress(const Value *Obj, Address &Addr); 116 bool SimplifyAddress(Address &Addr, MVT VT, int64_t ScaleFactor, 118 void AddLoadStoreOperands(Address &Addr, const MachineInstrBuilder &MIB, 125 bool EmitLoad(MVT VT, unsigned &ResultReg, Address Addr, 127 bool EmitStore(MVT VT, unsigned SrcReg, Address Addr, 306 bool AArch64FastISel::ComputeAddress(const Value *Obj, Address &Addr) { argument 333 return ComputeAddress(U->getOperand(0), Addr); 338 return ComputeAddress(U->getOperand(0), Addr); 344 return ComputeAddress(U->getOperand(0), Addr); 348 Address SavedAddr = Addr; 443 SimplifyAddress(Address &Addr, MVT VT, int64_t ScaleFactor, bool UseUnscaled) argument 494 AddLoadStoreOperands(Address &Addr, const MachineInstrBuilder &MIB, unsigned Flags, bool UseUnscaled) argument 515 EmitLoad(MVT VT, unsigned &ResultReg, Address Addr, bool UseUnscaled) argument 617 EmitStore(MVT VT, unsigned SrcReg, Address Addr, bool UseUnscaled) argument 1262 Address Addr; local [all...] |
/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelDAGToDAG.cpp | 75 bool SelectMEMriS11_2(SDValue& Addr, SDValue &Base, SDValue &Offset); 77 bool SelectADDRrr(SDValue &Addr, SDValue &Base, SDValue &Offset); 91 bool SelectAddr(SDNode *Op, SDValue Addr, SDValue &Base, SDValue &Offset); 1397 bool HexagonDAGToDAGISel::SelectADDRri(SDValue& Addr, SDValue &Base, argument 1399 if (Addr.getOpcode() == ISD::TargetExternalSymbol || 1400 Addr.getOpcode() == ISD::TargetGlobalAddress) 1403 if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>(Addr)) { 1408 Base = Addr; 1414 bool HexagonDAGToDAGISel::SelectADDRriS11_0(SDValue& Addr, SDValue &Base, argument 1416 if (Addr 1431 SelectADDRriS11_1(SDValue& Addr, SDValue &Base, SDValue &Offset) argument 1448 SelectADDRriS11_2(SDValue& Addr, SDValue &Base, SDValue &Offset) argument 1465 SelectADDRriU6_0(SDValue& Addr, SDValue &Base, SDValue &Offset) argument 1482 SelectADDRriU6_1(SDValue& Addr, SDValue &Base, SDValue &Offset) argument 1499 SelectADDRriU6_2(SDValue& Addr, SDValue &Base, SDValue &Offset) argument 1516 SelectMEMriS11_2(SDValue& Addr, SDValue &Base, SDValue &Offset) argument 1527 SelectADDRriS11_3(SDValue& Addr, SDValue &Base, SDValue &Offset) argument 1543 SelectADDRrr(SDValue &Addr, SDValue &R1, SDValue &R2) argument 1567 SelectAddr(SDNode *Op, SDValue Addr, SDValue &Base, SDValue &Offset) argument [all...] |
H A D | HexagonISelLowering.cpp | 943 SDValue Addr = DAG.getFrameIndex(QFI->getVarArgsFrameIndex(), MVT::i32); local 945 return DAG.getStore(Op.getOperand(0), SDLoc(Op), Addr,
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H A D | HexagonInstrInfo.cpp | 511 SmallVectorImpl<MachineOperand> &Addr, 551 SmallVectorImpl<MachineOperand> &Addr, 508 storeRegToAddr( MachineFunction &MF, unsigned SrcReg, bool isKill, SmallVectorImpl<MachineOperand> &Addr, const TargetRegisterClass *RC, SmallVectorImpl<MachineInstr*> &NewMIs) const argument 550 loadRegFromAddr(MachineFunction &MF, unsigned DestReg, SmallVectorImpl<MachineOperand> &Addr, const TargetRegisterClass *RC, SmallVectorImpl<MachineInstr*> &NewMIs) const argument
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCFastISel.cpp | 145 bool PPCEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr, 148 bool PPCEmitStore(MVT VT, unsigned SrcReg, Address &Addr); 149 bool PPCComputeAddress(const Value *Obj, Address &Addr); 150 void PPCSimplifyAddress(Address &Addr, MVT VT, bool &UseOffset, 281 // Given a value Obj, create an Address object Addr that represents its 283 bool PPCFastISel::PPCComputeAddress(const Value *Obj, Address &Addr) { argument 304 return PPCComputeAddress(U->getOperand(0), Addr); 308 return PPCComputeAddress(U->getOperand(0), Addr); 313 return PPCComputeAddress(U->getOperand(0), Addr); 316 Address SavedAddr = Addr; 396 PPCSimplifyAddress(Address &Addr, MVT VT, bool &UseOffset, unsigned &IndexReg) argument 427 PPCEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr, const TargetRegisterClass *RC, bool IsZExt, unsigned FP64LoadOpc) argument 568 PPCEmitStore(MVT VT, unsigned SrcReg, Address &Addr) argument 886 Address Addr; local 997 Address Addr; local 2155 Address Addr; local [all...] |
/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 787 SDValue Addr = DAG.getFrameIndex(XFI->getVarArgsFrameIndex(), MVT::i32); local 788 return DAG.getStore(Op.getOperand(0), dl, Addr, Op.getOperand(1), 902 SDValue Addr = Trmp; local 906 Addr, MachinePointerInfo(TrmpAddr), false, false, 909 Addr = DAG.getNode(ISD::ADD, dl, MVT::i32, Trmp, 912 Addr, MachinePointerInfo(TrmpAddr, 4), false, 915 Addr = DAG.getNode(ISD::ADD, dl, MVT::i32, Trmp, 918 Addr, MachinePointerInfo(TrmpAddr, 8), false, 921 Addr = DAG.getNode(ISD::ADD, dl, MVT::i32, Trmp, 923 OutChains[3] = DAG.getStore(Chain, dl, Nest, Addr, [all...] |
/external/llvm/lib/Transforms/Instrumentation/ |
H A D | DataFlowSanitizer.cpp | 242 Value *getShadowAddress(Value *Addr, Instruction *Pos); 292 void storeShadow(Value *Addr, uint64_t Size, uint64_t Align, Value *Shadow, 864 Value *DataFlowSanitizer::getShadowAddress(Value *Addr, Instruction *Pos) { argument 865 assert(Addr != RetvalTLS && "Reinstrumenting?"); 869 IRB.CreateAnd(IRB.CreatePtrToInt(Addr, IntptrTy), ShadowPtrMask), 921 // Generates IR to load shadow corresponding to bytes [Addr, Addr+Size), where 922 // Addr has alignment Align, and take the union of each of those shadows. 923 Value *DFSanFunction::loadShadow(Value *Addr, uint64_t Size, uint64_t Align, argument 925 if (AllocaInst *AI = dyn_cast<AllocaInst>(Addr)) { 1048 storeShadow(Value *Addr, uint64_t Size, uint64_t Align, Value *Shadow, Instruction *Pos) argument [all...] |
H A D | AddressSanitizer.cpp | 370 Value *Addr, uint32_t TypeSize, bool IsWrite, 374 Instruction *generateCrashCode(Instruction *InsertBefore, Value *Addr, 731 Value *Addr = isInterestingMemoryAccess(I, &IsWrite, &Alignment); local 732 assert(Addr); 734 if (GlobalVariable *G = dyn_cast<GlobalVariable>(Addr)) { 742 ConstantExpr *CE = dyn_cast<ConstantExpr>(Addr); 753 Type *OrigPtrTy = Addr->getType(); 772 return instrumentAddress(I, I, Addr, TypeSize, IsWrite, nullptr, UseCalls); 779 Value *AddrLong = IRB.CreatePointerCast(Addr, IntptrTy); 786 instrumentAddress(I, I, Addr, 802 generateCrashCode( Instruction *InsertBefore, Value *Addr, bool IsWrite, size_t AccessSizeIndex, Value *SizeArgument) argument 835 instrumentAddress(Instruction *OrigIns, Instruction *InsertBefore, Value *Addr, uint32_t TypeSize, bool IsWrite, Value *SizeArgument, bool UseCalls) argument [all...] |
/external/llvm/include/llvm/IR/ |
H A D | IRBuilder.h | 567 IndirectBrInst *CreateIndirectBr(Value *Addr, unsigned NumDests = 10) { argument 568 return Insert(IndirectBrInst::Create(Addr, NumDests));
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/external/llvm/lib/CodeGen/ |
H A D | CodeGenPrepare.cpp | 140 bool OptimizeMemoryInst(Instruction *I, Value *Addr, Type *AccessTy); 2180 /// MatchAddr - If we can, try to add the value of 'Addr' into the current 2181 /// addressing mode. If Addr can't be added to AddrMode this returns false and 2182 /// leaves AddrMode unmodified. This assumes that Addr is either a pointer type 2185 bool AddressingModeMatcher::MatchAddr(Value *Addr, unsigned Depth) { argument 2190 if (ConstantInt *CI = dyn_cast<ConstantInt>(Addr)) { 2196 } else if (GlobalValue *GV = dyn_cast<GlobalValue>(Addr)) { 2204 } else if (Instruction *I = dyn_cast<Instruction>(Addr)) { 2230 } else if (ConstantExpr *CE = dyn_cast<ConstantExpr>(Addr)) { 2234 } else if (isa<ConstantPointerNull>(Addr)) { 2483 OptimizeMemoryInst(Instruction *MemoryInst, Value *Addr, Type *AccessTy) argument [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 173 bool ARMEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr, 176 bool ARMEmitStore(MVT VT, unsigned SrcReg, Address &Addr, 178 bool ARMComputeAddress(const Value *Obj, Address &Addr); 179 void ARMSimplifyAddress(Address &Addr, MVT VT, bool useAM3); 218 void AddLoadStoreOperands(MVT VT, Address &Addr, 753 bool ARMFastISel::ARMComputeAddress(const Value *Obj, Address &Addr) { argument 781 return ARMComputeAddress(U->getOperand(0), Addr); 785 return ARMComputeAddress(U->getOperand(0), Addr); 790 return ARMComputeAddress(U->getOperand(0), Addr); 793 Address SavedAddr = Addr; 857 ARMSimplifyAddress(Address &Addr, MVT VT, bool useAM3) argument 910 AddLoadStoreOperands(MVT VT, Address &Addr, const MachineInstrBuilder &MIB, unsigned Flags, bool useAM3) argument 958 ARMEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr, unsigned Alignment, bool isZExt, bool allocReg) argument 1081 ARMEmitStore(MVT VT, unsigned SrcReg, Address &Addr, unsigned Alignment) argument 2004 Address Addr; local [all...] |
H A D | ARMISelDAGToDAG.cpp | 155 bool SelectAddrMode6(SDNode *Parent, SDValue N, SDValue &Addr,SDValue &Align); 998 bool ARMDAGToDAGISel::SelectAddrMode6(SDNode *Parent, SDValue N, SDValue &Addr, argument 1000 Addr = N;
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/external/llvm/lib/Target/X86/ |
H A D | X86InstrInfo.cpp | 3301 SmallVectorImpl<MachineOperand> &Addr, 3312 for (unsigned i = 0, e = Addr.size(); i != e; ++i) 3313 MIB.addOperand(Addr[i]); 3336 SmallVectorImpl<MachineOperand> &Addr, 3347 for (unsigned i = 0, e = Addr.size(); i != e; ++i) 3348 MIB.addOperand(Addr[i]); 3299 storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill, SmallVectorImpl<MachineOperand> &Addr, const TargetRegisterClass *RC, MachineInstr::mmo_iterator MMOBegin, MachineInstr::mmo_iterator MMOEnd, SmallVectorImpl<MachineInstr*> &NewMIs) const argument 3335 loadRegFromAddr(MachineFunction &MF, unsigned DestReg, SmallVectorImpl<MachineOperand> &Addr, const TargetRegisterClass *RC, MachineInstr::mmo_iterator MMOBegin, MachineInstr::mmo_iterator MMOEnd, SmallVectorImpl<MachineInstr*> &NewMIs) const argument
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/external/llvm/lib/Transforms/IPO/ |
H A D | GlobalOpt.cpp | 2111 /// At this point, the GEP operands of Addr [0, OpNo) have been stepped into. 2113 ConstantExpr *Addr, unsigned OpNo) { 2115 if (OpNo == Addr->getNumOperands()) { 2127 ConstantInt *CU = cast<ConstantInt>(Addr->getOperand(OpNo)); 2130 Elts[Idx] = EvaluateStoreInto(Elts[Idx], Val, Addr, OpNo+1); 2136 ConstantInt *CI = cast<ConstantInt>(Addr->getOperand(OpNo)); 2151 EvaluateStoreInto(Elts[CI->getZExtValue()], Val, Addr, OpNo+1); 2158 /// CommitValueTo - We have decided that Addr (which satisfies the predicate 2160 static void CommitValueTo(Constant *Val, Constant *Addr) { argument 2161 if (GlobalVariable *GV = dyn_cast<GlobalVariable>(Addr)) { 2112 EvaluateStoreInto(Constant *Init, Constant *Val, ConstantExpr *Addr, unsigned OpNo) argument [all...] |
/external/mdnsresponder/mDNSCore/ |
H A D | uDNS.c | 1008 llqData.err = GetLLQEventPort(m, &tcpInfo->Addr); // We're using TCP; tell server what UDP port to send notifications to 1026 err = mDNSSendDNSMessage(m, &tcpInfo->request, end, mDNSInterface_Any, mDNSNULL, &tcpInfo->Addr, tcpInfo->Port, sock, AuthInfo); 1121 mDNSAddr Addr = tcpInfo->Addr; local 1145 mDNSCoreReceive(m, reply, end, &Addr, Port, tls ? (mDNSAddr *)1 : mDNSNULL, srcPort, 0); 1230 TCPSocketFlags flags, const mDNSAddr *const Addr, const mDNSIPPort Port, domainname *hostname, 1249 info->Addr = *Addr; 1264 err = mDNSPlatformTCPConnect(info->sock, Addr, Port, hostname, (question ? question->InterfaceID : mDNSNULL), tcpCallback, info); 1538 zd->Addr 1229 MakeTCPConn(mDNS *const m, const DNSMessage *const msg, const mDNSu8 *const end, TCPSocketFlags flags, const mDNSAddr *const Addr, const mDNSIPPort Port, domainname *hostname, DNSQuestion *const question, AuthRecord *const rr) argument [all...] |