| /external/llvm/include/llvm/CodeGen/ |
| H A D | LivePhysRegs.h | 77 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
78 SubRegs.isValid(); ++SubRegs)
79 LiveRegs.insert(*SubRegs);
87 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
88 SubRegs.isValid(); ++SubRegs)
89 LiveRegs.erase(*SubRegs);
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| /external/llvm/lib/Target/R600/ |
| H A D | AMDGPURegisterInfo.cpp | 50 static const unsigned SubRegs[] = { local
57 assert(Channel < array_lengthof(SubRegs));
58 return SubRegs[Channel];
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| /external/llvm/lib/CodeGen/ |
| H A D | LiveVariables.cpp | 197 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) {
198 unsigned SubReg = *SubRegs;
220 for (MCSubRegIterator SubRegs(DefReg, TRI, /*IncludeSelf=*/true);
221 SubRegs.isValid(); ++SubRegs)
222 PartDefRegs.insert(*SubRegs);
251 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs
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| H A D | RegisterScavenging.cpp | 35 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
36 SubRegs.isValid(); ++SubRegs)
37 RegsAvailable.reset(*SubRegs);
108 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
109 SubRegs.isValid(); ++SubRegs)
110 BV.set(*SubRegs);
221 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs
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| H A D | CriticalAntiDepBreaker.cpp | 222 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
223 SubRegs.isValid(); ++SubRegs) {
224 KeepRegs.set(*SubRegs);
234 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
235 SubRegs.isValid(); ++SubRegs)
236 KeepRegs.set(*SubRegs);
287 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs
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| H A D | MachineInstrBundle.cpp | 174 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) {
175 unsigned SubReg = *SubRegs;
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| H A D | ScheduleDAGInstrs.cpp | 1066 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
1067 SubRegs.isValid(); ++SubRegs)
1068 LiveRegs.set(*SubRegs);
1092 for (MCSubRegIterator SubRegs(SuperReg, TRI); SubRegs.isValid(); ++SubRegs) {
1093 if (LiveRegs.test(*SubRegs)) {
1094 MIB.addReg(*SubRegs, RegState::ImplicitDefine);
1136 for (MCSubRegIterator SubRegs(Re
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| H A D | MachineVerifier.cpp | 95 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
96 RV.push_back(*SubRegs);
461 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) {
463 // assert(regsReserved.test(*SubRegs) && "Non-reserved sub-register");
464 regsReserved.set(*SubRegs);
683 for (MCSubRegIterator SubRegs(*
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| H A D | AggressiveAntiDepBreaker.cpp | 251 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
252 SubRegs.isValid(); ++SubRegs)
253 PassthruRegs.insert(*SubRegs);
318 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) {
319 unsigned SubregReg = *SubRegs;
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| H A D | BranchFolding.cpp | 146 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
147 SubRegs.isValid(); ++SubRegs)
148 ImpDefRegs.insert(*SubRegs);
1578 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
1579 Uses.erase(*SubRegs); // Use sub-registers to be conservative
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| H A D | IfConversion.cpp | 1434 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
1435 SubRegs.isValid(); ++SubRegs)
1436 ExtUses.insert(*SubRegs);
1443 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
1444 SubRegs.isValid(); ++SubRegs)
1445 RedefsByFalse.insert(*SubRegs);
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| /external/llvm/utils/TableGen/ |
| H A D | CodeGenRegisters.cpp | 119 std::vector<Record*> SRs = TheDef->getValueAsListOfDefs("SubRegs");
123 "SubRegs and SubRegIndices must have the same size");
213 for (SubRegMap::const_iterator I = SubRegs.begin(), E = SubRegs.end();
226 return SubRegs;
233 if (!SubRegs.insert(std::make_pair(Idx, SR)).second)
252 if (!SubRegs.insert(*SI).second)
265 CodeGenRegister *SR = SubRegs[Idx];
277 if (SubRegs.count(I->second) || !Orphans.erase(SRI->second))
280 SubRegs
556 ListInit *SubRegs = Def->getValueAsListInit("SubRegs"); variable
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| H A D | CodeGenRegisters.h | 142 return SubRegs;
235 SubRegMap SubRegs; member in struct:llvm::CodeGenRegister
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| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonCopyToCombine.cpp | 404 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) {
405 LastDef[*SubRegs] = MI;
|
| /external/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 103 /// register. The SubRegs field is a zero terminated array of registers that
111 uint32_t SubRegs; // Sub-register set, described above member in struct:llvm::MCRegisterDesc
115 // sub-register in SubRegs.
445 init(Reg, MCRI->DiffLists + MCRI->get(Reg).SubRegs);
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 701 unsigned SubRegs = 0; local
708 SubRegs = 2;
712 SubRegs = 4;
717 SubRegs = 2;
721 SubRegs = 3;
725 SubRegs = 4;
729 SubRegs = 2;
733 SubRegs = 2;
738 SubRegs = 3;
743 SubRegs
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| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 138 unsigned SubRegs[]);
834 static unsigned SubRegs[] = { AArch64::dsub0, AArch64::dsub1, local
837 return createTuple(Regs, RegClassIDs, SubRegs);
843 static unsigned SubRegs[] = { AArch64::qsub0, AArch64::qsub1, local
846 return createTuple(Regs, RegClassIDs, SubRegs);
851 unsigned SubRegs[]) {
870 Ops.push_back(CurDAG->getTargetConstant(SubRegs[i], MVT::i32));
849 createTuple(ArrayRef<SDValue> Regs, unsigned RegClassIDs[], unsigned SubRegs[]) argument
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