/external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/gallivm/ |
H A D | lp_bld_misc.cpp | 247 unsigned OptLevel, 256 .setOptLevel((CodeGenOpt::Level)OptLevel); 245 lp_build_create_mcjit_compiler_for_module(LLVMExecutionEngineRef *OutJIT, LLVMModuleRef M, unsigned OptLevel, char **OutError) argument
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/external/clang/lib/CodeGen/ |
H A D | BackendUtil.cpp | 149 if (Builder.OptLevel > 0) 154 if (Builder.OptLevel > 0) 159 if (Builder.OptLevel > 0) 197 if (Builder.OptLevel > 0) { 221 unsigned OptLevel = CodeGenOpts.OptimizationLevel; local 227 OptLevel = 0; 232 PMBuilder.OptLevel = OptLevel; 305 createFunctionInliningPass(OptLevel, CodeGenOpts.OptimizeSize); 310 if (OptLevel 412 CodeGenOpt::Level OptLevel = CodeGenOpt::Default; local [all...] |
/external/clang/lib/Driver/ |
H A D | Tools.cpp | 2210 unsigned OptLevel = 0; local 2211 if (S.getAsInteger(10, OptLevel)) 2214 return OptLevel > 1; 7713 StringRef OptLevel = A->getValue(); local 7714 if (OptLevel == "1" || OptLevel == "2" || OptLevel == "s") 7716 else if (OptLevel == "3")
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/external/llvm/bindings/ocaml/executionengine/ |
H A D | executionengine_ocaml.c | 195 llvm_ee_create_jit(LLVMModuleRef M, value OptLevel) { argument 198 if (LLVMCreateJITCompilerForModule(&JIT, M, Int_val(OptLevel), &Error))
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/external/llvm/bindings/ocaml/target/ |
H A D | target_ocaml.c | 283 value Features, value OptLevel, value RelocMode, 295 if(OptLevel != Val_int(0)) 296 OptLevelEnum = Int_val(Field(OptLevel, 0)); 282 llvm_create_targetmachine_native(value Triple, value CPU, value Features, value OptLevel, value RelocMode, value CodeModel, LLVMTargetRef Target) argument
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/external/llvm/bindings/ocaml/transforms/passmgr_builder/ |
H A D | passmgr_builder_ocaml.c | 54 CAMLprim value llvm_pmbuilder_set_opt_level(value OptLevel, value PMB) { argument 55 LLVMPassManagerBuilderSetOptLevel(PMBuilder_val(PMB), Int_val(OptLevel));
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/external/llvm/include/llvm-c/ |
H A D | ExecutionEngine.h | 46 unsigned OptLevel; member in struct:LLVMMCJITCompilerOptions 86 unsigned OptLevel, 127 unsigned OptLevel,
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/external/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAG.h | 173 CodeGenOpt::Level OptLevel; member in class:llvm::SelectionDAG 349 CodeGenOpt::Level OptLevel);
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H A D | SelectionDAGISel.h | 52 CodeGenOpt::Level OptLevel; member in class:llvm::SelectionDAGISel 100 CodeGenOpt::Level OptLevel,
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/external/llvm/include/llvm/ExecutionEngine/ |
H A D | ExecutionEngine.h | 188 CodeGenOpt::Level OptLevel = 201 CodeGenOpt::Level OptLevel = 575 CodeGenOpt::Level OptLevel; member in class:llvm::EngineBuilder 641 OptLevel = l;
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/external/llvm/include/llvm/MC/ |
H A D | MCCodeGenInfo.h | 31 /// OptLevel - Optimization level. 33 CodeGenOpt::Level OptLevel; member in class:llvm::MCCodeGenInfo 44 CodeGenOpt::Level getOptLevel() const { return OptLevel; } 46 // Allow overriding OptLevel on a per-function basis. 47 void setOptLevel(CodeGenOpt::Level Level) { OptLevel = Level; }
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/external/llvm/include/llvm/Transforms/IPO/ |
H A D | PassManagerBuilder.h | 37 /// Builder.OptLevel = 2; 98 unsigned OptLevel; member in class:llvm::PassManagerBuilder
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 85 CodeGenOpt::Level OptLevel; member in class:__anon25798::DAGCombiner 353 OptLevel(OL), LegalOperations(false), LegalTypes(false), AA(A) { 7999 if (OptLevel != CodeGenOpt::None && LD->isUnindexed()) { 9583 if (OptLevel != CodeGenOpt::None && ST->isUnindexed()) { 11743 CodeGenOpt::Level OptLevel) { 11746 DAGCombiner(*this, AA, OptLevel).Run(Level); 11742 Combine(CombineLevel Level, AliasAnalysis &AA, CodeGenOpt::Level OptLevel) argument
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H A D | ScheduleDAGRRList.cpp | 164 CodeGenOpt::Level OptLevel) 2979 CodeGenOpt::Level OptLevel) { 2986 ScheduleDAGRRList *SD = new ScheduleDAGRRList(*IS->MF, false, PQ, OptLevel); 2993 CodeGenOpt::Level OptLevel) { 3000 ScheduleDAGRRList *SD = new ScheduleDAGRRList(*IS->MF, false, PQ, OptLevel); 3007 CodeGenOpt::Level OptLevel) { 3016 ScheduleDAGRRList *SD = new ScheduleDAGRRList(*IS->MF, true, PQ, OptLevel); 3023 CodeGenOpt::Level OptLevel) { 3031 ScheduleDAGRRList *SD = new ScheduleDAGRRList(*IS->MF, true, PQ, OptLevel); 162 ScheduleDAGRRList(MachineFunction &mf, bool needlatency, SchedulingPriorityQueue *availqueue, CodeGenOpt::Level OptLevel) argument
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H A D | SelectionDAGBuilder.h | 521 /// OptLevel - What optimization level we're generating code for. 523 CodeGenOpt::Level OptLevel; member in class:llvm::SelectionDAGBuilder 542 DAG(dag), FuncInfo(funcinfo), OptLevel(ol),
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H A D | SelectionDAGISel.cpp | 255 SavedOptLevel = IS.OptLevel; 258 IS.OptLevel = NewOptLevel; 270 if (IS.OptLevel == SavedOptLevel) 274 DEBUG(dbgs() << "\tBefore: -O" << IS.OptLevel 276 IS.OptLevel = SavedOptLevel; 286 CodeGenOpt::Level OptLevel) { 290 if (OptLevel == CodeGenOpt::None || ST.useMachineScheduler() || 292 return createSourceListDAGScheduler(IS, OptLevel); 294 return createBURRListDAGScheduler(IS, OptLevel); 296 return createHybridListDAGScheduler(IS, OptLevel); 285 createDefaultScheduler(SelectionDAGISel *IS, CodeGenOpt::Level OptLevel) argument 1780 IsLegalToFold(SDValue N, SDNode *U, SDNode *Root, CodeGenOpt::Level OptLevel, bool IgnoreChains) argument [all...] |
/external/llvm/lib/CodeGen/ |
H A D | TwoAddressInstructionPass.cpp | 79 CodeGenOpt::Level OptLevel; member in class:__anon25830::TwoAddressInstructionPass 509 if (OptLevel == CodeGenOpt::None) 1095 if (OptLevel == CodeGenOpt::None) 1512 OptLevel = TM.getOptLevel();
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/external/llvm/lib/ExecutionEngine/ |
H A D | ExecutionEngine.cpp | 412 CodeGenOpt::Level OptLevel, 420 .setOptLevel(OptLevel) 463 OptLevel = CodeGenOpt::Default; 409 create(Module *M, bool ForceInterpreter, std::string *ErrorStr, CodeGenOpt::Level OptLevel, bool GVsWithCode) argument
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H A D | ExecutionEngineBindings.cpp | 141 unsigned OptLevel, 147 .setOptLevel((CodeGenOpt::Level)OptLevel); 196 .setOptLevel((CodeGenOpt::Level)options.OptLevel) 229 unsigned OptLevel, 234 OptLevel, OutError); 139 LLVMCreateJITCompilerForModule(LLVMExecutionEngineRef *OutJIT, LLVMModuleRef M, unsigned OptLevel, char **OutError) argument 227 LLVMCreateJITCompiler(LLVMExecutionEngineRef *OutJIT, LLVMModuleProviderRef MP, unsigned OptLevel, char **OutError) argument
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 47 CodeGenOpt::Level OptLevel) 48 : SelectionDAGISel(tm, OptLevel), TM(tm), Subtarget(nullptr), 3031 CodeGenOpt::Level OptLevel) { 3032 return new AArch64DAGToDAGISel(TM, OptLevel); 46 AArch64DAGToDAGISel(AArch64TargetMachine &tm, CodeGenOpt::Level OptLevel) argument 3030 createAArch64ISelDag(AArch64TargetMachine &TM, CodeGenOpt::Level OptLevel) argument
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/external/llvm/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 68 explicit ARMDAGToDAGISel(ARMBaseTargetMachine &tm, CodeGenOpt::Level OptLevel) argument 69 : SelectionDAGISel(tm, OptLevel) {} 410 if (OptLevel == CodeGenOpt::None) 3466 CodeGenOpt::Level OptLevel) { 3467 return new ARMDAGToDAGISel(TM, OptLevel); 3465 createARMISelDag(ARMBaseTargetMachine &TM, CodeGenOpt::Level OptLevel) argument
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H A D | ARMSubtarget.cpp | 438 CodeGenOpt::Level OptLevel, 442 return PostRAScheduler && OptLevel >= CodeGenOpt::Default; 437 enablePostRAScheduler( CodeGenOpt::Level OptLevel, TargetSubtargetInfo::AntiDepBreakMode& Mode, RegClassVector& CriticalPathRCs) const argument
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelDAGToDAG.cpp | 57 CodeGenOpt::Level OptLevel) 58 : SelectionDAGISel(targetmachine, OptLevel), 183 CodeGenOpt::Level OptLevel) { 184 return new HexagonDAGToDAGISel(TM, OptLevel); 56 HexagonDAGToDAGISel(HexagonTargetMachine &targetmachine, CodeGenOpt::Level OptLevel) argument 182 createHexagonISelDag(HexagonTargetMachine &TM, CodeGenOpt::Level OptLevel) argument
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/external/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelDAGToDAG.cpp | 99 MSP430DAGToDAGISel(MSP430TargetMachine &TM, CodeGenOpt::Level OptLevel) argument 100 : SelectionDAGISel(TM, OptLevel), 132 CodeGenOpt::Level OptLevel) { 133 return new MSP430DAGToDAGISel(TM, OptLevel); 360 IsLegalToFold(N1, Op, Op, OptLevel)) { 131 createMSP430ISelDag(MSP430TargetMachine &TM, CodeGenOpt::Level OptLevel) argument
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/external/llvm/lib/Target/Mips/ |
H A D | MipsSubtarget.cpp | 180 MipsSubtarget::enablePostRAScheduler(CodeGenOpt::Level OptLevel, argument 187 return OptLevel >= CodeGenOpt::Aggressive;
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