| a4d1f0ebc411488af45c490725f8e71c06d1b202 |
|
09-Mar-2018 |
David Srbecky <dsrbecky@google.com> |
Support unwinding though the switch interpreter.
Wrap the switch interpreter in small assembly method which defines
DEX PC in CFI and thus it allows libunwind to backtrace through it.
Bug: 22414682
Test: testrunner.py --host -t 137
Test: testrunner.py --target -t 137
(cherry picked from commit 946bb09a5adc7d591498b4504aa5d9354457953e)
Merged-In: I31dad9f0fb446151baaa99234b64f25c8ca2fa87
Change-Id: I4b5239af24480f7314336b4610c3c50641ed50ed
|
| e26c6ff5c28f803406a5bcbda8ac27a4e718fde6 |
|
22-Feb-2018 |
Peter Collingbourne <pcc@google.com> |
reserve x18 (not for submit)
Test: manual
Change-Id: Idb8ab56483c0be624c20f9ae6987dacc25d73bfc
(cherry picked from commit 9da4ec444c0c4894952c65d168ab12a8315f7a7a)
|
| a26f4169b73d9c555a70fd8281f1d7b3add2c058 |
|
02-Mar-2018 |
Vladimir Marko <vmarko@google.com> |
ARM64: Rewrite art_quick_osr_stub for unwinder.
Test: Pixel 2 XL boots.
Test: testrunner.py --target --jit --64 570-checker-osr
Test: Run the above test under gdb, break in the stub and
manually check that "bt 3" works correctly at every
instruction and "bt 4" works in called methods if we
also pass -Xcompiler-option --generate-debug-info.
Bug: 73954823
Change-Id: I49b589d3079e5d3cc13280d2c998606e1cbb75a7
|
| bff7a52e2c6c9e988c3ed1f12a2da0fa5fd37cfb |
|
25-Jan-2018 |
Nicolas Geoffray <ngeoffray@google.com> |
Revert "Compiler changes for bitstring based type checks."
Bug: 64692057
Bug: 71853552
Bug: 26687569
This reverts commit eb0ebed72432b3c6b8c7b38f8937d7ba736f4567.
Change-Id: I7daeaa077960ba41b2ed42bc47f17501621be4be
|
| eb0ebed72432b3c6b8c7b38f8937d7ba736f4567 |
|
10-Jan-2018 |
Vladimir Marko <vmarko@google.com> |
Compiler changes for bitstring based type checks.
We guard the use of this feature with a compile-time flag,
set to true in this CL.
Boot image size for aosp_taimen-userdebug in AOSP master:
- before:
arm boot*.oat: 63604740
arm64 boot*.oat: 74237864
- after:
arm boot*.oat: 63531172 (-72KiB, -0.1%)
arm64 boot*.oat: 74135008 (-100KiB, -0.1%)
The new TypeCheckBenchmark yields the following changes
using the little cores of taimen fixed at 1.4016GHz:
32-bit 64-bit
timeCheckCastLevel1ToLevel1 11.48->15.80 11.47->15.78
timeCheckCastLevel2ToLevel1 15.08->15.79 15.08->15.79
timeCheckCastLevel3ToLevel1 19.01->15.82 17.94->15.81
timeCheckCastLevel9ToLevel1 42.55->15.79 42.63->15.81
timeCheckCastLevel9ToLevel2 39.70->14.36 39.70->14.35
timeInstanceOfLevel1ToLevel1 13.74->17.93 13.76->17.95
timeInstanceOfLevel2ToLevel1 17.02->17.95 16.99->17.93
timeInstanceOfLevel3ToLevel1 24.03->17.95 24.45->17.95
timeInstanceOfLevel9ToLevel1 47.13->17.95 47.14->18.00
timeInstanceOfLevel9ToLevel2 44.19->16.52 44.27->16.51
This suggests that the bitstring typecheck should not be
used for exact type checks which would be equivalent to the
"Level1ToLevel1" benchmark. Whether the implementation is
a beneficial replacement for the kClassHierarchyCheck and
kAbstractClassCheck on average depends on how many levels
from the target class (or Object for a negative result) is
a typical object's class.
Test: m test-art-host-gtest
Test: testrunner.py --host --optimizing --jit
Test: testrunner.py --host -t 670-bitstring-type-check
Test: Pixel 2 XL boots.
Test: testrunner.py --target --optimizing --jit
Test: testrunner.py --target -t 670-bitstring-type-check
Bug: 64692057
Bug: 71853552
Bug: 26687569
Change-Id: I538d7e036b5a8ae2cc3fe77662a5903d74854562
|
| bf92b3f2d3374eab6bc40cc41574b51aae5a3718 |
|
17-Jan-2018 |
Vladimir Marko <vmarko@google.com> |
Clean up art_quick_check_instance_of entrypoints.
Test: Rely on TreeHugger.
Change-Id: I848b8b711ac6bfa90999701a518e2e70b42c3d57
|
| 809f5b1652eb68ad496af138370d2cc198510322 |
|
04-Jan-2018 |
Roland Levillain <rpl@google.com> |
Explicitly document functions generated with macro ART_GET_FIELD_FROM_CODE.
The ART_GET_FIELD_FROM_CODE macro is used to generate the following
set of functions:
art{Get,Set}<Kind>{Static,Instance}FromCode
art{Get,Set}<Kind>{Static,Instance}FromCompiledCode
where <Kind> is in {Byte,Boolean,Short,Char,32,64,Obj}.
However, finding the definitions of these functions from their names
was difficult, as these definitions (and their name) are
generated. This change explicitly mentions the name of the functions
generated with macro ART_GET_FIELD_FROM_CODE in a commment, in order
to improve their grep-ability.
Test: mmma art
Change-Id: I22bf4851c562801c491ccdea2d9d9c9f965b9a6f
|
| 2196c651ecc77e49992c6c329dfce45f78ff46cb |
|
30-Nov-2017 |
Vladimir Marko <vmarko@google.com> |
Revert^4 "JIT JNI stubs."
The original CL,
https://android-review.googlesource.com/513417 ,
has a bug fixed in the Revert^2,
https://android-review.googlesource.com/550579 ,
and this Revert^4 adds two more fixes:
- fix obsolete native method getting interpreter
entrypoint in 980-redefine-object,
- fix random JIT GC flakiness in 667-jit-jni-stub.
Test: testrunner.py --host --prebuild --no-relocate \
--no-image --jit -t 980-redefine-object
Bug: 65574695
Bug: 69843562
This reverts commit 056d7756152bb3ced81dd57781be5028428ce2bd.
Change-Id: Ic778686168b90e29816fd526e23141dcbe5ea880
|
| 056d7756152bb3ced81dd57781be5028428ce2bd |
|
30-Nov-2017 |
Nicolas Geoffray <ngeoffray@google.com> |
Revert "Revert "Revert "JIT JNI stubs."""
Still seeing occasional failures on 667-jit-jni-stub
Bug: 65574695
Bug: 69843562
This reverts commit e7441631a11e2e07ce863255a59ee4de29c6a56f.
Change-Id: I3db751679ef7bdf31c933208aaffe4fac749a14b
|
| e7441631a11e2e07ce863255a59ee4de29c6a56f |
|
29-Nov-2017 |
Vladimir Marko <vmarko@google.com> |
Revert "Revert "JIT JNI stubs.""
The original CL,
https://android-review.googlesource.com/513417 ,
had a bug for class unloading where a read barrier was
executed at the wrong time from
ConcurrentCopying::MarkingPhase() ->
ClassLinker::CleanupClassLoaders() ->
ClassLinker::DeleteClassLoader() ->
JitCodeCache::RemoveMethodsIn() ->
JitCodeCache::JniStubKey::UpdateShorty() ->
ArtMethod::GetShorty().
This has been fixed by removing sources of the read barrier
from ArtMethod::GetShorty().
Test: testrunner.py --host --prebuild --jit --no-relocate \
--no-image -t 998-redefine-use-after-free
Bug: 65574695
Bug: 69843562
This reverts commit 47d31853e16a95393d760e6be2ffeeb0193f94a1.
Change-Id: I06e7a15b09d9ff11cde15a7d1529644bfeca15e0
|
| 47d31853e16a95393d760e6be2ffeeb0193f94a1 |
|
28-Nov-2017 |
Vladimir Marko <vmarko@google.com> |
Revert "JIT JNI stubs."
Seems to break 998-redefine-use-after-free in
some --no-image configuration.
Bug: 65574695
Bug: 69843562
This reverts commit 3417eaefe4e714c489a6fb0cb89b4810d81bdf4d.
Change-Id: I2dd157b931c17c791522ea2544c1982ed3519b86
|
| 3417eaefe4e714c489a6fb0cb89b4810d81bdf4d |
|
21-Sep-2017 |
Vladimir Marko <vmarko@google.com> |
JIT JNI stubs.
Allow the JIT compiler to compile JNI stubs and make sure
they can be collected once they are not in use anymore.
Test: 667-jit-jni-stub
Test: Pixel 2 XL boots.
Test: m test-art-host-gtest
Test: testrunner.py --host --jit
Test: testrunner.py --target --jit
Bug: 65574695
Change-Id: Idf81f50bcfa68c0c403ad2b49058be62b21b7b1f
|
| 43f0cdbe3281cd5c9a33d5472b1538e5617f6691 |
|
10-Oct-2017 |
Orion Hodson <oth@google.com> |
ART: Intrinsify polymorphic signature methods
Adds VarHandle accessor method to list of intrinsics.
Adds code to interpreter to ensure intrinsics with polymorphic
signatures are initialized.
Rename most uses of InvokePolymorphic to InvokeMethodHandle (and
similar changes) to be clear that the particular code path applies to
MethodHandle instances rather than VarHandle.
Change-Id: Ib74865124a1e986badc0a7c4bb3d782af07225d4
Bug: 65872996
Test: art/test.py --host
|
| 2ee17909eadd7155f4a7751c38398b36fc267f04 |
|
30-Aug-2017 |
Mingyao Yang <mingyao@google.com> |
Revert^4 "Allow deoptimization when returning from a runtime method."
This reverts commit 07c7028e518b98d3267a77dfe0d149db1adbe858.
Need some special treatment of string init's shorty.
Test: run-test/gtest on both host and target
Test: 597-deopt-busy-loop, 597-deopt-invoke-stub
Bug: 33616143
Change-Id: Id4c64910acfdd088835b6db6fc503e6ade0218e7
|
| 07c7028e518b98d3267a77dfe0d149db1adbe858 |
|
30-Aug-2017 |
Nicolas Geoffray <ngeoffray@google.com> |
Revert "Revert "Revert "Allow deoptimization when returning from a runtime method."""
Bug: 33616143
deopt string test still failing on occasion.
This reverts commit 047abb20d02546d3dd6e8630befc31e5568fa90e.
Change-Id: I89fc28696290da52317d0e3dd07ecf0d1bdac823
|
| 5122e6ba34d46851cd89f2ad55bf6bb067e038d6 |
|
17-Aug-2017 |
Vladimir Marko <vmarko@google.com> |
ART: Remove ArtMethod::dex_cache_resolved_methods_.
Test: m test-art-host-gtest
Test: testrunner.py --host
Test: testrunner.py --target on Nexus 6P
Test: Repeat the above tests with ART_HEAP_POISONING=true
Test: Build aosp_mips64-eng
Change-Id: I9cd0b8aa5001542b0863cccfca4f9c1cd4d25396
|
| 047abb20d02546d3dd6e8630befc31e5568fa90e |
|
24-Aug-2017 |
Mingyao Yang <mingyao@google.com> |
Revert "Revert "Allow deoptimization when returning from a runtime method.""
This reverts commit 2b87ae0073256e909e15f464300912552e58ee48.
For an invocation runtime method such as quick-to-interpreter bridge,
add a special stack walk to get the shorty for the invoked method.
Test: run-test/gtest on both host and target, and 597-deopt-runtime-method.
Bug: 33616143
Change-Id: I53ae93880f62c95dcf48005239b925d7f7b11eb6
|
| 2b87ae0073256e909e15f464300912552e58ee48 |
|
23-Aug-2017 |
Vladimir Marko <vmarko@google.com> |
Revert "Allow deoptimization when returning from a runtime method."
Reason for revert:
Some tests failing even after a minor fix.
This reverts commit edeba10d523c3e283ab939a16c7203af32c7707e.
Change-Id: I6407c9b489c016d19a12c28d1da0efa55ad554a7
|
| edeba10d523c3e283ab939a16c7203af32c7707e |
|
12-Apr-2017 |
Mingyao Yang <mingyao@google.com> |
Allow deoptimization when returning from a runtime method.
This CL patches the return pc of a runtime method to allow the top
Java frame to be deoptimized. This should fix the issue that debugger
cannot break in a busy loop. It also means we can now do full async
deoptimization, if we want to enable it by letting environment keep
registers live.
art_quick_instrumentation_exit and art_quick_deoptimize now need to save
all registers since some compiler slow paths assume runtime methods save
everything.
Some special handling needs to be done to decide whether dex_pc should
be advanced when deoptimized back to interpreter.
Test: run-test/gtest on both host and target, and 597-deopt-runtime-method.
Bug: 33616143
Change-Id: I2e2c199998825afd5057f7deadfc8fa203ce1936
|
| 0a87a653a296854c9a0abacd9bb1557ee4c4d05d |
|
12-Apr-2017 |
Mingyao Yang <mingyao@google.com> |
Add two special runtime methods.
This is in preparation for being able to deoptimize upon returning
from a runtime method. We need to identify two special runtime methods:
clinit and suspend-check since if deoptimization happens when returning
from these two methods, we need to execute the dex instruction that
corresponds to the dex pc of the deoptimization point. A clinit can
be implicit for an invoke-static, in which case the invocation hasn't
happen yet so we have to execute the invoke-static in the interpreter.
For a suspend-check, the dex instruction for it hasn't been executed yet.
Test: full run-test/gtest on both host and target.
Bug: 33616143
Change-Id: Id1bdfcfa84a9ca27d5ee9da4b4a99467b1a4a845
|
| ec9ce6b788dc3b54905af45277fca03e8e428f24 |
|
06-Jul-2017 |
Vladimir Marko <vmarko@google.com> |
Hash-based DexCache methods array.
Total boot*.art size for aosp_angler-userdebug:
- arm64:
- before: 11603968
- after: 10129408 (-1.4MiB, -12.7%)
- arm:
- before: 8626176
- after: 7888896 (-0.7MiB, -8.5%)
Test: m test-art-host-gtest
Test: testrunner.py --host
Test: Nexus 6P boots.
Test: testrunner.py --target
Test: Build aosp_mips64-eng
Bug: 30627598
(cherry picked from commit 07bfbace6f835e6c748fd68ec7624992478b16c1)
Change-Id: I8e2b235038ffbe32112cc59c45a7cee5a08838c3
|
| 07bfbace6f835e6c748fd68ec7624992478b16c1 |
|
06-Jul-2017 |
Vladimir Marko <vmarko@google.com> |
Hash-based DexCache methods array.
Total boot*.art size for aosp_angler-userdebug:
- arm64:
- before: 11603968
- after: 10129408 (-1.4MiB, -12.7%)
- arm:
- before: 8626176
- after: 7888896 (-0.7MiB, -8.5%)
Test: m test-art-host-gtest
Test: testrunner.py --host
Test: Nexus 6P boots.
Test: testrunner.py --target
Test: Build aosp_mips64-eng
Bug: 30627598
Change-Id: I7f858605de5f074cbd7f0d9c4c072fbd44aee28f
|
| 97c46466aea25ab63a99b3d1afc558f0d9f55abb |
|
11-May-2017 |
Roland Levillain <rpl@google.com> |
Introduce a Marking Register in ARM64 code generation.
When generating code for ARM64, maintain the status of
Thread::Current()->GetIsGcMarking() in register X20,
dubbed MR (Marking Register), and check the value of that
register (instead of loading and checking a read barrier
marking entrypoint) in read barriers.
Test: m test-art-target
Test: m test-art-target with tree built with ART_USE_READ_BARRIER=false
Test: ARM64 device boot test
Bug: 37707231
Change-Id: Ibe9bc5c99a2176b0a0476e9e9ad7fcc9f745017b
|
| a77f3c91ad7bd46fff8e98f582eef216892219b9 |
|
02-Jul-2017 |
Nicolas Geoffray <ngeoffray@google.com> |
ARM64: Restore FP registers in read barrier thunk.
bug: 62612946
Test: 658-fp-read-barrier
Test: run-libcore-tests.sh
(cherry picked from commit 7015e76436ff9eb738c9c6070c8fff8e98b3852e)
Change-Id: Id0bc55c21829429cd17a77e4c503971249c107f5
|
| 7015e76436ff9eb738c9c6070c8fff8e98b3852e |
|
02-Jul-2017 |
Nicolas Geoffray <ngeoffray@google.com> |
ARM64: Restore FP registers in read barrier thunk.
bug: 62612946
Test: 658-fp-read-barrier
Test: run-libcore-tests.sh
Change-Id: Ic102ff2459c0dedec9a540bbfed3a759f97ae8a4
|
| b7edcda968bb0cbaa69a3ad387fcd3194f5612be |
|
27-Apr-2017 |
Alex Light <allight@google.com> |
Add method tracing JVMTI callbacks
Add MethodEntryHook and MethodExitHook callbacks and associated
capabilities.
Split --jvmti-stress option in run-test into --jvmti-trace-stress and
--jvmti-redefine-stress to test each different component.
NB 3 differences from RI found:
1) RI will call methodExitHook again if the method exit hook throws
an exception. This can easily cause an infinite loop and the test
is specifically tweaked to prevent this from happening on the RI.
2) RI always includes the method being exited in the stack trace of
errors thrown in the hooks. In ART we will not include the method
if it is native. This is due to the way we call native methods
and would be extremely difficult to change.
3) The RI will allow exceptions thrown in the MethodEnterHook to be
caught by the entered method in some situations. This occurs with
the tryCatchExit test in 989. In ART this does not happen.
Bug: 34414073
Test: ./test.py --host -j40
Test: ART_TEST_FULL=true DEXTER_BINARY="/path/to/dexter" \
./test/testrunner/testrunner.py --host -j40 -t 988
Test: ART_TEST_FULL=true DEXTER_BINARY="/path/to/dexter" \
./test/testrunner/testrunner.py --host -j40 -t 989
Test: lunch aosp_angler-userdebug; \
m -j40 droid build-art && \
fastboot -w flashall && \
./test.py --target -j4
Change-Id: Iab229353fae23c2ea27c2b698c831627a9f861b1
|
| 2f470edaff2a5c55d657a43b54e5188ed2bf1227 |
|
19-May-2017 |
Igor Murashkin <iam@google.com> |
entrypoints: Remove DMBs from art_quick_alloc initialized variants.
Remove the DMBs from the initialized allocation entrypoints only.
This is safe because the compiler now emits "DMB ISHST" that protects
the object for publication.
Non-initialized (resolved) entrypoints still have the "DMB ISH" because
they double as class-initialization checks, so they need to act as a
"acquire-load class status" to ensure any static field reads that follow
the new-instance or new-array would be data-race-free.
(See also b/36692143 to remove redundant barriers for class
initialization checks.)
Bug: 36656456
Bug: 36447861
Change-Id: Ie342c7e7d89febd8420cd42d8c1acf282be54c0f
|
| 79efadfdd861584f1c47654ade975eae6c43c360 |
|
08-May-2017 |
Nicolas Geoffray <ngeoffray@google.com> |
Add runtime reasons for deopt.
Currently to help investigate. Also:
1) Log when deoptimization happens (which method and what reason)
2) Trace when deoptimization happens (to make it visible in systrace)
bug:37655083
Test: test-art-host test-art-target
(cherry picked from commit 4e92c3ce7ef354620a785553bbada554fca83a67)
Change-Id: I992398a1038ab61ea0e5106af6b6ad0a3305312e
|
| 4e92c3ce7ef354620a785553bbada554fca83a67 |
|
08-May-2017 |
Nicolas Geoffray <ngeoffray@google.com> |
Add runtime reasons for deopt.
Currently to help investigate. Also:
1) Log when deoptimization happens (which method and what reason)
2) Trace when deoptimization happens (to make it visible in systrace)
bug:37655083
Test: test-art-host test-art-target
Change-Id: I0c2d87b40db09e8e475cf97a7c784a034c585e97
|
| afdcbcb56d0c2f985d0291c369bbc493eedb05b0 |
|
27-Apr-2017 |
Mathieu Chartier <mathieuc@google.com> |
Remove some hardcoded cases of kCardShift
Also added cpp-define-generator to do this. This makes it easier to
change the GC card size.
Bug: 36457259
Test: test-art-host
Change-Id: I03b59f2bbb9b483280bea34575f5373ec6b15b98
|
| d1ef87339c5af782652678d5849d1dfab14d79ce |
|
18-Apr-2017 |
Vladimir Marko <vmarko@google.com> |
ARM64: Heap poisoning for link-time Baker CC read barrier thunks.
And fix running out of scratch registers for HArraySet
with large constant index and a reference to poison.
Test: Nexus 6P boots with heap poisoning enabled.
Test: testrunner.py --target with heap poisoning enabled on Nexus 6P.
Bug: 29516974
Bug: 30126666
Bug: 36141117
Change-Id: Ifb38f4a0e23a2963468772f34f294febfc340b8c
|
| f4f2daafb38c9c07ea74044a0fb89a2a19288b7a |
|
20-Mar-2017 |
Vladimir Marko <vmarko@google.com> |
ARM64: Use link-time generated thunks for Baker CC read barrier.
Remaining work for follow-up CLs:
- array loads,
- volatile field loads,
- use implicit null check in field thunk.
Test: Added tests to relative_patcher_arm64
Test: New run-test 160-read-barrier-stress
Test: m test-art-target-gtest on Nexus 6P.
Test: testrunner.py --target on Nexus 6P.
Bug: 29516974
Bug: 30126666
Bug: 36141117
Change-Id: Id68ff171c55a3f1bf1ac1b657f480531aa7b3710
|
| dbbbd8d8088cf590e4245368deb15fcdafc63b2f |
|
04-Apr-2017 |
Alex Light <allight@google.com> |
Ensure invoking obsolete methods throws errors.
This sets the entrypoint for obsolete methods to a special stub that
will ensure that calling them results in an Error being thrown.
Previously we were allowing obsolete methods to be run if they could
reach the appropriate places in the runtime.
Getting into the state where this is possible is extremely difficult
since one can only get an jmethodID to an obsolete method by snatching
it off the stack (or by inspecting internal runtime data). From there
normally invoking it will do lookup on the receiver which will get you
the original version.
Bug: 36867251
Bug: 31455788
Test: ./test.py --host -j40
Test: (with aosp_marlin-userdebug device) ./test.py --target -j4
Change-Id: I2ca0503966a4e3de18dd89cb7ff224eba1459b49
(cherry picked from commit db01a091aefbd78b56777f4c2e8c5e3f2d8c2712)
|
| db01a091aefbd78b56777f4c2e8c5e3f2d8c2712 |
|
04-Apr-2017 |
Alex Light <allight@google.com> |
Ensure invoking obsolete methods throws errors.
This sets the entrypoint for obsolete methods to a special stub that
will ensure that calling them results in an Error being thrown.
Previously we were allowing obsolete methods to be run if they could
reach the appropriate places in the runtime.
Getting into the state where this is possible is extremely difficult
since one can only get an jmethodID to an obsolete method by snatching
it off the stack (or by inspecting internal runtime data). From there
normally invoking it will do lookup on the receiver which will get you
the original version.
Bug: 36867251
Bug: 31455788
Test: ./test.py --host -j40
Test: (with aosp_marlin-userdebug device) ./test.py --target -j4
Change-Id: I2ca0503966a4e3de18dd89cb7ff224eba1459b49
|
| b9d0111d5bfc991f545e900099f3a2de732f27de |
|
31-Mar-2017 |
Vladimir Marko <vmarko@google.com> |
ARM64: Faster forwarding address check in mark entrypoints.
Bug: 12687968
Test: testrunner.py --target
Change-Id: I352971ddf8f574e600c054cf2b4c0a973d20f829
|
| 5667f56867383fc4113aa4a6551efdf9f48ee5e7 |
|
28-Feb-2017 |
Jeff Hao <jeffhao@google.com> |
Modify invoke interface trampoline to pass interface method.
This avoids touching the code item in the case that the interface method
is resolved and in the dex cache. If it's not, the trampoline will still
have to go to the code item to try to resolve it.
Bug: 35800981
Test: mm test-art-host
Change-Id: Ia0e1d23429b3b928bcec727f4f2f16b7834408e5
|
| 67eda383545518e79a6aa5185ae8cd841e0a4eec |
|
18-Jan-2017 |
Hans Boehm <hboehm@google.com> |
Improve aarch64 MonitorEntry/Exit assembly code
We make two kinds of changes:
1) We remove some redundant moves, which appeared to have been copied
from some architecture with a 2 address instruction format.
2) We avoid the use of dmb barrier instructions, and instead use
acquire/release instructions for the actual lock loads/updates.
(2) is a clear win on A53/A57, where there seems to be very little
additional cost associated with acquire/release when
used with "exclusive" memory operations, as they are here.
On the cores used in 2016 Pixel phones, the story is more mixed.
But the addition of acquire/release to a pair of exclusive load/store
operations still seems to cost enough less than 2 dmb's, so that
even if 10% of lock acquisitions are nested and unnecessarily
enforce ordering, we come out slightly ahead. ARM's advice for
the future is also to move in this direction.
Test: AOSP boots. AOSP art test failures seem attributable to other
issues.
Change-Id: I2399baeab3df93196471e65612c00d95ad4e2b62
|
| ea4c126a0165c5a4b997986e6e01c7f975642167 |
|
06-Feb-2017 |
Vladimir Marko <vmarko@google.com> |
Change type initialization entrypoints to kSaveEverything.
Also avoid the unnecessary read barriers for boot image
classes with kBssEntry or kJitTableAddress (the kBssEntry
and JIT work missed the `read_barrier_option` flag), fix
bit-rotten non-Baker read barriers on ARM and ARM64 and
fix bit-rotten ARM64 relative patcher's IsAdrpPatch() used
for erratum 843419 workaround.
aosp_angler-userdebug with CC:
before:
arm boot*.oat: 35440420
arm64 boot*.oat: 43504952
after:
arm boot*.oat: 35222292 (-218128, -0.62%)
arm64 boot*.oat: 43389048 (-115904, -0.26%)
aosp_angler-userdebug without CC:
before:
arm boot*.oat: 31927412
arm64 boot*.oat: 39340512
after:
arm boot*.oat: 31708736 (-218676, -0.68%)
arm64 boot*.oat: 39211768 (-128744, -0.33%)
Test: m test-art-host (non-CC, Baker CC, table lookup CC)
Test: m test-art-target on Nexus 6P (non-CC, Baker CC, table lookup CC)
Test: Nexus 6P boots (non-CC, Baker CC, table lookup CC)
Bug: 30627598
Change-Id: Ida5bbce414844de9e4273e40334165d4494230d4
|
| d09584456559f669f5999fb1ff32aa89ebf6ef4e |
|
30-Jan-2017 |
Nicolas Geoffray <ngeoffray@google.com> |
Align allocation entrypoints implementation between arm/arm64/x86/x64.
x64:
- Add art_quick_alloc_initialized_rosalloc
x86:
- Add art_quick_alloc_initialized_rosalloc
- Add art_quick_alloc_initialized{_region}_tlab
- Add art_quick_alloc_array_resolved{8,16,32,64}{_region}_tlab
arm32:
- Add art_quick_alloc_initialized_rosalloc
- Add art_quick_alloc_initialized{_region}_tlab
- Add art_quick_alloc_array_resolved{8,16,32,64}{_region}_tlab
arm64:
- Add art_quick_alloc_initialized_rosalloc
- Add art_quick_alloc_initialized{_region}_tlab
- Add art_quick_alloc_array_resolved{8,16,32,64}_tlab
Test: test-art-target test-art-host
bug: 30933338
Change-Id: I0dd8667a2921dd0b3403bea5d05304ba5d40627f
|
| 5b3c6c0fcca76d82a4c9acb03f7714457ae53dd9 |
|
19-Jan-2017 |
Nicolas Geoffray <ngeoffray@google.com> |
Refactor code for unresolved field entrypoint.
- Do macro magic to avoid source code duplication.
- Do not fetch the referrer from the assembly, but
from the C entrypoint instead.
Test: test-art-host test-art-target
Change-Id: Ib139c94bc8f74686640cad538ba75dc56fa00e1d
|
| b048cb74b742b03eb6dd5f1d6dd49e559f730b36 |
|
23-Jan-2017 |
Nicolas Geoffray <ngeoffray@google.com> |
Add per array size allocation entrypoints.
- Update architectures that have fast paths for
array allocation to use it.
- Will add more fast paths in follow-up CLs.
Test: test-art-target test-art-host.
Change-Id: I138cccd16464a85de22a8ed31c915f876e78fb04
|
| 8d91ac31ccb92557e434d89ffade3372466e1af5 |
|
18-Jan-2017 |
Nicolas Geoffray <ngeoffray@google.com> |
Remove unused array entrypoints.
Test: test-art-host test-art-target
Change-Id: I910d1c912c7c9056ecea0e1e7da7afb2a7220dfa
|
| e761bccf9f0d884cc4d4ec104568cef968296492 |
|
19-Jan-2017 |
Nicolas Geoffray <ngeoffray@google.com> |
Revert "Revert "Load the array class in the compiler for allocations.""
This reverts commit fee255039e30c1c3dfc70c426c3d176221c3cdf9.
Change-Id: I02b45f9a659d872feeb35df40b42c1be9878413a
|
| fee255039e30c1c3dfc70c426c3d176221c3cdf9 |
|
19-Jan-2017 |
Hiroshi Yamauchi <yamauchi@google.com> |
Revert "Load the array class in the compiler for allocations."
libcore test fails.
This reverts commit cc99df230feb46ba717252f002d0cc2da6828421.
Change-Id: I5bac595acd2b240886062e8c1f11f9095ff6a9ed
|
| cc99df230feb46ba717252f002d0cc2da6828421 |
|
18-Jan-2017 |
Nicolas Geoffray <ngeoffray@google.com> |
Load the array class in the compiler for allocations.
Removing one other dependency for needing to pass
the current method, and having dex_cache_resolved_types_
in ArtMethod.
oat file increase:
- x64: 0.25%
- arm32: 0.30%
- x86: 0.28%
test: test-art-host, test-art-target
Change-Id: Ibca4fa00d3e31954db2ccb1f65a584b8c67cb230
|
| 39cee66a8ddf0254626c9591662cf87e4a1cedc4 |
|
13-Jan-2017 |
Nicolas Geoffray <ngeoffray@google.com> |
Entrypoints cleanup.
Remove unused ones to facilitate the transition to compressed
dex caches.
test: test-art-host, test-art-target
Change-Id: I1d1cb0daffa86dd9dda2eaa3c1ea3650a5c8d9d0
|
| ac141397dc29189ad2b2df41f8d4312246beec60 |
|
13-Jan-2017 |
Orion Hodson <oth@google.com> |
Revert "Revert "ART: Compiler support for invoke-polymorphic.""
This reverts commit 0fb5af1c8287b1ec85c55c306a1c43820c38a337.
This takes us back to the original change and attempts to fix the
issues encountered:
- Adds transition record push/pop around artInvokePolymorphic.
- Changes X86/X64 relocations for MacSDK.
- Implements MIPS entrypoint for art_quick_invoke_polymorphic.
- Corrects size of returned reference in art_quick_invoke_polymorphic
on ARM.
Bug: 30550796,33191393
Test: art/test/run-test 953
Test: m test-art-run-test
Change-Id: Ib6b93e00b37b9d4ab743a3470ab3d77fe857cda8
|
| 0d3998b5ff619364acf47bec0b541e7a49bd6fe7 |
|
12-Jan-2017 |
Nicolas Geoffray <ngeoffray@google.com> |
Revert "Revert "Make object allocation entrypoints only take a class.""
This reverts commit f7aaacd97881c6924b8212c7f8fe4a4c8721ef53.
Change-Id: I6756cd1e6110bb45231f62f5e388f16c044cb145
|
| f7aaacd97881c6924b8212c7f8fe4a4c8721ef53 |
|
12-Jan-2017 |
Hiroshi Yamauchi <yamauchi@google.com> |
Revert "Make object allocation entrypoints only take a class."
960-default-smali64 is failing.
This reverts commit 2b615ba29c4dfcf54aaf44955f2eac60f5080b2e.
Change-Id: Iebb8ee5a917fa84c5f01660ce432798524d078ef
|
| 0fb5af1c8287b1ec85c55c306a1c43820c38a337 |
|
11-Jan-2017 |
Orion Hodson <oth@google.com> |
Revert "ART: Compiler support for invoke-polymorphic."
This reverts commit 02e3092f8d98f339588e48691db77f227b48ac1e.
Reasons for revert:
- Breaks MIPS/MIPS64 build.
- Fails under GCStress test on x64.
- Different x64 build configuration doesn't like relocation.
Change-Id: I512555b38165d05f8a07e8aed528f00302061001
|
| 02e3092f8d98f339588e48691db77f227b48ac1e |
|
01-Dec-2016 |
Orion Hodson <oth@google.com> |
ART: Compiler support for invoke-polymorphic.
Adds basic support to invoke method handles in compiled code.
Enables method verification for methods containing invoke-polymorphic.
Adds k45cc/k45rc output to Instruction::DumpString() which
was found to be missing when enabling verification.
Include stack traces in test 957-methodhandle-transforms for
failures so they can be easily identified.
Bug: 30550796,33191393
Test: art/test/run-test 953
Test: m test-art-run-test
Change-Id: Ic9a96ea24906087597d96ad8159a5bc349d06950
|
| 2b615ba29c4dfcf54aaf44955f2eac60f5080b2e |
|
06-Jan-2017 |
Nicolas Geoffray <ngeoffray@google.com> |
Make object allocation entrypoints only take a class.
Change motivated by:
- Dex cache compression: having the allocation fast path do a
dex cache lookup will be too expensive. So instead, rely on the
compiler having direct access to the class (either through BSS for
AOT, or JIT tables for JIT).
- Inlining: the entrypoints relied on the caller of the allocation to
have the same dex cache as the outer method (stored at the bottom of
the stack). This meant we could not inline methods from a different
dex file that do allocations. By avoiding the dex cache lookup in
the entrypoint, we can now remove this restriction.
Code expansion on average for Docs/Gms/FB/Framework (go/lem numbers):
- Around 0.8% on arm64
- Around 1% for x64, arm
- Around 1.5% on x86
Test: test-art-host, test-art-target, ART_USE_READ_BARRIER=true/false
Test: test-art-host, test-art-target, ART_DEFAULT_GC_TYPE=SS ART_USE_TLAB=true
Change-Id: I41f3748bb4d251996aaf6a90fae4c50176f9295f
|
| 112aa1088cf283d57c533be17d79c4b638665651 |
|
01-Dec-2016 |
Vladimir Marko <vmarko@google.com> |
Mterp/arm64: Add CFI directives.
Also add two bug 31975598 workarounds to arm64 entrypoints.
Test: m ART_TEST_INTERPRETER=true test-art-target
Bug: 31456348
Bug: 31975598
Change-Id: Ibf64160cf3b3f1ef644ff8f051ab7dc89643acf3
|
| fbc75db230ff393ea1d0f2dcacd7a6fb71556cce |
|
10-Nov-2016 |
Nicolas Geoffray <ngeoffray@google.com> |
Remove the fast path in art_quick_resolve_string.
The stub is now only being used in very rare cases. A follow-up
change will remove the string dex cache from java.lang.Class.
0% performance regression on x86/x64/arm/arm64
Some performance regression expected on mips (which always calls
the stub).
Test: test-art-host test-art-target
Change-Id: I1f410924ef2f7d82eb3b39b4d52c283825306d2a
|
| fdaf0f45510374d3a122fdc85d68793e2431175e |
|
13-Oct-2016 |
Vladimir Marko <vmarko@google.com> |
Change string compression encoding.
Encode the string compression flag as the least significant
bit of the "count" field, with 0 meaning compressed and 1
meaning uncompressed.
The main vdex file is a tiny bit larger (+28B for prebuilt
boot images, +32 for on-device built images) and the oat
file sizes change. Measured on Nexus 9, AOSP ToT, these
changes are insignificant when string compression is
disabled (-200B for the 32-bit boot*.oat for prebuilt boot
image, -4KiB when built on the device attributable to
rounding, -16B for 64-bit boot*.oat for prebuilt boot image,
no change when built on device) but with string compression
enabled we get significant differences:
prebuilt multi-part boot image:
- 32-bit boot*.oat: -28KiB
- 64-bit boot*.oat: -24KiB
on-device built single boot image:
- 32-bit boot.oat: -32KiB
- 64-bit boot.oat: -28KiB
The boot image oat file overhead for string compression:
prebuilt multi-part boot image:
- 32-bit boot*.oat: before: ~80KiB after: ~52KiB
- 64-bit boot*.oat: before: ~116KiB after: ~92KiB
on-device built single boot image:
- 32-bit boot.oat: before: 92KiB after: 60KiB
- 64-bit boot.oat: before: 116KiB after: 92KiB
The differences in the SplitStringBenchmark seem to be lost
in the noise.
Test: Run ART test suite on host and Nexus 9 with Optimizing.
Test: Run ART test suite on host and Nexus 9 with interpreter.
Test: All of the above with string compression enabled.
Bug: 31040547
Change-Id: I7570c2b700f1a31004a2d3c18b1cc30046d35a74
|
| b99f4d6463e7cb5654af3893ed7b3113665df658 |
|
08-Nov-2016 |
Mathieu Chartier <mathieuc@google.com> |
Change check cast entrypoint to check instance of
Reduces code size since we do not need to reload class before
calling slow path.
TODO: Delete read barriers in the check cast code since the slow
path will retry with the proper read barriers if the check fails.
Bug: 12687968
Bug: 29516974
Test: test-art-host + test-art-target with CC
Change-Id: Ia4eb9bbe3fe2d2016e44523cf0451210828d7b88
|
| 6f198e3fde6fe0009c1f333c283c6d1cb4fa9b55 |
|
03-Nov-2016 |
Mathieu Chartier <mathieuc@google.com> |
Add forwarding address checks for X86, arm, arm64
Added to READ_BARRIER_MARK_REG.
Bug: 30162165
Test: test-art-host, test-art-target
Change-Id: I15cf0d51ed3d22fa401e80ffac3877d61593527c
|
| 94ce9c2f41ea198f5fdcfc09c48b9984c95a9c61 |
|
30-Sep-2016 |
Vladimir Marko <vmarko@google.com> |
Change pResolveString entrypoint to kSaveEverything.
Test: Run ART test suite including gcstress on host and Nexus 9.
Test: Run ART test suite including gcstress with baker CC on host and Nexus 9.
Bug: 20323084
Change-Id: I63c21a7d3be8ff7a5765b5003c85b5317635efe6
|
| 0576575d075e97a227010b4adf74ad5c8a920bde |
|
10-Sep-2016 |
jessicahandojo <jessicahandojo@google.com> |
String Compression for ARM and ARM64
Changes on intrinsics and Code Generation on ARM and ARM64
for string compression feature. Currently the feature is off.
The size of boot.oat and boot.art for ARM before and after the
changes (feature OFF) are still. When the feature ON,
boot.oat increased by 0.60% and boot.art decreased by 9.38%.
Meanwhile for ARM64, size of boot.oat and boot.art before and
after changes (feature OFF) are still. When the feature ON,
boot.oat increased by 0.48% and boot.art decreased by 6.58%.
Turn feature on: runtime/mirror/string.h (kUseStringCompression = true)
runtime/asm_support.h (STRING_COMPRESSION_FEATURE 1)
Test: m -j31 test-art-target
All tests passed both when the mirror::kUseStringCompression
is ON and OFF.
Bug: 31040547
Change-Id: I24e86b99391df33ba27df747779b648c5a820649
|
| 804b03ffb9b9dc6cc3153e004c2cd38667508b13 |
|
14-Sep-2016 |
Vladimir Marko <vmarko@google.com> |
Change remaining slow path throw entrypoints to save everything.
Change DivZeroCheck, BoundsCheck and explicit NullCheck
slow path entrypoints to conform to kSaveEverything.
On Nexus 9, AOSP ToT, the boot.oat size reduction is
prebuilt multi-part boot image:
- 32-bit boot.oat: -12KiB (-0.04%)
- 64-bit boot.oat: -24KiB (-0.06%)
on-device built single boot image:
- 32-bit boot.oat: -8KiB (-0.03%)
- 64-bit boot.oat: -16KiB (-0.04%)
Test: Run ART test suite including gcstress on host and Nexus 9.
Test: Manually disable implicit null checks and test as above.
Change-Id: If82a8082ea9ae571c5d03b5e545e67fcefafb163
|
| 908eb22e49edc9fe070afe5ab44a5d07299dc976 |
|
14-Sep-2016 |
Vladimir Marko <vmarko@google.com> |
ARM/ARM64: Fix throwing entrypoints to call runtime handlers.
Test: Run ART test suite including gcstress on Nexus 9.
Bug: 31468464
Change-Id: I2521675125d243be3168a2e87b70185791322b42
|
| 05846475c8d48ce191dcd333c76d5ccc17aea9dd |
|
14-Sep-2016 |
Vladimir Marko <vmarko@google.com> |
Remove ThrowNoSuchMethod entrypoint.
Run ART test suite on host and Nexus 6.
Bug: 31464666
Change-Id: I5aa737726031adae0b132f759cf802a93d581a7f
|
| 3b7537bfc5a6b7ccb18b3970d8edf14b72464af7 |
|
13-Sep-2016 |
Vladimir Marko <vmarko@google.com> |
Revert "Revert "Use implicit null checks inside try blocks.""
Fix implicit checks in try blocks to emit stack maps.
Fix arm64 null expection from signal entrypoint to call
the runtime handler instead or simply jumping there.
On Nexus 9, AOSP ToT, the boot.oat size reduction is
prebuilt multi-part boot image:
- 32-bit boot.oat: -448KiB (-1.3%)
- 64-bit boot.oat: -528KiB (-1.2%)
on-device built single boot image:
- 32-bit boot.oat: -448KiB (-1.4%)
- 64-bit boot.oat: -528KiB (-1.3%)
Note that the oat files no longer contain dex files which
have been moved to vdex, so the percentages are not directly
comparable with the those reported in the original commit.
Test: Run ART test suite including gc-stress on host and Nexus 9.
Bug: 30212852
Bug: 31468464
This reverts commit 0719b5b9b458cb3eb9f0823f0dacdfe1a71214dd.
Change-Id: If8a9da8c11adf2aad203e93b6684ce16ed776285
|
| 0719b5b9b458cb3eb9f0823f0dacdfe1a71214dd |
|
13-Sep-2016 |
Nicolas Geoffray <ngeoffray@google.com> |
Revert "Use implicit null checks inside try blocks."
Fails gcstress tests.
This reverts commit 7aa7560683626c7893011271c241b3265ded1dc3.
Change-Id: I4f5c89048b9ffddbafa02f3001e329ff87058ca2
|
| 7aa7560683626c7893011271c241b3265ded1dc3 |
|
07-Sep-2016 |
Vladimir Marko <vmarko@google.com> |
Use implicit null checks inside try blocks.
Make implicit null check entrypoint save all registers, use
platform-specific approach to still pass the fault address.
Allow implicit null checks in try blocks.
On Nexus 9, AOSP ToT, the boot.oat size reduction is
prebuilt multi-part boot image:
- 32-bit boot.oat: -452KiB (-0.7%)
- 64-bit boot.oat: -482KiB (-0.7%)
on-device built single boot image:
- 32-bit boot.oat: -444KiB (-0.7%)
- 64-bit boot.oat: -488KiB (-0.7%)
Test: Run ART test suite on host and Nexus 9.
Test: Build aosp_mips64-eng.
Change-Id: I279f3ab57e2e2f338131c5cac45c51b673bdca19
|
| ae6ba1fd36ef6cd6520354fa874cf9cc2fc5877b |
|
09-Sep-2016 |
Vladimir Marko <vmarko@google.com> |
ARM64: Use macros for increasing and decreasing frame size.
And fix saving/restoring CFI around returns.
Test: m test-art-target on Nexus9.
Change-Id: Iad94ca694ac899adec158ae79a931316a0be46f1
|
| 215076b9f2211f09146d92f6f011fe1787b0b6cd |
|
07-Sep-2016 |
Vladimir Marko <vmarko@google.com> |
ARM64: Use macros for saving/restoring registers in assembly.
And for read barrier entrypoints, store LR conventionally
at the top of the frame instead of having a padding there.
Test: m test-art-target on Nexus 9.
Test: m test-art-target with CC on Nexus 9.
Change-Id: I48eaba3ee71c0629d2cc851fdd802590256a0739
|
| 239d6eaff0cbb5c4c0139f7053a012758799f186 |
|
05-Sep-2016 |
Vladimir Marko <vmarko@google.com> |
Change deoptimize entrypoint to save everything.
And implement FPU register retrieval from stack on x86.
On Nexus 9, AOSP ToT, the boot.oat size reduction is
prebuilt multi-part boot image:
- 32-bit boot.oat: -20KiB (-0.03%)
- 64-bit boot.oat: -45KiB (-0.06%)
on-device built single boot image:
- 32-bit boot.oat: -24KiB (-0.04%)
- 64-bit boot.oat: -36KiB (-0.05%)
Test: Run ART test suite on host and Nexus 9.
Bug: 30212852
Change-Id: I5d98e2a24363136d73dfec6100ab02f8eb101911
|
| 161db1dea4808d32db3623cc1a8e91b53df0fb02 |
|
01-Sep-2016 |
Mathieu Chartier <mathieuc@google.com> |
Use the fast path object size for RosAlloc asm stubs
Also address comments. MemAllocTest perf on N5X speedup in the noise.
Bug: 9986565
Test: test-art-host -j32, N5X booting
Change-Id: Ic22ca92aab88b37fd66928949bf11264ee3476dc
|
| 93bbee0c1c97bd9a5336ed0c9e41cd17613df585 |
|
31-Aug-2016 |
Mathieu Chartier <mathieuc@google.com> |
Faster allocation fast path
Added a new object size field to class, this field contains the
aligned object size if the object is not finalizable and is
initialized. If the object is finalizable or uninitialized the field
is set to some large value that forces the ASM allocators to go slow
path.
Only implemented for region/normal TLAB for now, will add the to
RosAlloc stubs soon.
CC N6P MemAllocTest: 1067 -> 1039 (25 samples)
CC N6P EAAC: 1281 -> 1260 (25 samples)
RAM overhead technically 0 since mirror::Class was not 8 byte aligned
previously. Since the allocators require 8 byte allignment, there
would have been 1 word of padding at the end of the class. If there
was actually 4 extra bytes per class, the system overhead would be
36000 * 4 = 120KB based on old N6P numbers for the number of loaded
classes after boot.
Bug: 9986565
Test: test-art-host CC baker, N6P phone boot and EAAC runs.
Change-Id: I119a87b8cc6c980bff980a0c62f42610dab5e531
|
| e3fbe38a4236a8c6ee52d6285502846b265ed6f3 |
|
30-Aug-2016 |
Mathieu Chartier <mathieuc@google.com> |
Clean up art_quick_resolve_string for arm64
Use ubfx instead of and, add missing cfi directives.
Test: test-art-target-run-test CC baker, N6P phone booting.
Change-Id: I6e0e958fa7d77a37f727a7170f6fe03eecbc7bcc
|
| b6ec5d7d257e00c0d119da48b85f8f5a1f0b09a9 |
|
31-Aug-2016 |
Mathieu Chartier <mathieuc@google.com> |
Fix unnecessary read barrier for resolved/initialized allocations
The caller is responsible for the read barrier for these entrypoints.
No measured change in benchmarks, tested MemAllocTest.
Bug: 12687968
Test: test-art-host CC baker, N6P booting with CC
Change-Id: If6b00fa2c31ff51b943dbbe6caea2ef0a3fa1ae0
|
| 5f404331c0ae5217d35ee8a7be77cde5c54a49de |
|
23-Aug-2016 |
Mathieu Chartier <mathieuc@google.com> |
Improve art_quick_resolve_string for arm64 CC
Check gc_is_marking instead of the mark bit first, this makes it
that we don't go slow path if the GC is not running.
Also reduced the code by a few instructions.
EAAC CC: ~2000 -> 1256
Test: test-art-target-run-test -j4
Bug: 20323084
Change-Id: I57a1f7a52f1909e2e5dd1b2cfd2612b4a642fe37
|
| ead8ba3a427785e74d7a15178e7715c0133519de |
|
08-Aug-2016 |
Christina Wadsworth <cwadsworth@google.com> |
ART: String DexCache asm fast path for ARM64
In the entrypoints, before a string is looked up in the slow path (in
the intern table), I added assembly to check the dex cache and return a
string pointer if the string is already in the dex cache.
Test: test-art-host
Change-Id: Ic9a724848c61e4fa66e82334e2c7b20b13bf8e6c
|
| 40df7c16f591e5ec9a2affe711212fa4855a94a4 |
|
22-Aug-2016 |
Vladimir Marko <vmarko@google.com> |
ARM/ARM64: Improve comments for kSaveEverything assembly.
Addresses post-submit comments for
https://android-review.googlesource.com/255290
Test: Rely on TreeHugger (just adds comments).
Bug: 30212852
Change-Id: I6ccc004774e18bbd83e3940e908cfc6c521142db
|
| 36c2271ab12a1a74dcaef2593982e1f4b42dffc1 |
|
12-Aug-2016 |
Mathieu Chartier <mathieuc@google.com> |
Improve READ_BARRIER_MARK_REG for arm32
Use blocked register IP as scratch, avoid pushing in fast path.
Clean up slow path to not have simpler logic and one less memory
write.
Add simple fast path handling for region space TLAB object
allocation.
Test: test-art-target, N6P booting with CC baker
Bug: 30162165
Change-Id: I6594e42d3d6277ffe7bb79df09df8be6bee85eb5
|
| de5f194bb7c99bb90706497afd9c0f0aa29fa415 |
|
10-Aug-2016 |
Vladimir Marko <vmarko@google.com> |
ARM/ARM64: Improve assembler macros for kSaveEverything frame.
On ARM, use vpush/vpop {d0-d15} instead of {s0-s31}.
On ARM64, use 16-byte aligned stp/ldp for FP registers.
Test: Run ART test suite on Nexus 9.
Bug: 30212852
Change-Id: I36c04d3f1f7e03661c501977c3c9ffa7d2942d2f
|
| 2ee98f2172df27c0e57738e214d7a1f0739ac916 |
|
10-Aug-2016 |
Mathieu Chartier <mathieuc@google.com> |
Fix negative array size checking
Mask out the alignment after the size check. Was broken in previous
CL.
Test: target test 412 --64 with CC + baker
Bug: 30162165
Change-Id: Ic4eb7229fb742490cd9193baf0faa2be6b454f38
|
| fd36f1f927c138575184a1f4c7ea4e7abb3e2dbf |
|
03-Aug-2016 |
Vladimir Marko <vmarko@google.com> |
Rename callee save enumerators.
And related image method enumerators, macros, etc.
Clean up some entrypoint assembly comments.
This is a follow-up to
https://android-review.googlesource.com/252348
Test: Run ART test suite on host and Nexus 9.
Bug: 30212852
Change-Id: I2707342d4255c88c547655be83ed97a67e12ae9e
|
| 8261d02f9523b95013108f271b82bb157ef6f71d |
|
08-Aug-2016 |
Mathieu Chartier <mathieuc@google.com> |
Revert "Revert "ARM64 asm for region space array allocation""
Also added missing large object check. No regression from the check
N6P CC EAAC time at 1313 for 10 samples vs 1314 before reverts.
Bug: 30162165
Bug: 12687968
Test: test-art-target with CC + heap poisoning
This reverts commit 6ae7f3a4541e70f04243a6fe469aa3bd51e16d79.
Change-Id: Ie28f652f619898d7d37eeebf3f31a88af8fac949
|
| 6ae7f3a4541e70f04243a6fe469aa3bd51e16d79 |
|
08-Aug-2016 |
Roland Levillain <rpl@google.com> |
Revert "ARM64 asm for region space array allocation"
This change breaks many tests on the ARM64 concurrent
collector configuration.
Bug: 30162165
Bug: 12687968
This reverts commit f686c3feabe3519bedd1f3001e5dd598f46946ef.
Change-Id: I5d7ef5fa2ffb6a8d9a4d3adbcc14854efa257313
|
| f686c3feabe3519bedd1f3001e5dd598f46946ef |
|
04-Aug-2016 |
Mathieu Chartier <mathieuc@google.com> |
ARM64 asm for region space array allocation
Wrote region space tlab array and array resolved allocators in
assembly code. The speedup is a combined increase from checking the
mark bit and having an assembly fast path.
Added resolved, initialized entrypoints for object region TLAB
allocator.
N6P (960000 mhz) EEAC benchmark (average of 50 samples):
CC 1442.309524 -> 1314 (10% improvement)
CMS: 1382.32
Read barrier slow paths reaching C++ code go from 5M to 2.5M.
Bug: 30162165
Bug: 12687968
Test: With CC: N6P boot, run EAAC, test-art-target
Change-Id: I51515b11ef3f795f57eb72fe0f5759618fef5084
|
| 952dbb19cd094b8bfb01dbb33e0878db429e499a |
|
28-Jul-2016 |
Vladimir Marko <vmarko@google.com> |
Change suspend entrypoint to save all registers.
We avoid the need to save/restore registers in slow paths
and get significant code size savings. On Nexus 9, AOSP:
- 32-bit boot.oat: -1.4MiB (-1.9%)
- 64-bit boot.oat: -2.0MiB (-2.3%)
- other 32-bit oat files in dalvik-cache: -200KiB (-1.7%)
- other 64-bit oat files in dalvik-cache: -2.3MiB (-2.1%)
Test: Run ART test suite on host and Nexus 9 with gc stress.
Bug: 30212852
Change-Id: I7015afc1e7d30341618c9200a3dc9ae277afd134
|
| 36a270ae4f288e49493432b7128f899ad579849e |
|
29-Jul-2016 |
Mathieu Chartier <mathieuc@google.com> |
Change one read barrier bit to mark bit
Optimization to help slow path performance. When the GC marks an
object through the read barrier slow path. The GC sets the mark bit
in the lock word of that reference. This bit is checked from the
assembly entrypoint the common case is that it is set. If the bit is
set, the read barrier knows the object is already marked and there is
no work to do.
To prevent dirty pages in zygote and image, the bit is set by the
image writer and zygote space creation.
EAAC score (lower is better):
N9: 777 -> 700 (average 31 of runs)
N6P (960000 mhz): 1737.48 -> 1442.31 (average of 25 runs)
Bug: 30162165
Bug: 12687968
Test: N9, N6P booting, test-art-host, test-art-target all with CC
Change-Id: Iae0cacfae221e33151d3c0ab65338d1c822ab63d
|
| 4b5f7919842ef88526b9237413bb968a5b6dfeed |
|
21-Jul-2016 |
Mathieu Chartier <mathieuc@google.com> |
Add fast path to arm64 READ_BARRIER macro
EAAC benchmark time from 978.7857143ms to 969.5714286ms on N9 based
on 42 samples. Reduces artReadBarrierSlow calls from 9M to 1M.
Not a huge improvement since we were already checking the lock word in
ReadBarrier::Barrier.
Test: N9 boots, test-art-host, EEAC runs. (All with CC enabled).
Bug: 30162165
Bug: 12687968
Change-Id: Ifb97b52ea84e21c7df83addfb91c5f05f41db32d
|
| 4359e61927866c254bc2d701e3ea4c48de10b79c |
|
20-Jul-2016 |
Roland Levillain <rpl@google.com> |
Move caller-saves saving/restoring to ReadBarrierMarkRegX.
Instead of saving/restoring live caller-save registers
before/after the call to read barrier mark entry points
ReadBarrierMarkRegX, have these entry points save/restore
all the caller-save registers themselves (except register
rX, which contains the return value).
Also refactor the assembly code of these entry points
using macros.
* Boot image code size variation on Nexus 5X
(aosp_bullhead-userdebug build):
- total ARM64 framework Oat files size change:
119196792 bytes -> 115575920 bytes (-3.04%)
- total ARM framework Oat files size change:
100435212 bytes -> 97621188 bytes (-2.80%)
* Benchmarks (ARM64) score variations on Nexus 5X
(aosp_bullhead-userdebug build):
- RitzPerf (lower is better)
- average score difference: -2.71%
- CaffeineMark (higher is better)
- no real difference for most tests
(absolute variation lower than 1%)
- better score on the "Method" benchmark:
score variation 41253 -> 44891 (+8.82%)
Test: ART host and target (ARM, ARM64) tests.
Bug: 29506760
Bug: 12687968
Change-Id: I881bf73139a3f1c2bee9ffc6fc8c00f9a392afa6
|
| 2d857af288e020909a17dee1cb2b6e227a527d67 |
|
18-Jul-2016 |
Mathieu Chartier <mathieuc@google.com> |
Do allocation fence before pushing on allocation stack
Heap::VisitObjects relies on having valid classes for objects in
the allocation stack. If the writes reorder, the thread calling
VisitObjects could see the free list pointer instead of the class
of the object. I believe this is causing crashes in VisitObjects.
Bug: 28790624
Test: Volantis booted
(cherry picked from commit 011dc2c4b9f3a064cba801679aedd3251fe191e3)
Change-Id: Ib620acbcd641ccd59fea9a66f5587c5026110a22
|
| 011dc2c4b9f3a064cba801679aedd3251fe191e3 |
|
18-Jul-2016 |
Mathieu Chartier <mathieuc@google.com> |
Do allocation fence before pushing on allocation stack
Heap::VisitObjects relies on having valid classes for objects in
the allocation stack. If the writes reorder, the thread calling
VisitObjects could see the free list pointer instead of the class
of the object. I believe this is causing crashes in VisitObjects.
Bug: 28790624
Test: Volantis booted
Change-Id: I0f2d4097de1ef3f5caf670ecc977d4d6837872ca
|
| 02b75806a80f8b75c3d6ba2ff97c995117630f36 |
|
13-Jul-2016 |
Roland Levillain <rpl@google.com> |
Introduce more compact ReadBarrierMark slow-paths.
Replace entry point ReadBarrierMark with 32
ReadBarrierMarkRegX entry points, using register
number X as input and output (instead of the standard
runtime calling convention) to save two moves in Baker's
read barrier mark slow-path code.
Test: ART host and target (ARM, ARM64) tests.
Bug: 29506760
Bug: 12687968
Change-Id: I73cfb82831cf040b8b018e984163c865cc44ed87
|
| e8e1127da3f154fae8d2eb16a94203544a182159 |
|
28-Jun-2016 |
Nicolas Geoffray <ngeoffray@google.com> |
Do checks on the fault address when we think it's an NPE.
bug:29321958
Change-Id: I28f4da56eb3e0b48721d3ac41114858bc80daadb
|
| 87f3fcbd0db352157fc59148e94647ef21b73bce |
|
28-Apr-2016 |
Vladimir Marko <vmarko@google.com> |
Replace String.charAt() with HIR.
Replace String.charAt() with HArrayLength, HBoundsCheck and
HArrayGet. This allows GVN on the HArrayLength and BCE on
the HBoundsCheck as well as using the infrastructure for
HArrayGet, i.e. better handling of constant indexes than
the old intrinsic and using the HArm64IntermediateAddress.
Bug: 28330359
Change-Id: I32bf1da7eeafe82537a60416abf6ac412baa80dc
|
| 1f36f411e8f51969f0af95fa60b9809656403c0a |
|
21-Apr-2016 |
Scott Wakeling <scott.wakeling@linaro.org> |
ARM64: Add new String.compareTo intrinsic.
Benchmarked on Nexus6P big, little, and all cores. The new intrinsic
is faster than pStringCompareTo for compare lengths on [1,512], so the
runtime call is no longer needed.
Change-Id: If94bfe24d9bf4dddcca648cc0b563709fc407b34
|
| c7ed09bd5d6f2c7af3bcba1c39b3f9185af68796 |
|
26-Apr-2016 |
Andreas Gampe <agampe@google.com> |
ART: Log all monitor operations to systrace
Add a VLOG option ("-verbose:systrace-locks") to log all monitor
operations to systrace. This requires non-fastpath thread
entrypoints, and ATRACE tags for locking and unlocking.
Do a bit of cleanup to the entrypoint initialization to share
common setup.
Bug: 28423466
(cherry picked from commit fc6898769ae1ef91ec3e41c0a273401213cb82cd)
Change-Id: Ie67e4aa946ec15f8fcf8cb7134c5d3cff0119ab3
|
| fc6898769ae1ef91ec3e41c0a273401213cb82cd |
|
26-Apr-2016 |
Andreas Gampe <agampe@google.com> |
ART: Log all monitor operations to systrace
Add a VLOG option ("-verbose:systrace-locks") to log all monitor
operations to systrace. This requires non-fastpath thread
entrypoints, and ATRACE tags for locking and unlocking.
Do a bit of cleanup to the entrypoint initialization to share
common setup.
Bug: 28423466
Change-Id: Ie67e4aa946ec15f8fcf8cb7134c5d3cff0119ab3
|
| cd77378e668c5d58cf53af33f9c1ca2bf7c1108a |
|
08-Apr-2016 |
Hiroshi Yamauchi <yamauchi@google.com> |
Assembly region TLAB allocation fast path for arm64.
This is for the CC collector.
Share the common fast path code with the tlab fast path code.
Speedup (on N9):
BinaryTrees: 1235 -> 443 ms (-64%)
MemAllocTest: 1647 -> 766 ms (-53%)
Bug: 9986565
Bug: 12687968
Change-Id: I67049cc0b4d6508934f07d039d421ee162b330bf
|
| 59028d90d51a800bcea8be354d77d7be924da3a0 |
|
29-Mar-2016 |
Goran Jakovljevic <Goran.Jakovljevic@imgtec.com> |
MIPS: Improving art_quick_imt_conflict_trampoline
This is fixing stub_test for MIPS32 and MIPS64. This is follow up
change for Ie74d1c77cf73d451a1142bdc5e3683f9f84bb4e7.
Change-Id: I3c53ef690aff49d7cf9ad3de3aaed9a3d2e1c6b9
|
| 796d63050a18f263b93ea34951a61deaecab3422 |
|
13-Mar-2016 |
Nicolas Geoffray <ngeoffray@google.com> |
Add an ImtConflictTable to better resolve IMT conflicts.
- Attach a ImtConflictTable to conflict runtime ArtMethod.
- Initially 0, a new one will be created at the first hit of
the conflict method.
- If the assembly code does not find a target method in the table,
we will create a new one again, copying the data from the previous
table and adding the new mapping.
Implemented for arm/arm64/x86/x64.
bug:27556801
bug:24769046
Change-Id: Ie74d1c77cf73d451a1142bdc5e3683f9f84bb4e7
|
| d72945c6b18831630af8755fcf041f5a59c82cae |
|
16-Mar-2016 |
Hiroshi Yamauchi <yamauchi@google.com> |
Revert "Revert "Assembly TLAB allocation fast path for arm64.""
This reverts commit 52fa2c698b995c21940f366cf3a44204ddf4f8e9.
Fix the mvn instructions.
Bug: 9986565
Change-Id: Ib7b2023cd54c57131442e1de85c64f40b818313d
|
| 52fa2c698b995c21940f366cf3a44204ddf4f8e9 |
|
16-Mar-2016 |
Nicolas Geoffray <ngeoffray@google.com> |
Revert "Assembly TLAB allocation fast path for arm64."
Assembly code does not compile
Bug: 9986565
This reverts commit b7e52b02a82c69e59c88f06945fb21672dfe9923.
Change-Id: I80de1bcd6270e2d76f79cb708811a41c039ea5bb
|
| b7e52b02a82c69e59c88f06945fb21672dfe9923 |
|
10-Mar-2016 |
Hiroshi Yamauchi <yamauchi@google.com> |
Assembly TLAB allocation fast path for arm64.
This is the arm64 version of CL 187537.
Speedup (GSS GC with TLAB on N9):
BinaryTrees: 591 -> 493 ms (-17%)
MemAllocTest: 792 -> 755 ms (-5%)
Bug: 9986565
Change-Id: Icdad28cab0fd835679c640b7eae59b33ac2d6654
|
| 10d4c08c0ea9df0a85a11e1c77974df24078c0ec |
|
24-Feb-2016 |
Hiroshi Yamauchi <yamauchi@google.com> |
Assembly region TLAB allocation fast path for arm.
This is for the CC collector.
Share the common fast path code with the tlab fast path code.
Speedup (on N5):
BinaryTrees: 2291 -> 902 ms (-60%)
MemAllocTest: 2137 -> 1845 ms (-14%)
Bug: 9986565
Bug: 12687968
Change-Id: Ica63094ec2f85eaa4fd04d202a20090399275d85
|
| b331febbab8e916680faba722cc84b66b84218a3 |
|
05-Feb-2016 |
Nicolas Geoffray <ngeoffray@google.com> |
Revert "Revert "Implement on-stack replacement for arm/arm64/x86/x86_64.""
This reverts commit bd89a5c556324062b7d841843b039392e84cfaf4.
Change-Id: I08d190431520baa7fcec8fbdb444519f25ac8d44
|
| bd89a5c556324062b7d841843b039392e84cfaf4 |
|
05-Feb-2016 |
David Brazdil <dbrazdil@google.com> |
Revert "Implement on-stack replacement for arm/arm64/x86/x86_64."
DCHECK whether loop headers are covered fails.
This reverts commit 891bc286963892ed96134ca1adb7822737af9710.
Change-Id: I0f9a90630b014b16d20ba1dfba31ce63e6648021
|
| 891bc286963892ed96134ca1adb7822737af9710 |
|
29-Jan-2016 |
Nicolas Geoffray <ngeoffray@google.com> |
Implement on-stack replacement for arm/arm64/x86/x86_64.
High-level overview:
- osr_method_threshold is used to know when to compile a method
in osr mode (-> treat all loops as irreducible).
- branch instructions in the compiler query whether they can
jump to an osr method.
- An osr entry point is found through the stack maps: if a stack
map is duplicated in the CodeInfo, it is an osr entry point.
Change-Id: Ifb39338cd281e2c7eccce67f4e18d46428be71e4
|
| a7a4759946d9f11c88dc108b2b6a9518ce9c1e18 |
|
24-Nov-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Revert "lambda: Add support for invoke-interface for boxed innate lambdas"
955-lambda is flaky
Bug: 24618608
Bug: 25107649
This reverts commit 457e874459ae638145cab6d572e34d48480e39d2.
(cherry picked from commit 3a0909248e04b22c3981cbf617bc2502ed5b6380)
Change-Id: I24884344d21d7a4262e53e3f5dba57032687ddb7
|
| 3a0909248e04b22c3981cbf617bc2502ed5b6380 |
|
24-Nov-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Revert "lambda: Add support for invoke-interface for boxed innate lambdas"
955-lambda is flaky
Bug: 24618608
Bug: 25107649
This reverts commit 457e874459ae638145cab6d572e34d48480e39d2.
Change-Id: I24884344d21d7a4262e53e3f5dba57032687ddb7
|
| 457e874459ae638145cab6d572e34d48480e39d2 |
|
23-Oct-2015 |
Igor Murashkin <iam@google.com> |
lambda: Add support for invoke-interface for boxed innate lambdas
Lambda closures created with the 'create-lambda' instruction
(termed "innate lambdas") can be turned into an object with 'box-lambda'.
This CL enables support for those kinds of lambdas to work with
'invoke-interface' by generating a proxy class for the lambda.
Note: MIPS32/64 support not included.
Bug: 24618608
Bug: 25107649
Change-Id: Ic8f1bb66ebeaed4097e758a50becf1cff6ccaefb
|
| efea1fc8d8739e58c8b8e70a3b97f2bc9182a59c |
|
05-Aug-2015 |
Przemyslaw Szczepaniak <pszczepaniak@google.com> |
Fixed arm64 string compareto&indexof asm code.
Change-Id: I4a419fe3d3a2d8dc3055961bded1dc4ae456c1ea
|
| 6f6244ab72255daa4c6ec0b2a3f6ba582659e1c2 |
|
22-Oct-2015 |
Hiroshi Yamauchi <yamauchi@google.com> |
Rosalloc fast path in assembly for arm64.
Measurements (N9, ms)
BinaryTrees: 1120 -> 554 (-51%)
MemAllocTest: 1449 -> 1164 (-20%)
Bug: 9986565
Change-Id: I6984c638e7ce2abd2384244debff0dcbac601b69
|
| e460d1df1f789c7c8bb97024a8efbd713ac175e9 |
|
29-Sep-2015 |
Calin Juravle <calin@google.com> |
Revert "Revert "Support unresolved fields in optimizing"
The CL also changes the calling convetion for 64bit static field set
to use kArg2 instead of kArg1. This allows optimizing to keep
the asumptions:
- arm pairs are always of form (even_reg, odd_reg)
- ecx_edx is not used as a register on x86.
This reverts commit e6f49b47b6a4dc9c7684e4483757872cfc7ff1a1.
Change-Id: I93159917565824084abc96775f31be1a4249f2f3
|
| 639bdd13993644a267f177f8f5936496bda65e2b |
|
03-Jun-2015 |
Andreas Gampe <agampe@google.com> |
ART: Single-frame deopt
Add deoptimization of a single frame. Works by removing the managed
code frame and jumping into the quick-to-interpreter bridge, and
the bridge understanding a stored ShadowFrame.
We need a separate fixup pass. For x86, we leave the return address
on the stack so we don't need to push it there.
Bug: 21611912
Change-Id: I06625685ced8b054244f8685ab50b238a705b9d2
|
| 0747466fca310eedea5fc49e37d54f240a0b3c0f |
|
25-Aug-2015 |
Sebastien Hertz <shertz@google.com> |
Revert "Revert "Fix deoptimization with pending exception""
This reverts commit 6e2d5747d00697a25251d25dd33b953e54709507.
Fixes the deoptimization path from compiled code (generated by the
Optimizing compiler) by adding wrapper artDeoptimizeFromCompiledCode.
This wrapper, called through the matching assembler stub
art_quick_deoptimize_from_compiled_code, pushes the deoptimization
context just before deoptimizing the stack.
Bug: 23371176
Bug: 19944235
Change-Id: Ia7082656998aebdd0157438f7e6504c120e10d3e
|
| 6306921722283d2b0f8aac01883ad83215d6e864 |
|
22-Aug-2015 |
Man Cao <manc@google.com> |
Add a missing reader barrier in entrypoint stub
Also refactored some comments.
Change-Id: I5c50f487bf9d71f1be5f6c8814bf039993fc1267
|
| c548ae756a3131b1a7c9abc387697218837e29d3 |
|
27-Jul-2015 |
Chih-Hung Hsieh <chh@google.com> |
ART: Remove unique-numbered labels from arm64 assembly
Use local labels like 1, 2, 3 in macros. Clang does not support
the unique counter variable \@.
Bug: 22799850
Change-Id: I9ef1859be40b875ef4d7ae74ec1af52ad05f7352
|
| c0da7ac6ce579ce019788e312e68f9f16c258b91 |
|
27-Jul-2015 |
Chih-Hung Hsieh <chh@google.com> |
ART: Remove unique-numbered labels from arm64 assembly
Use local labels like 1, 2, 3 in macros. Clang does not support
the unique counter variable \@.
Bug: 22799850
Change-Id: I9ef1859be40b875ef4d7ae74ec1af52ad05f7352
|
| 1aee900d5a0b3a8d78725a7551356bda0d8554e1 |
|
15-Jul-2015 |
Man Cao <manc@google.com> |
Add read barrier support to the entrypoints.
Also remove "THIS_LOAD_REQUIRES_READ_BARRIER" since reading
an ArtMethod* no longer needs read barrier.
stub_test should also work with read barriers now.
Change-Id: I3fba18042de2f867a18dbdc38519986212bd9769
|
| 3031c8da0c5009183f770b005c245f9bf2a4d01b |
|
14-Jul-2015 |
Andreas Gampe <agampe@google.com> |
ART: Remove art_quick_invoke_interface_trampoline
The function has only been used by the IMT conflict resolution
trampoline for a while. Merge the two, which saves a branch.
Change-Id: I2f8c9204adf839ddc5459cc04e70d98f858110a1
|
| e7d876adcfc1977800264ab7540aa488c1568b48 |
|
28-Jun-2015 |
Mathieu Chartier <mathieuc@google.com> |
ART: Fix CFI annotation for art_quick_aput_obj
Fix the CFI state after an early return.
Bug: 22014525
(cherry picked from commit 2738639bcd30b908d825725169b7497ed047debb)
Change-Id: I56b9ba8cf8c47d70a642f064e59c7e04a476dd2f
|
| 2738639bcd30b908d825725169b7497ed047debb |
|
28-Jun-2015 |
Mathieu Chartier <mathieuc@google.com> |
ART: Fix CFI annotation for art_quick_aput_obj
Fix the CFI state after an early return.
Bug: 22014525
Change-Id: I56b9ba8cf8c47d70a642f064e59c7e04a476dd2f
|
| 6b90d42316e0370c789dddb5dda48d7403ea378f |
|
27-Jun-2015 |
Andreas Gampe <agampe@google.com> |
ART: Fix CFI annotation in arm64, x86 and x86-64 assembly
To be able to unroll in the exception case, the state needs to be
reset to before the jump.
Bug: 22014525
Change-Id: Ic60400b5bf0efcb713c24df1728623d072f344ab
|
| bfa5eb6e8d15ea73a36f8df449630f285a91e995 |
|
30-May-2015 |
Hiroshi Yamauchi <yamauchi@google.com> |
Add heap poisoning support to the entrypoints.
In preparation for full compiler/managed-code support.
Enable stub_test with heap poisoning.
Bug: 12687968
Change-Id: I79fc54ce6386c0a1eb9621759bb4cc23bc393a75
|
| 3d21bdf8894e780d349c481e5c9e29fe1556051c |
|
22-Apr-2015 |
Mathieu Chartier <mathieuc@google.com> |
Move mirror::ArtMethod to native
Optimizing + quick tests are passing, devices boot.
TODO: Test and fix bugs in mips64.
Saves 16 bytes per most ArtMethod, 7.5MB reduction in system PSS.
Some of the savings are from removal of virtual methods and direct
methods object arrays.
Bug: 19264997
(cherry picked from commit e401d146407d61eeb99f8d6176b2ac13c4df1e33)
Change-Id: I622469a0cfa0e7082a2119f3d6a9491eb61e3f3d
Fix some ArtMethod related bugs
Added root visiting for runtime methods, not currently required
since the GcRoots in these methods are null.
Added missing GetInterfaceMethodIfProxy in GetMethodLine, fixes
--trace run-tests 005, 044.
Fixed optimizing compiler bug where we used a normal stack location
instead of double on ARM64, this fixes the debuggable tests.
TODO: Fix JDWP tests.
Bug: 19264997
Change-Id: I7c55f69c61d1b45351fd0dc7185ffe5efad82bd3
ART: Fix casts for 64-bit pointers on 32-bit compiler.
Bug: 19264997
Change-Id: Ief45cdd4bae5a43fc8bfdfa7cf744e2c57529457
Fix JDWP tests after ArtMethod change
Fixes Throwable::GetStackDepth for exception event detection after
internal stack trace representation change.
Adds missing ArtMethod::GetInterfaceMethodIfProxy call in case of
proxy method.
Bug: 19264997
Change-Id: I363e293796848c3ec491c963813f62d868da44d2
Fix accidental IMT and root marking regression
Was always using the conflict trampoline. Also included fix for
regression in GC time caused by extra roots. Most of the regression
was IMT.
Fixed bug in DumpGcPerformanceInfo where we would get SIGABRT due to
detached thread.
EvaluateAndApplyChanges:
From ~2500 -> ~1980
GC time: 8.2s -> 7.2s due to 1s less of MarkConcurrentRoots
Bug: 19264997
Change-Id: I4333e80a8268c2ed1284f87f25b9f113d4f2c7e0
Fix bogus image test assert
Previously we were comparing the size of the non moving space to
size of the image file.
Now we properly compare the size of the image space against the size
of the image file.
Bug: 19264997
Change-Id: I7359f1f73ae3df60c5147245935a24431c04808a
[MIPS64] Fix art_quick_invoke_stub argument offsets.
ArtMethod reference's size got bigger, so we need to move other args
and leave enough space for ArtMethod* and 'this' pointer.
This fixes mips64 boot.
Bug: 19264997
Change-Id: I47198d5f39a4caab30b3b77479d5eedaad5006ab
|
| e401d146407d61eeb99f8d6176b2ac13c4df1e33 |
|
22-Apr-2015 |
Mathieu Chartier <mathieuc@google.com> |
Move mirror::ArtMethod to native
Optimizing + quick tests are passing, devices boot.
TODO: Test and fix bugs in mips64.
Saves 16 bytes per most ArtMethod, 7.5MB reduction in system PSS.
Some of the savings are from removal of virtual methods and direct
methods object arrays.
Bug: 19264997
Change-Id: I622469a0cfa0e7082a2119f3d6a9491eb61e3f3d
|
| 8ea18d0f066f63fa4e5d154f14327468bf288e2b |
|
26-May-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Pass the dex method index directly to interface trampoline.
This avoids computing the dex pc and re-finding the method
index again. I have kept the code for kDebugBuild.
Change-Id: Icd60e0deade755e32b54021c0875b1af592b8c3e
|
| 9bd88b0933a372e6a7b64b850868e6a7998567e2 |
|
22-Apr-2015 |
Serban Constantinescu <serban.constantinescu@linaro.org> |
ARM64: Move xSELF from x18 to x19.
This patch moves xSELF to callee saved x19 and removes support for
ETR (external thread register), previously used across native calls.
Change-Id: Icee07fbb9292425947f7de33d10a0ddf98c7899b
Signed-off-by: Serban Constantinescu <serban.constantinescu@linaro.org>
|
| 7ea6a170486d81b127e69673cd1020c4db628c93 |
|
19-May-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Don't hardcode the location of the caller.
This is to avoid shooting ourselves in the foot when
dealing with inlined frames. Instead, use common methods
for fetching the caller and its dex pc.
Change-Id: I3467a7b50cf163022d332e80356f0aab747de252
|
| 27a4a9d2a488dd57cd00d9108d10defde04141a2 |
|
05-May-2015 |
Sebastien Hertz <shertz@google.com> |
Fix instrumentation exit stub for arm64
Fixes bad offset to restore register x21.
Bug: 20798393
(cherry picked from commit a538effb3f848bfec232c55f167b9f35b416948f)
Change-Id: I030d848ab0f46043e86f53abae204463f0aaccbe
|
| a538effb3f848bfec232c55f167b9f35b416948f |
|
05-May-2015 |
Sebastien Hertz <shertz@google.com> |
Fix instrumentation exit stub for arm64
Fixes bad offset to restore register x21.
Bug: 20798393
Change-Id: I030d848ab0f46043e86f53abae204463f0aaccbe
|
| 848f70a3d73833fc1bf3032a9ff6812e429661d9 |
|
15-Jan-2014 |
Jeff Hao <jeffhao@google.com> |
Replace String CharArray with internal uint16_t array.
Summary of high level changes:
- Adds compiler inliner support to identify string init methods
- Adds compiler support (quick & optimizing) with new invoke code path
that calls method off the thread pointer
- Adds thread entrypoints for all string init methods
- Adds map to verifier to log when receiver of string init has been
copied to other registers. used by compiler and interpreter
Change-Id: I797b992a8feb566f9ad73060011ab6f51eb7ce01
|
| 5ea536aa4a6414db01beaf6f8bd8cb9adc5cfc92 |
|
20-Apr-2015 |
Vladimir Marko <vmarko@google.com> |
Remove ArtMethod* parameter from dex cache entry points.
Load the ArtMethod* using an optimized stack walk instead.
This reduces the size of the generated code.
Three of the entry points are called only from a slow-path
and the fourth (InitializeTypeAndVerifyAccess) is rare and
already slow enough that the one or two extra loads
(depending on whether we already have the ArtMethod* in a
register) are insignificant. And as we're starting to use
PC-relative addressing of the dex cache arrays (already
done by Quick for the boot image), having the ArtMethod* in
a register becomes less likely anyway.
Change-Id: Ib19b9d204e355e13bf386662a8b158178bf8ad28
|
| 2cebb24bfc3247d3e9be138a3350106737455918 |
|
22-Apr-2015 |
Mathieu Chartier <mathieuc@google.com> |
Replace NULL with nullptr
Also fixed some lines that were too long, and a few other minor
details.
Change-Id: I6efba5fb6e03eb5d0a300fddb2a75bf8e2f175cb
|
| 69a503050fb8a7b3a79b2cd2cdc2d8fbc594575d |
|
14-Apr-2015 |
Zheng Xu <zheng.xu@arm.com> |
ARM64: Remove suspend register.
It also clean up build/remove frame used by JNI compiler and generates
stp/ldp instead of str/ldr. Also x19 has been unblocked in both quick and
optimizing compiler.
Change-Id: Idbeac0942265f493266b2ef9b7a65bb4054f0e2d
|
| bb87e0f1a52de656bc77cb01cb887e51a0e5198b |
|
03-Apr-2015 |
Mathieu Chartier <mathieuc@google.com> |
Refactor and improve GC root handling
Changed GcRoot to use compressed references. Changed root visiting to
use virtual functions instead of function pointers. Changed root visting
interface to be an array of roots instead of a single root at a time.
Added buffered root marking helper to avoid dispatch overhead.
Root marking seems a bit faster on EvaluateAndApplyChanges due to batch
marking. Pause times unaffected.
Mips64 is untested but might work, maybe.
Before:
MarkConcurrentRoots: Sum: 67.678ms 99% C.I. 2us-664.999us Avg: 161.138us Max: 671us
After:
MarkConcurrentRoots: Sum: 54.806ms 99% C.I. 2us-499.986us Avg: 136.333us Max: 602us
Bug: 19264997
Change-Id: I0a71ebb5928f205b9b3f7945b25db6489d5657ca
|
| e15ea086439b41a805d164d2beb07b4ba96aaa97 |
|
10-Feb-2015 |
Hiroshi Yamauchi <yamauchi@google.com> |
Reserve bits in the lock word for read barriers.
This prepares for the CC collector to use the standard object header
model by storing the read barrier state in the lock word.
Bug: 19355854
Bug: 12687968
Change-Id: Ia7585662dd2cebf0479a3e74f734afe5059fb70f
|
| 126d65952a03b3e44d5021208673c01920a982a4 |
|
03-Mar-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Fix generic JNI stubs to not discard the Java native frame.
Change-Id: Ic856b442fdde5ce91673fc5856eb0dfc84c75d28
|
| 1cc7dbabd03e0a6c09d68161417a21bd6f9df371 |
|
18-Dec-2014 |
Andreas Gampe <agampe@google.com> |
ART: Reorder entrypoint argument order
Shuffle the ArtMethod* referrer backwards for easier removal.
Clean up ARM & MIPS assembly code.
Change some macros to make future changes easier.
Change-Id: Ie2862b68bd6e519438e83eecd9e1611df51d7945
|
| 4808846b2a8647a448aaa05d561a4f60b190196b |
|
12-Dec-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Save all registers in native to Java stubs.
This will make things more friendly when experimenting with the
number of callee saves in optimizing.
Change-Id: Iefd9a2da329a420eb69fc2fa9e91c06bbda30cdb
|
| 2d7210188805292e463be4bcf7a133b654d7e0ea |
|
10-Nov-2014 |
Mathieu Chartier <mathieuc@google.com> |
Change 64 bit ArtMethod fields to be pointer sized
Changed the 64 bit entrypoint and gc map fields in ArtMethod to be
pointer sized. This saves a large amount of memory on 32 bit systems.
Reduces ArtMethod size by 16 bytes on 32 bit.
Total number of ArtMethod on low memory mako: 169957
Image size: 49203 methods -> 787248 image size reduction.
Zygote space size: 1070 methods -> 17120 size reduction.
App methods: ~120k -> 2 MB savings.
Savings per app on low memory mako: 125K+ per app
(less active apps -> more image methods per app).
Savings depend on how often the shared methods are on dirty pages vs
shared.
TODO in another CL, delete gc map field from ArtMethod since we
should be able to get it from the Oat method header.
Bug: 17643507
Change-Id: Ie9508f05907a9f693882d4d32a564460bf273ee8
(cherry picked from commit e832e64a7e82d7f72aedbd7d798fb929d458ee8f)
|
| e832e64a7e82d7f72aedbd7d798fb929d458ee8f |
|
10-Nov-2014 |
Mathieu Chartier <mathieuc@google.com> |
Change 64 bit ArtMethod fields to be pointer sized
Changed the 64 bit entrypoint and gc map fields in ArtMethod to be
pointer sized. This saves a large amount of memory on 32 bit systems.
Reduces ArtMethod size by 16 bytes on 32 bit.
Total number of ArtMethod on low memory mako: 169957
Image size: 49203 methods -> 787248 image size reduction.
Zygote space size: 1070 methods -> 17120 size reduction.
App methods: ~120k -> 2 MB savings.
Savings per app on low memory mako: 125K+ per app
(less active apps -> more image methods per app).
Savings depend on how often the shared methods are on dirty pages vs
shared.
TODO in another CL, delete gc map field from ArtMethod since we
should be able to get it from the Oat method header.
Bug: 17643507
Change-Id: Ie9508f05907a9f693882d4d32a564460bf273ee8
|
| 0ff20d50fcf120b798cabf8cebd77d54850e6cd5 |
|
22-Oct-2014 |
Stephen Kyle <stephen.kyle@arm.com> |
Fix arm64 bug introduced by refactoring.
- Commit 1d8cdbc5202378 made changes to the parameters for
artSet64InstanceFromCode, but did not change THREE_ARG_DOWNCALL
to THREE_ARG_REF_DOWNCALL for arm64.
Change-Id: If256b0bd32dbd1c95f61e0afcb35975bb09a8b97
Signed-off-by: Stephen Kyle <stephen.kyle@arm.com>
|
| 1d8cdbc5202378a5f1a4b3a1fba610675ed4dcd5 |
|
23-Sep-2014 |
Ian Rogers <irogers@google.com> |
Refactor quick entrypoints
Remove FinishCalleeSaveFrameSetup.
Assembly routines write down anchor into TLS as well as placing runtime
method in callee save frame.
Simplify artSet64InstanceFromCode by not computing the referrer from the
stack in the C++ code.
Move assembly offset tests next to constant declaration and tidy arch_test.
Change-Id: Iededeebc05e54a1e2bb7bb3572b8ba012cffa1c8
|
| 677cd61ad05d993c4d3b22656675874f06d6aabc |
|
15-Oct-2014 |
Ian Rogers <irogers@google.com> |
Make ART compile with GCC -O0 again.
Tidy up InstructionSetFeatures so that it has a type hierarchy dependent on
architecture.
Add to instruction_set_test to warn when InstructionSetFeatures don't agree
with ones from system properties, AT_HWCAP and /proc/cpuinfo.
Clean-up class linker entry point logic to not return entry points but to
test whether the passed code is the particular entrypoint. This works around
image trampolines that replicate entrypoints.
Bug: 17993736
(cherry picked from commit 6f3dbbadf4ce66982eb3d400e0a74cb73eb034f3)
Change-Id: I3e7595f437db4828072589d475a5453b7f31003e
|
| 6f3dbbadf4ce66982eb3d400e0a74cb73eb034f3 |
|
15-Oct-2014 |
Ian Rogers <irogers@google.com> |
Make ART compile with GCC -O0 again.
Tidy up InstructionSetFeatures so that it has a type hierarchy dependent on
architecture.
Add to instruction_set_test to warn when InstructionSetFeatures don't agree
with ones from system properties, AT_HWCAP and /proc/cpuinfo.
Clean-up class linker entry point logic to not return entry points but to
test whether the passed code is the particular entrypoint. This works around
image trampolines that replicate entrypoints.
Bug: 17993736
Change-Id: I5f4b49e88c3b02a79f9bee04f83395146ed7be23
|
| ec1694ddb034c4b86da59e9ba989ac1d8af2845c |
|
09-Oct-2014 |
Ian Rogers <irogers@google.com> |
Fix ARM64 build.
Change-Id: Ia0044523473d7a93ef3f0eed8e6c28602e767c17
|
| 3b37073e52f3b8a2a9e16bc9a019ef2607a97245 |
|
09-Oct-2014 |
Vladimir Marko <vmarko@google.com> |
Fix arm64 build: move macro usage after definition.
The build was broken by
https://android-review.googlesource.com/110341
Change-Id: I137b4bc694af15465bf0db3ffe337950064d2a53
|
| 832336b3c9eb892045a8de1bb12c9361112ca3c5 |
|
09-Oct-2014 |
Ian Rogers <irogers@google.com> |
Don't copy fill array data to quick literal pool.
Currently quick copies the fill array data from the dex file to the literal
pool. It then has to go through hoops to pass this PC relative address down
to out-of-line code. Instead, pass the offset of the table to the out-of-line
code and use the CodeItem data associated with the ArtMethod. This reduces
the size of oat code while greatly simplifying it.
Unify the FillArrayData implementation in quick, portable and the interpreters.
Change-Id: I9c6971cf46285fbf197856627368c0185fdc98ca
|
| 37f05ef45e0393de812d51261dc293240c17294d |
|
17-Jul-2014 |
Fred Shih <ffred@google.com> |
Reduced memory usage of primitive fields smaller than 4-bytes
Reduced memory used by byte and boolean fields from 4 bytes down to a
single byte and shorts and chars down to two bytes. Fields are now
arranged as Reference followed by decreasing component sizes, with
fields shuffled forward as needed.
Bug: 8135266
Change-Id: I65eaf31ed27e5bd5ba0c7d4606454b720b074752
|
| 29b3841ad8c1c18ee7ddd2d8cab85806b3d62eaa |
|
13-Aug-2014 |
Andreas Gampe <agampe@google.com> |
ART: Set default visibility to protected
Set default visibility of symbols to protected. This allows the
linker to optimize internal calls and helps avoid plt calls.
Make almost all assembly stubs hidden, as -fvisibility does not
seem to apply to them. Change the assembly tests accordingly. Also
allows to clean up previous hacks to avoid plt calls.
Bug: 16974467
(cherry picked from commit 235e77bd9f19e4faefda109be40f8744f3a66f40)
Change-Id: I9030dcf6116251f434f94a2b08e56e12085af652
|
| b038ba66a166fb264ca121632f447712e0973b5b |
|
14-Aug-2014 |
Dave Allison <dallison@google.com> |
Revert "Revert "Reduce stack usage for overflow checks""
Fixes stack protection issue.
Fixes mac build issue.
This reverts commit 83b1940e6482b9d8feba5c492507735686650ea5.
Change-Id: I7ba17252882b23a740bcda2ea94aacf398255406
|
| 4cf00ba324f5f6884059796a6ba41937f32e1844 |
|
14-Aug-2014 |
Dave Allison <dallison@google.com> |
Revert "Reduce stack usage for overflow checks"
This reverts commit 63c051a540e6dfc806f656b88ac3a63e99395429.
Change-Id: I282a048994fcd130fe73842b16c21680053c592f
|
| 03c9785a8a6d712775cf406c4371d0227c44148f |
|
14-Aug-2014 |
Dave Allison <dallison@google.com> |
Revert "Revert "Reduce stack usage for overflow checks""
Fixes stack protection issue.
Fixes mac build issue.
This reverts commit 83b1940e6482b9d8feba5c492507735686650ea5.
Change-Id: I7ba17252882b23a740bcda2ea94aacf398255406
|
| 83b1940e6482b9d8feba5c492507735686650ea5 |
|
14-Aug-2014 |
Dave Allison <dallison@google.com> |
Revert "Reduce stack usage for overflow checks"
This reverts commit 63c051a540e6dfc806f656b88ac3a63e99395429.
Change-Id: I282a048994fcd130fe73842b16c21680053c592f
|
| 235e77bd9f19e4faefda109be40f8744f3a66f40 |
|
13-Aug-2014 |
Andreas Gampe <agampe@google.com> |
ART: Set default visibility to protected
Set default visibility of symbols to protected. This allows the
linker to optimize internal calls and helps avoid plt calls.
Make almost all assembly stubs hidden, as -fvisibility does not
seem to apply to them. Change the assembly tests accordingly. Also
allows to clean up previous hacks to avoid plt calls.
Bug: 16974467
Change-Id: I9030dcf6116251f434f94a2b08e56e12085af652
|
| 63c051a540e6dfc806f656b88ac3a63e99395429 |
|
26-Jul-2014 |
Dave Allison <dallison@google.com> |
Reduce stack usage for overflow checks
This reduces the stack space reserved for overflow checks to 12K, split
into an 8K gap and a 4K protected region. GC needs over 8K when running
in a stack overflow situation.
Also prevents signal runaway by detecting a signal inside code that
resulted from a signal handler invokation. And adds a max signal count to
the SignalTest to prevent it running forever.
Also reduces the number of iterations for the InterfaceTest as this was
taking (almost) forever with the --trace option on run-test.
Bug: 15435566
Change-Id: Id4fd46f22d52d42a9eb431ca07948673e8fda694
Conflicts:
compiler/optimizing/code_generator_x86_64.cc
runtime/arch/x86/fault_handler_x86.cc
runtime/arch/x86_64/quick_entrypoints_x86_64.S
|
| 648d7112609dd19c38131b3e71c37bcbbd19d11e |
|
26-Jul-2014 |
Dave Allison <dallison@google.com> |
Reduce stack usage for overflow checks
This reduces the stack space reserved for overflow checks to 12K, split
into an 8K gap and a 4K protected region. GC needs over 8K when running
in a stack overflow situation.
Also prevents signal runaway by detecting a signal inside code that
resulted from a signal handler invokation. And adds a max signal count to
the SignalTest to prevent it running forever.
Also reduces the number of iterations for the InterfaceTest as this was
taking (almost) forever with the --trace option on run-test.
Bug: 15435566
Change-Id: Id4fd46f22d52d42a9eb431ca07948673e8fda694
|
| d74824bdd01b2a76b310e1275a1114d39833a708 |
|
12-Aug-2014 |
Zheng Xu <zheng.xu@arm.com> |
AArch64: Fix art_quick_string_compareto.
Though __memcmp16() is implemented in the same module as the caller, it
is still possible that the toolchain would put __memcmp16() into plt. In
that case, IP registers can be trashed when loading the function address.
Use x14/x15 to replace IP0/IP1.
Bug: 16974467
(cherry picked from commit 62ddb328860e907eb76ccd3abed63ba75438fea8)
Change-Id: I40e39d075860bc78624ce6ef8b4f8e33e57fc58c
|
| 62ddb328860e907eb76ccd3abed63ba75438fea8 |
|
12-Aug-2014 |
Zheng Xu <zheng.xu@arm.com> |
AArch64: Fix art_quick_string_compareto.
Though __memcmp16() is implemented in the same module as the caller, it
is still possible that the toolchain would put __memcmp16() into plt. In
that case, IP registers can be trashed when loading the function address.
Use x14/x15 to replace IP0/IP1.
Bug: 16974467
Change-Id: Ica7294b9bf90342031efa5fd51a86a6fcab5852b
|
| 7204c04dd86ae8ce05690e38737b2abf017a0a69 |
|
11-Jun-2014 |
Stuart Monteith <stuart.monteith@arm.com> |
AArch64: Implicit StackOverflow/NPE/Suspend checks.
This implements implicit stack overflow checks and null pointer exceptions
for AArch64. Suspend checks are implemented but not switched on yet.
Bug: 16256184
Change-Id: I2eb076f2c0c9d94793d5a898fea49cf409b4eb66
Signed-off-by: Stuart Monteith <stuart.monteith@arm.com>
|
| d5c78f44dc53ef9fda47a95ad3e9799be850c2b2 |
|
11-Jun-2014 |
Stuart Monteith <stuart.monteith@arm.com> |
AArch64: Implicit StackOverflow/NPE/Suspend checks.
This implements implicit stack overflow checks and null pointer exceptions
for AArch64. Suspend checks are implemented but not switched on yet.
Change-Id: I2eb076f2c0c9d94793d5a898fea49cf409b4eb66
Signed-off-by: Stuart Monteith <stuart.monteith@arm.com>
|
| b551fdcda9eb128c80de37c4fb978968bec6d4b3 |
|
25-Jul-2014 |
Zheng Xu <zheng.xu@arm.com> |
AArch64: Clean up CalleeSaveMethod frame and the use of temp registers.
CalleeSaveMethod frame size changes :
SaveAll : 368 -> 176
RefOnly : 176 -> 96
RefsAndArgs : 304 -> 224
JNI register spill size changes :
160 -> 88
In the transition assembly, use registers following the rules:
1. x0-x7 as temp/argument registers.
2. IP0, IP1 as scratch registers.
3. After correct type of callee-save-frame has been setup, all registers
are scratch-able(probably except xSELF and xSUSPEND).
4. When restore callee-save-frame, IP0 and IP1 should be untouched.
5. From C to managed code, we assume all callee save register in AAPCS
will be restored by managed code except x19(SUSPEND).
In quick compiler:
1. Use IP0, IP1 as scratch register.
2. Use IP1 as hidden argument register(IP0 will be scratched by
trampoline.)
Change-Id: I05ed9d418b01b9e87218a7608536f57e7a286e4c
|
| ab088118d33caafb00815ab72ac0fd7374169f64 |
|
14-Jul-2014 |
Hiroshi Yamauchi <yamauchi@google.com> |
Add read barriers for the roots in Runtime.
Bug: 12687968
Change-Id: If26518a8251702cfe4d5cd7d1f50e80e342704cf
|
| c200a4abeca91e19969f5b35543f17f812ba32b9 |
|
17-Jun-2014 |
Andreas Gampe <agampe@google.com> |
ART: Rework Generic JNI, add ARM version
Refactors and optimizes Generic JNI. This version uses TwoWordReturn
to avoid writing to / loading from the bottom of the alloca.
Change-Id: I3287007c976f79c9fd32d3b3a43f2d1371bf4cd3
|
| 86797a791d692f81def5c1b5f0918992c49ed122 |
|
19-Jun-2014 |
Serban Constantinescu <serban.constantinescu@arm.com> |
AArch64: Add memcmp16() for Arm64; ensure xSELF not clobbered
This patch modifies memcmp() to memcmp16(). Please note that this
implementation of memcmp16() is based on the bionic's memcmp().
However, to reflect a recent specification change, the file has been
modified to respect the new String.compareTo() behavior.
A test for memcmp16() has been added. The string_compareto test in
stub_test has been changed to invoke __memcmp16 in assembly stubs.
Add artIsAssignableFromCode to the list of native downcalls to
store and reload x18. Remove CheckSuspendFromCode, as it is unused.
Signed-off-by: Serban Constantinescu <serban.constantinescu@arm.com>
Change-Id: Ie0b5425ecfb62906d29a5d02e84c7e07ffb34a11
|
| 70f8d4b107e1f87c23df51efa360b3f4e90bce91 |
|
19-Jun-2014 |
Sebastien Hertz <shertz@google.com> |
Fix art_quick_instrumentation_exit for ARM64
Stores the integer result in x0 into the stack. Also avoids clobbering integer
result in x0 by setting it to xSELF after copying it to x2 when calling the
artInstrumentationMethodExitFromCode function.
Bug: 15690361
Change-Id: I9fb873cf32f194779f299607dda8a7316a99c528
|
| 0210d11658becc2bf02fe79788c87276a857d0e9 |
|
16-Jun-2014 |
Zheng Xu <zheng.xu@arm.com> |
AArch64: Add transition assembly to wrapper native functions.
There is slight difference between managed code ABI and AAPCS. We
can make managed code ABI to be the same with AAPCS. But considering
that, we might introduce more differences later for performance. It
is better to have a wrapper to deal with the differences.
Change-Id: I46ced072e9e3a83f713d2bf86fa478fc6144ee81
|
| 6aac355810d83babbd834df07cf1a38f44ad11c2 |
|
09-Jun-2014 |
Andreas Gampe <agampe@google.com> |
ART: Add initialize_type stubs for ARM64; indexof test
Add down-call stubs for ARM64. Add a test for indexof in stub_test.
Change-Id: I7bc045e29e4ca11ded5b318c47544edc1266afdb
|
| 4d0589c90971e19c25894414ae7da579269e1fe2 |
|
11-Jun-2014 |
Andreas Gampe <agampe@google.com> |
ART: Move __memcmp16 from Bionic to ART
Handle __memcmp16 / MemCmp16 in ART. Import assembly implementations
for arm and mips from Bionic. Use a generic C version for all other
platforms.
Removes the memcmp16 quick entrypoint, as it is never used. Bump
the oat version and update thread.cc and checks to reflect the
structural change.
Change-Id: I54a5a1da2a0a43ef271c8aeda0bf2276b8b11ac6
|
| 169489b4f4be8c5dd880ba6f152948324d22ff79 |
|
11-Jun-2014 |
Serban Constantinescu <serban.constantinescu@arm.com> |
AArch64: Add support for inlined methods
This patch adds support for Arm64 inlined methods.
Change-Id: Ic6aeed6d2d32f65cd1e63cf482f83cdcf958798a
|
| 41c507a9dae44b8329a857da3d9810fab2e9ddc6 |
|
15-May-2014 |
Alexei Zavjalov <alexei.zavjalov@intel.com> |
ART: Generalize code to find PC for artInvokeInterfaceTrampoline
This allows to determine target method when the interface method has
no dex index, now also for X86-64 and ARM64.
Add constexpr functions to callee_save_frame.h to have compile-time
sizes of callee-save frames. Add a test that ensures they agree
with computations by the corresponding ArtMethod methods.
Move some instruction-set functions into the header file to allow
inlining them. Move arch-specific pointer sizes and alignment sizes
out of globals.h to instruction_set.h to reduce dependencies.
Change-Id: I2997592c7dd1f4dd2bd497522c64bd235ae615a6
Signed-off-by: Alexei Zavjalov <alexei.zavjalov@intel.com>
|
| d58342caa97108ba413bad467c285c0377f138f5 |
|
05-Jun-2014 |
Andreas Gampe <agampe@google.com> |
ART: Add instrumentation stubs for ARM64 and X86-64
Adds instrumentation stubs necessary for debugger support.
Refactors MethodAndCode to a top-level TwoWordReturn. A function
having a return type of TwoWordReturn will return its two-word
content, either 2x32b or 2x64b, in two registers according to
the architecture's ABI.
Bug: 15443938
Change-Id: Id7e1fbd4ad8eb6f29e23d48903c76f77b28d981a
|
| d1e9167713e485d9264e856b68ffb568f22f1dc9 |
|
03-Jun-2014 |
Andreas Gampe <agampe@google.com> |
ART: Fix an error in proxy_invoke stub on ARM64
Make sure that d0 is filled with the right value, as the return
from C code is always in x0.
Bug: 15386201
Change-Id: I6c048b3d92272d769f1de3bdc9ce30733b9e1935
|
| ffddfdf6fec0b9d98a692e27242eecb15af5ead2 |
|
03-Jun-2014 |
Tim Murray <timmurray@google.com> |
DO NOT MERGE
Merge ART from AOSP to lmp-preview-dev.
Change-Id: I0f578733a4b8756fd780d4a052ad69b746f687a9
|
| cf4035a4c41ccfcc3e89a0cee25f5218a11b0705 |
|
29-May-2014 |
Andreas Gampe <agampe@google.com> |
ART: Use StackReference in Quick Stack Frame
The method reference at the bottom of a quick frame is a stack
reference and not a native pointer. This is important for 64b
architectures, where the notions do not coincide.
Change key methods to have StackReference<mirror::ArtMethod>*
parameter instead of mirror::ArtMethod**. Make changes to
invoke stubs for 64b archs, change the frame setup for JNI code
(both generic JNI and compilers), tie up loose ends.
Tested on x86 and x86-64 with host tests. On x86-64, tests succeed
with jni compiler activated. x86-64 QCG was not tested.
Tested on ARM32 with device tests.
Fix ARM64 not saving x19 (used for wSUSPEND) on upcalls.
Tested on ARM64 in interpreter-only + generic-jni mode.
Fix ARM64 JNI Compiler to work with the CL.
Tested on ARM64 in interpreter-only + jni compiler.
Change-Id: I77931a0cbadd04d163b3eb8d6f6a6f8740578f13
|
| 48241e786121e1c4c050d9cfad3d22de270a3e75 |
|
23-May-2014 |
Zheng Xu <zheng.xu@arm.com> |
AArch64: Add suspend check in managed code.
TODO: Remove x19 in the frame in runtime, generic jni, compiled jni.
Change-Id: Ibdc292c9e7adb3a5d3eff353c22f60ffc101f549
|
| ed65c5e982705defdb597d94d1aa3f2997239c9b |
|
22-May-2014 |
Serban Constantinescu <serban.constantinescu@arm.com> |
AArch64: Enable LONG_* and INT_* opcodes.
This patch fixes some of the issues with LONG and INT opcodes. The patch
has been tested and passes all the dalvik tests except for 018 and 107.
Change-Id: Idd1923ed935ee8236ab0c7e5fa969eaefeea8708
Signed-off-by: Serban Constantinescu <serban.constantinescu@arm.com>
|
| 51f763506c7bb34420242e88e1631550f94d6417 |
|
21-May-2014 |
Andreas Gampe <agampe@google.com> |
ART: Add INVOKE_TRAMPOLINE and imt_conflict stub to 64b architectures
"Generalize" the return type notion of the interface helpers.
Includes a simple test for imt_conflict. The other interface
trampolines are as of yet untested.
Change-Id: I30fc75f5103766d57628ff22bcbac7c7f81037e3
|
| 6cf80102b5f308f2a5326869343ea0d19109a7fb |
|
19-May-2014 |
Andreas Gampe <agampe@google.com> |
ART: Fix ARM64 long-jump context caller-save smashes
In aarch64, d8-d15 are callee-saved. We smashed exactly the wrong
registers.
Add code to stub_test that checks whether the callee-saved fp
registers are preserved on ARM64. There are no callee-saved registers
for x86, so the invoke methods are not extended for those architectures.
Fix a minor type in callee-save frame setup for ARM64.
Bug: 14160872
Change-Id: I080fce6eda7d560b4efb610f0e9454f3471fa4f9
|
| 675967d981a3d17aaedf4ca6e07cc3a76e066921 |
|
15-May-2014 |
Andreas Gampe <agampe@google.com> |
ART: Fix comments for dmb
Update the comments to mention correct barrier type.
Bug: 14680557
Change-Id: I26df43078c189cf16cc65e99b851981cbd063017
|
| 421c53742610c053543f8c84e04d5e0c5185d68c |
|
14-May-2014 |
Mathieu Chartier <mathieuc@google.com> |
Address comments from HandleScope change.
For:
https://android-review.googlesource.com/#/c/93793
Change-Id: I020d22a1508bf4f1770e6806d70e4fbb9a0fa0ab
|
| eb8167a4f4d27fce0530f6724ab8032610cd146b |
|
08-May-2014 |
Mathieu Chartier <mathieuc@google.com> |
Add Handle/HandleScope and delete SirtRef.
Delete SirtRef and replaced it with Handle. Handles are value types
which wrap around StackReference*.
Renamed StackIndirectReferenceTable to HandleScope.
Added a scoped handle wrapper which wraps around an Object** and
restores it in its destructor.
Renamed Handle::get -> Get.
Bug: 8473721
Change-Id: Idbfebd4f35af629f0f43931b7c5184b334822c7a
|
| 4fc046e78efbc98541388cdda986b5d8a2b951ad |
|
07-May-2014 |
Andreas Gampe <agampe@google.com> |
ART: Add lock and unlock stubs for ARM64, fix for X86-64
Basic translation of ARM stubs using dmb memory barrier.
Fix placement of dmb in unlock_object of ARM and ARM64.
Update lock and unlock tests in stub_test to force fat locks.
Fix X86-64 unlock stub.
Change-Id: Ie2e4328d9631e06843115888644e75fde8b319ee
|
| dfd891a61a1642b3c0d532e0cec73255cf4b9afb |
|
30-Apr-2014 |
Matteo Franchin <matteo.franchin@arm.com> |
AArch64: Fixing and adding arm64 trampolines.
Fixed art_quick_resolution_trampoline for Arm64.
Also added art_quick_initialize_static_storage and
art_quick_resolve_string.
Change-Id: I8a03ed8dd4e23e26e9974209e1da939361125e0c
|
| 63206f3038d3d6e1cb24166726613808a4b0ad8c |
|
07-May-2014 |
Serban Constantinescu <serban.constantinescu@arm.com> |
AArch64: Fix the usage of Thread Register for arm64
This patch cleans-up the usage of x18 as TR for Arm64. As described in
the Arm64 Procedure Call Standard, the recommended usage for x18 is to
carry inter-procedural state (i.e. ART thread information).
However, since x18 is a temporary register there is no guarantee that on
calls to external functions x18 is preserved. Thus on JNI calls we need
to save and restore x18 before coming back to managed runtime. For the
JNI compiler trampoline we move x18 (temporary register - caller saved)
to x19 (ETR, callee saved) before calling into native code, and
restore it on the way back.
Change-Id: If24091018d640027a497517a9238bf4a80d013aa
Signed-off-by: Serban Constantinescu <serban.constantinescu@arm.com>
|
| 6e4e59c674f4d58421512dbcfc57a99e27b6b5c8 |
|
06-May-2014 |
Andreas Gampe <agampe@google.com> |
ART: ARM64 field entrypoints
Add Quick field entrypoints for ARM64.
Add tests to stub_test. Make inline assembly more robust to compiler
choices for registers on ARM.
Change-Id: I199edfad5dd9b73c6f6fc8a572ff4e0e0c04921d
|
| 266340d30a2ed52a4ea0ff64492d6aac857a3e24 |
|
02-May-2014 |
Andreas Gampe <agampe@google.com> |
ART: ARM64 art_quick_string_compareto
A simple implementation of the assembly stub for ARM64.
Make the string_compareto test in stub_test more interesting by
having strings with offsets in their backing arrays.
Change-Id: Ibc3a1bdb70e3764baa6b8e793987166c67b6fb39
|
| f4e910badbaa5aa48efbf697715f4815f0ebc7e4 |
|
30-Apr-2014 |
Andreas Gampe <agampe@google.com> |
Implement art_quick_aput_object stubs for X86-64 and ARM64
Implement the aput_object stubs for 64b architectures and enable
their testing in stub_test.
Fix missing @PLT for x86.
Add automatic _local labels in function definitions in x86-64 so we
can make local jumps (instead of PLT hoops).
Change-Id: I614b88fd5966acd8a564b87c47d4c50ee605320c
|
| 00c1e6d5fa6c2c20f25c38591b9780114bf7ddbf |
|
26-Apr-2014 |
Andreas Gampe <agampe@google.com> |
Add ARM64 & X86_64 Assembly, plus tests
This adds assembly code or removes UNTESTED annotation from
TWO_ARG_DOWNCALLand THREE_ARG_DOWNCALL macros and supporting code,
generating working allocation stubs.
Some object and array allocation tests are added to the stub_test.
Change-Id: I5e93b7543c1e6dbd33b0d4cf564c7cbd963e74ef
|
| 5c1e4352614d61fed6868567e58b96682828cb4d |
|
22-Apr-2014 |
Andreas Gampe <agampe@google.com> |
Add "arch_test" gtest for assembly stub constants, add some ARM64 assembly code
Add a test that (1) checks all callee-save method frame sizes for
all architectures, (2) checks thread offsets for the runtime
architecture and (3) checks callee-save method offsets for the
runtime architecture.
The "asm_support_XXX.h" files now only contain definitions that are
common between all architectures. Architecture-specific definitions
(i.e., special registers names) have been pushed into the corresponding
.S file. This change was required to be able to undefine definitions
in the test, so that multiple tests can be written in one file.
Test (1) above is in a sense two-stage. The arch_test gtest compares
constants (if it finds them) against the frame size as reported by
the ArtMethods created by the Runtime. This works for all architectures
as we can provide the instruction-set to CreateCalleeSaveMethod. The
second stage of the "test" are preprocessor tests with "#error" in the
case that the constants are not the expected value.
Optimally I'd like to change that to an actual runtime test exercising
the assembly code, which would also allow to check whether the right
registers are stored.
Also added missing assembly code for ARM64 for the callee-save macros.
Also fix X86_64 compilation for Clang 3.5.
Change-Id: I018e6433dffd3d31ba3bfcd75661653f4c7b6552
|
| 525cde2dd7cc7ad4212765ad3975cf260a934d3e |
|
23-Apr-2014 |
Andreas Gampe <agampe@google.com> |
Add a GTest for Assembly Stubs, Add some ARM64 and X86-64 Stubs
This GTest adds some runtime testing for the stubs that does not
rely on the compiler. This should allow to add or update the stubs
and do testing, especially on architectures without working compiler.
This test is a bit dangerous: if it doesn't know how to handle an
architecture, it will only log a warning. This is so that testing
does not break at the moment. The warning is forced to stdout, too,
so that it is always visible.
Add art_quick_check_cast to ARM64 and X86-64. Add art_quick_memcpy
to X86-64. The latter should be removed in a good compiler, as it is
practically only overhead. Add minor CFI information in ARM.
Change-Id: Ia9c6d0f4035eb1527c12b5f6067dece59e25528d
|
| 75b9113b2b0a5807043af2a669a93d1579af8e2c |
|
09-Apr-2014 |
Serban Constantinescu <serban.constantinescu@arm.com> |
AArch64: Jni compiler fixes
This patch fixes some of the issues with the ARM64 assembler and JNI
compiler.
The JNI compiler is not enabled by default, yet. To enable, change
line 1884 in compiler/driver/compiler_driver.cc, removing kArm64 from
the GenericJNI list.
The compiler passes all tests in jni_compiler_test.
Also change the common_compiler_test instruction-set-features logic.
We allow tests when the build-time features are a subset of the
runtime features.
Dex2oat cross-compiling is now working. A 32b version of dex2oat should
be able to compile correctly.
Change-Id: I51d1c24f2c75d4397a11c54724a8b277ff3b3df8
Signed-off-by: Serban Constantinescu <serban.constantinescu@arm.com>
|
| 03906cffb1a59931c1c871ac3a0ffb1c4476bbb4 |
|
07-Apr-2014 |
Andreas Gampe <agampe@google.com> |
Fix ARM64 invoke stubs, correct CFI directives
The stubs do not advance over the arguments array when they cannot
place the parameter in a register. Fixed.
Changed the frame code for the invoke stubs so that CFI is easier
to apply. Also defined two macros to unite the parts that are
identical between static and dynamic invoke. With moving one statement
and accepting 12B increased (dead) code size one could almost fully
unite the implementations.
Corrected CFI directives for the CALLEE_SAVE macros.
Change-Id: Idf593fc46f0b6e1eb579010d0cdcf9c1a71730b1
|
| e62a07eac9ba2bef01f373832dd810a2cee9f348 |
|
26-Mar-2014 |
Andreas Gampe <agampe@google.com> |
Last patch for running tests on ARM64
This allows all run-tests to succeed with the interpreter+GenJNI
setup.
Change-Id: I45734e7e57340439369a613ef4329e3be2c0c4c9
|
| c6ee54e9a9fd67d24c63bd802ef2fe540a4f86a5 |
|
25-Mar-2014 |
Andreas Gampe <agampe@google.com> |
Trampoline and assembly fixes for ARM64
Trampolines need a jump, not a call. Expose br in the ARM64
assembler to allow this.
The resolution trampoline is called with the Quick ABI, and will
continue to a Quick ABI function. Then the method pointer must be
in x0.
Change-Id: I4e383b59d6c40a659d324a7faef3fadf0c890178
|
| 9de65ff3a9c49b91d80be292020f012f3d0a24ef |
|
22-Mar-2014 |
Andreas Gampe <agampe@google.com> |
Fixes to mem_map wraparound and ARM64 quick_invoke assembly
There are only 6 free GPRs for passing in a non-static invoke. This
corrupted one register for long-signature methods.
The wrap-around did not actually wrap around correctly.
Change-Id: I62658dadeb83bb22960b9455e211d26ffaa20f6f
|
| b95a5345ae4217b70ca36f0cced92f68dda7caf5 |
|
12-Mar-2014 |
Stuart Monteith <stuart.monteith@arm.com> |
AArch64: Add arm64 runtime support.
Adds support for arm64 to ART. Assembler stubs are sufficient for
down calls into interpreter. JNI compiler and generics are not finished.
Basic Generic JNI functionality.
Change-Id: I4a07c79d1e037b9f5746673480e32cf456867b82
|