/external/llvm/bindings/python/llvm/ |
H A D | enumerations.py | 27 'CallConv', 168 CallConv = [ variable
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H A D | core.py | 114 class CallConv(LLVMEnumeration): class in inherits:LLVMEnumeration 120 super(CallConv, self).__init__(name, value) 601 (CallConv, enumerations.CallConv),
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
H A D | AMDGPUISelLowering.cpp | 50 CallingConv::ID CallConv, 66 CallingConv::ID CallConv, 48 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, DebugLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 64 LowerReturn( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, DebugLoc DL, SelectionDAG &DAG) const argument
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/external/mesa3d/src/gallium/drivers/radeon/ |
H A D | AMDGPUISelLowering.cpp | 50 CallingConv::ID CallConv, 66 CallingConv::ID CallConv, 48 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, DebugLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 64 LowerReturn( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, DebugLoc DL, SelectionDAG &DAG) const argument
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/external/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 369 CallingConv::ID CallConv, 378 switch (CallConv) { 383 return LowerCCCArguments(Chain, CallConv, isVarArg, Ins, dl, DAG, InVals); 402 CallingConv::ID CallConv = CLI.CallConv; local 408 switch (CallConv) { 413 return LowerCCCCallTo(Chain, Callee, CallConv, isVarArg, isTailCall, 425 CallingConv::ID CallConv, 440 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), 523 CallingConv::ID CallConv, boo 368 LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 424 LowerCCCArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 522 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc dl, SelectionDAG &DAG) const argument 575 LowerCCCCallTo(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 714 LowerCallResult(SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument [all...] |
/external/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.h | 356 MipsCC(CallingConv::ID CallConv, bool IsO32, bool IsFP64, CCState &Info, 404 bool useRegsForByval() const { return CallConv != CallingConv::Fast; } 429 CallingConv::ID CallConv; member in class:llvm::MipsTargetLowering::MipsCC 465 CallingConv::ID CallConv, bool isVarArg, 528 CallingConv::ID CallConv, bool isVarArg, 540 bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF, 546 CallingConv::ID CallConv, bool isVarArg,
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H A D | MipsISelLowering.cpp | 2368 const uint32_t *Mask = TRI->getCallPreservedMask(CLI.CallConv); 2398 CallingConv::ID CallConv = CLI.CallConv; local 2409 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), 2413 MipsCC MipsCCInfo(CallConv, Subtarget->isABI_O32(), Subtarget->isFP64bit(), 2597 return LowerCallResult(Chain, InFlag, CallConv, IsVarArg, 2605 CallingConv::ID CallConv, bool IsVarArg, 2613 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), 2615 MipsCC MipsCCInfo(CallConv, Subtarget->isABI_O32(), Subtarget->isFP64bit(), 2644 CallingConv::ID CallConv, 2604 LowerCallResult(SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, const SDNode *CallNode, const Type *RetTy) const argument 2643 LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 2792 CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const argument 2803 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc DL, SelectionDAG &DAG) const argument [all...] |
/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 316 CallingConv::ID CallConv, bool isVarArg, 325 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), 364 CallingConv::ID CallConv, bool isVarArg, 375 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), 405 CallingConv::ID CallConv = CLI.CallConv; local 430 HexagonCCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), 443 isTailCall = IsEligibleForTailCallOptimization(Callee, CallConv, 611 return LowerCallResult(Chain, InFlag, CallConv, isVarArg, Ins, dl, DAG, 829 CallingConv::ID CallConv, 315 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc dl, SelectionDAG &DAG) const argument 363 LowerCallResult(SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, const SmallVectorImpl<SDValue> &OutVals, SDValue Callee) const argument 828 LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument [all...] |
/external/llvm/lib/Target/R600/ |
H A D | R600ISelLowering.cpp | 1660 CallingConv::ID CallConv, 1666 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), 1658 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
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H A D | SIISelLowering.cpp | 306 CallingConv::ID CallConv, 318 assert(CallConv == CallingConv::C); 365 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), 304 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
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H A D | AMDGPUISelLowering.cpp | 490 CallingConv::ID CallConv, 488 LowerReturn( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc DL, SelectionDAG &DAG) const argument
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/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 1042 CallingConv::ID CallConv = CLI.CallConv; local 1049 switch (CallConv) 1055 return LowerCCCCallTo(Chain, Callee, CallConv, isVarArg, isTailCall, 1111 CallingConv::ID CallConv, bool isVarArg, 1121 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), 1132 CCState RetCCInfo(CallConv, isVarArg, DAG.getMachineFunction(), 1249 CallingConv::ID CallConv, 1256 switch (CallConv) 1262 return LowerCCCArguments(Chain, CallConv, isVarAr 1110 LowerCCCCallTo(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 1248 LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 1272 LowerCCCArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 1441 CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const argument 1455 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc dl, SelectionDAG &DAG) const argument [all...] |
/external/llvm/bindings/ocaml/llvm/ |
H A D | llvm.ml | 69 module CallConv = struct module
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H A D | llvm.mli | 111 module CallConv : sig module 1695 {!CallConv}. See the method [llvm::CallInst::getCallingConv] and 1701 values from the module {!CallConv}.
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/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 1627 SDValue Chain, CallingConv::ID CallConv, bool isVarArg, 1934 NVPTXTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv, argument 1626 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
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/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 172 CallingConv::ID CallConv, bool IsVarArg, 177 return LowerReturn_64(Chain, CallConv, IsVarArg, Outs, OutVals, DL, DAG); 178 return LowerReturn_32(Chain, CallConv, IsVarArg, Outs, OutVals, DL, DAG); 183 CallingConv::ID CallConv, bool IsVarArg, 193 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), 245 CallingConv::ID CallConv, bool IsVarArg, 253 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), 322 CallingConv::ID CallConv, 329 return LowerFormalArguments_64(Chain, CallConv, IsVarArg, Ins, 331 return LowerFormalArguments_32(Chain, CallConv, IsVarAr 171 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc DL, SelectionDAG &DAG) const argument 182 LowerReturn_32(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc DL, SelectionDAG &DAG) const argument 244 LowerReturn_64(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc DL, SelectionDAG &DAG) const argument 321 LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 339 LowerFormalArguments_32(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 541 LowerFormalArguments_64(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 693 CallingConv::ID CallConv = CLI.CallConv; local [all...] |
/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 667 LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, argument 681 CCState CCInfo(CallConv, IsVarArg, MF, DAG.getTarget(), ArgLocs, 813 CallingConv::ID CallConv = CLI.CallConv; local 820 CCState ArgCCInfo(CallConv, IsVarArg, MF, DAG.getTarget(), ArgLocs, 919 const uint32_t *Mask = TRI->getCallPreservedMask(CallConv); 943 CCState RetCCInfo(CallConv, IsVarArg, MF, DAG.getTarget(), RetLocs, 967 CallingConv::ID CallConv, bool IsVarArg, 975 CCState RetCCInfo(CallConv, IsVarArg, MF, DAG.getTarget(), RetLocs, 966 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc DL, SelectionDAG &DAG) const argument
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/external/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 1849 X86TargetLowering::CanLowerReturn(CallingConv::ID CallConv, argument 1854 CCState CCInfo(CallConv, isVarArg, MF, MF.getTarget(), 1866 CallingConv::ID CallConv, bool isVarArg, 1874 CCState CCInfo(CallConv, isVarArg, MF, DAG.getTarget(), 2037 CallingConv::ID CallConv, bool isVarArg, 2045 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), 2188 CallingConv::ID CallConv, 2197 CallConv, DAG.getTarget().Options.GuaranteedTailCallOpt); 2229 CallingConv::ID CallConv, 2247 bool IsWin64 = Subtarget->isCallingConvWin64(CallConv); 1865 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc dl, SelectionDAG &DAG) const argument 2036 LowerCallResult(SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 2187 LowerMemArgument(SDValue Chain, CallingConv::ID CallConv, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, const CCValAssign &VA, MachineFrameInfo *MFI, unsigned i) const argument 2228 LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 2577 CallingConv::ID CallConv = CLI.CallConv; local [all...] |
/external/clang/lib/AST/ |
H A D | ASTContext.cpp | 2788 const CallingConv CallConv = Info.getCC(); local 2810 FunctionProtoType::ExtInfo newInfo = Info.withCallingConv(CallConv);
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 1645 SDValue Chain, CallingConv::ID CallConv, bool isVarArg, 1653 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), 1679 CCAssignFn *AssignFn = CCAssignFnForCall(CallConv, /*IsVarArg=*/false); 1817 if (DoesCalleeRestoreStack(CallConv, TailCallOpt)) { 1914 SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, 1918 CCAssignFn *RetCC = CallConv == CallingConv::WebKit_JS 1923 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), 2121 CallingConv::ID CallConv = CLI.CallConv; local 2135 Callee, CallConv, IsVarAr 1644 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 1913 LowerCallResult( SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, bool isThisReturn, SDValue ThisVal) const argument 2469 CanLowerReturn( CallingConv::ID CallConv, MachineFunction &MF, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const argument 2481 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc DL, SelectionDAG &DAG) const argument [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 1251 CallingConv::ID CallConv, bool isVarArg, 1259 ARMCCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), 1262 CCAssignFnForNode(CallConv, /* Return*/ true, 1389 CallingConv::ID CallConv = CLI.CallConv; local 1404 isTailCall = IsEligibleForTailCallOptimization(Callee, CallConv, 1420 ARMCCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), 1423 CCAssignFnForNode(CallConv, /* Return*/ false, 1747 Mask = ARI->getThisReturnPreservedMask(CallConv); 1753 Mask = ARI->getCallPreservedMask(CallConv); 1250 LowerCallResult(SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, bool isThisReturn, SDValue ThisVal) const argument 2036 CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const argument 2079 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc dl, SelectionDAG &DAG) const argument 2905 LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 10928 functionArgumentNeedsConsecutiveRegisters( Type *Ty, CallingConv::ID CallConv, bool isVarArg) const argument [all...] |
/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 2174 CallingConv::ID CallConv, bool isVarArg, 2182 return LowerFormalArguments_64SVR4(Chain, CallConv, isVarArg, Ins, 2185 return LowerFormalArguments_32SVR4(Chain, CallConv, isVarArg, Ins, 2188 return LowerFormalArguments_Darwin(Chain, CallConv, isVarArg, Ins, 2196 CallingConv::ID CallConv, bool isVarArg, 2238 (CallConv == CallingConv::Fast)); 2243 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), 2317 CCState CCByValInfo(CallConv, isVarArg, DAG.getMachineFunction(), 2433 CallingConv::ID CallConv, bool isVarArg, 2448 (CallConv 2173 LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 2194 LowerFormalArguments_32SVR4( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 2431 LowerFormalArguments_64SVR4( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 2706 LowerFormalArguments_Darwin( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 3518 LowerCallResult(SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 3564 FinishCall(CallingConv::ID CallConv, SDLoc dl, bool isTailCall, bool isVarArg, SelectionDAG &DAG, SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass, SDValue InFlag, SDValue Chain, SDValue &Callee, int SPDiff, unsigned NumBytes, const SmallVectorImpl<ISD::InputArg> &Ins, SmallVectorImpl<SDValue> &InVals) const argument 3677 CallingConv::ID CallConv = CLI.CallConv; local 3705 LowerCall_32SVR4(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 3942 LowerCall_64SVR4(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 4357 LowerCall_Darwin(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 4749 CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const argument 4760 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc dl, SelectionDAG &DAG) const argument [all...] |