/external/llvm/lib/Target/AArch64/ |
H A D | AArch64RegisterInfo.cpp | 83 Reserved.set(AArch64::SP); 113 case AArch64::SP: 153 // from the other direction like the SP normally works. 174 return TFI->hasFP(MF) ? AArch64::FP : AArch64::SP; 192 // FP when there's no better way to access it (SP or base pointer). 213 /// or SP. Used by LocalStackFrameAllocation to determine which frame index 236 // Note that the incoming offset is based on the SP value at function entry, 247 // The incoming offset is relating to the SP at the start of the function, 248 // but when we access the local it'll be relative to the SP after local 249 // allocation, so adjust our SP [all...] |
/external/llvm/lib/Target/Mips/ |
H A D | MipsSEInstrInfo.cpp | 359 /// Adjust SP by Amount bytes. 360 void MipsSEInstrInfo::adjustStackPtr(unsigned SP, int64_t Amount, argument 369 BuildMI(MBB, I, DL, get(ADDiu), SP).addReg(SP).addImm(Amount); 372 BuildMI(MBB, I, DL, get(ADDu), SP).addReg(SP).addReg(Reg, RegState::Kill); 599 unsigned SP = STI.isGP64bit() ? Mips::SP_64 : Mips::SP; local 614 BuildMI(MBB, I, I->getDebugLoc(), TM.getInstrInfo()->get(ADDU), SP) 615 .addReg(SP) [all...] |
H A D | MipsSERegisterInfo.cpp | 135 FrameReg = Subtarget.isABI_N64() ? Mips::SP_64 : Mips::SP;
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H A D | Mips16ISelDAGToDAG.cpp | 94 // Insert instructions to initialize the Mips16 SP Alias register in the 110 .addReg(Mips::SP); 119 /// SP into a Mips16 accessible aliased register. 156 AliasReg = CurDAG->getRegister(Mips::SP, getTargetLowering()->getPointerTy());
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/external/chromium_org/third_party/npapi/npspy/extern/nspr/md/ |
H A D | _win16.h | 132 void *SP; /* Stack pointer, used only by GarbColl */ member in struct:_MDThread 452 ** context[2] - SP 463 #define _MD_GET_SP(thread) ((thread)->md.SP) 483 (_t)->md.SP = &garbCollPlaceHolder; \ 492 (_t)->md.SP = &garbCollPlaceHolder; \
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/external/nist-sip/java/gov/nist/javax/sip/header/ |
H A D | Challenge.java | 83 .append(SP)
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H A D | Via.java | 261 buffer.append(SP); 268 buffer.append(SP).append(LPAREN).append(comment).append(RPAREN);
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/external/llvm/include/llvm/CodeGen/ |
H A D | MachineFrameInfo.h | 112 StackObject(uint64_t Sz, unsigned Al, int64_t SP, bool IM, argument 114 : SPOffset(SP), Size(Sz), Alignment(Al), isImmutable(IM), 161 /// SP-relative and FP-relative offsets. E.G., if objects are accessed via 162 /// SP then OffsetAdjustment is zero; if FP is used, OffsetAdjustment is set 163 /// to the distance between the initial SP and the value in FP. For many
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/external/valgrind/main/coregrind/ |
H A D | m_stacks.c | 48 (4k) stack is allocated. When SP moves below that for the first 50 faulting address is in the range from SP - VG_STACK_REDZONE_SZB 58 update stack permissions around SP, so we need to spot all writes 59 to SP anyway. 61 The deal is: when SP is assigned a lower value, the stack is being 64 all bytes in the area just "uncovered" by this SP change as 67 When SP goes back up, mark the area receded over as unreadable and 70 Just to record the SP boundary conditions somewhere convenient: 71 SP - VG_STACK_REDZONE_SZB always points to the lowest live byte in 72 the stack. All addresses below SP 264 stack_limits(Addr SP, Addr *start, Addr *end ) argument [all...] |
/external/pcre/dist/ |
H A D | pcre_dfa_exec.c | 88 #define SP " " macro 358 DPRINTF(("%.*sADD_ACTIVE(%d,%d)\n", rlevel*2-2, SP, (x), (y))); \ 369 DPRINTF(("%.*sADD_ACTIVE_DATA(%d,%d,%d)\n", rlevel*2-2, SP, (x), (y), (z))); \ 379 DPRINTF(("%.*sADD_NEW(%d,%d)\n", rlevel*2-2, SP, (x), (y))); \ 390 DPRINTF(("%.*sADD_NEW_DATA(%d,%d,%d) line %d\n", rlevel*2-2, SP, \ 444 rlevel*2-2, SP, rlevel*2-2, SP, rlevel)); 571 DPRINTF(("%.*sEnd state = %d\n", rlevel*2-2, SP, (int)(end_code - start_code))); 599 printf("%.*sNext character: rest of subject = \"", rlevel*2-2, SP); 603 printf("%.*sActive states: ", rlevel*2-2, SP); [all...] |
/external/llvm/lib/Target/X86/ |
H A D | X86RegisterInfo.cpp | 415 // use both the SP and the FP, we need a separate base pointer register. 548 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP: 549 return X86::SP; 576 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP: 613 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP: 614 return X86::SP; 649 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP: 685 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
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/external/llvm/lib/CodeGen/AsmPrinter/ |
H A D | DwarfUnit.h | 337 void addSourceLine(DIE &Die, DISubprogram SP); 399 /// getOrCreateSubprogramDIE - Create new DIE using SP. 400 DIE *getOrCreateSubprogramDIE(DISubprogram SP); 402 void applySubprogramAttributes(DISubprogram SP, DIE &SPDie); 403 void applySubprogramAttributesToDefinition(DISubprogram SP, DIE &SPDie);
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/external/llvm/lib/Target/ARM/ |
H A D | ARMBaseRegisterInfo.h | 43 case LR: case SP: case PC: 91 /// frames. I.e., when we need a 3rd base, not just SP and FP, due to
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H A D | ARMAsmPrinter.cpp | 1029 SrcReg = DstReg = ARM::SP; 1038 assert(DstReg == ARM::SP && 1057 assert(SrcReg == ARM::SP && 1072 assert(MI->getOperand(2).getReg() == ARM::SP && 1081 if (SrcReg == ARM::SP) { 1124 if (DstReg == FramePtr && FramePtr != ARM::SP) 1127 ATS.emitSetFP(FramePtr, ARM::SP, -Offset); 1128 else if (DstReg == ARM::SP) { 1129 // Change of SP by an offset. Positive values correspond to "sub" 1133 // Move of SP t [all...] |
H A D | Thumb2SizeReduction.cpp | 351 if (Reg == ARM::SP) { 384 if (MI->getOperand(1).getReg() == ARM::SP) { 441 if (BaseReg != ARM::SP) 455 if (BaseReg == ARM::SP && 531 // If the source register is SP, try to reduce to tADDrSPi, otherwise 533 if (MI->getOperand(1).getReg() != ARM::SP) {
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H A D | ARMBaseRegisterInfo.cpp | 82 // Generally only R13-R14 (i.e. SP, LR) are automatically preserved by 128 Reserved.set(ARM::SP); 322 // It's going to be better to use the SP or Base Pointer instead. When there 323 // are variable sized objects, we can't reference off of the SP, so we 392 return ARM::SP; 495 /// or SP. Used by LocalStackFrameAllocation to determine which frame index 529 // Note that the incoming offset is based on the SP value at function entry, 545 // The incoming offset is relating to the SP at the start of the function, 546 // but when we access the local it'll be relative to the SP after local 547 // allocation, so adjust our SP [all...] |
/external/llvm/lib/Target/XCore/MCTargetDesc/ |
H A D | XCoreMCTargetDesc.cpp | 60 // Initial state of the frame pointer is SP. 61 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, XCore::SP, 0);
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/external/nist-sip/java/gov/nist/javax/sip/address/ |
H A D | AddressImpl.java | 176 .append(SP);
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/external/nist-sip/java/gov/nist/javax/sip/header/ims/ |
H A D | SecurityAgree.java | 122 return this.secMechanism + SEMICOLON + SP + parameters.encode();
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/external/clang/lib/StaticAnalyzer/Core/ |
H A D | ExplodedGraph.cpp | 153 if (Optional<StmtPoint> SP = SuccLoc.getAs<StmtPoint>()) 154 if (CallEvent::isCallStmt(SP->getStmt()))
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/external/llvm/lib/CodeGen/ |
H A D | LocalStackSlotAllocation.cpp | 191 StackProtector *SP = &getAnalysis<StackProtector>(); local 211 switch (SP->getSSPLayout(MFI->getObjectAllocation(i))) {
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H A D | StackColoring.cpp | 123 StackProtector *SP; member in class:__anon25826::StackColoring 495 SP->adjustForColoring(From, To); 646 SP = &getAnalysis<StackProtector>();
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/external/nist-sip/java/gov/nist/core/ |
H A D | GenericObjectList.java | 58 protected static final String SP = Separators.SP; field in class:GenericObjectList
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/external/clang/lib/CodeGen/ |
H A D | CGDebugInfo.cpp | 1120 llvm::DISubprogram SP = local 1129 SPCache[Method->getCanonicalDecl()] = llvm::WeakVH(SP); 1131 return SP; 2360 llvm::DISubprogram SP = local 2362 return SP; 2367 llvm::DISubprogram SP(dyn_cast_or_null<llvm::MDNode>(V)); 2368 if (SP.isSubprogram() && !SP.isDefinition()) 2369 return SP; 2377 llvm::DISubprogram SP(dyn_cast_or_nul 2532 llvm::DISubprogram SP = local [all...] |
/external/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMELFStreamer.cpp | 177 assert((Reg != ARM::SP && Reg != ARM::PC) && 1087 FPReg = ARM::SP; 1252 assert((NewSPReg == ARM::SP || NewSPReg == FPReg) && 1258 if (NewSPReg == ARM::SP) 1265 assert((Reg != ARM::SP && Reg != ARM::PC) && 1267 assert(FPReg == ARM::SP && "current FP must be SP");
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