Searched refs:Load1 (Results 1 - 12 of 12) sorted by relevance
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
H A D | AMDGPUInstrInfo.cpp | 187 bool AMDGPUInstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, argument
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H A D | AMDGPUInstrInfo.h | 109 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
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/external/llvm/lib/Target/R600/ |
H A D | AMDGPUInstrInfo.h | 123 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
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H A D | AMDGPUInstrInfo.cpp | 218 bool AMDGPUInstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, argument
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/external/mesa3d/src/gallium/drivers/radeon/ |
H A D | AMDGPUInstrInfo.cpp | 187 bool AMDGPUInstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, argument
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H A D | AMDGPUInstrInfo.h | 109 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
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/external/llvm/lib/Target/X86/ |
H A D | X86InstrInfo.h | 345 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1, 355 /// have already been scheduled after Load1. 356 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
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H A D | X86InstrInfo.cpp | 4830 X86InstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, argument 4832 if (!Load1->isMachineOpcode() || !Load2->isMachineOpcode()) 4834 unsigned Opc1 = Load1->getMachineOpcode(); 4912 if (Load1->getOperand(0) != Load2->getOperand(0) || 4913 Load1->getOperand(5) != Load2->getOperand(5)) 4916 if (Load1->getOperand(4) != Load2->getOperand(4)) 4919 if (Load1->getOperand(1) == Load2->getOperand(1) && 4920 Load1->getOperand(2) == Load2->getOperand(2)) { 4921 if (cast<ConstantSDNode>(Load1->getOperand(1))->getZExtValue() != 1) 4925 if (isa<ConstantSDNode>(Load1 4935 shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1, int64_t Offset2, unsigned NumLoads) const argument [all...] |
H A D | X86ISelLowering.cpp | 20850 SDValue Load1 = DAG.getLoad(HalfVT, dl, Ld->getChain(), Ptr, 20860 Load1.getValue(1), 20864 NewVec = Insert128BitVector(NewVec, Load1, 0, DAG, dl);
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/external/llvm/include/llvm/Target/ |
H A D | TargetInstrInfo.h | 634 virtual bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, argument 646 /// have already been scheduled after Load1. 647 virtual bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, argument
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/external/llvm/lib/Target/ARM/ |
H A D | ARMBaseInstrInfo.h | 148 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1, 158 /// have already been scheduled after Load1. 159 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
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H A D | ARMBaseInstrInfo.cpp | 1428 bool ARMBaseInstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, argument 1434 if (!Load1->isMachineOpcode() || !Load2->isMachineOpcode()) 1437 switch (Load1->getMachineOpcode()) { 1479 if (Load1->getOperand(0) != Load2->getOperand(0) || 1480 Load1->getOperand(4) != Load2->getOperand(4)) 1484 if (Load1->getOperand(3) != Load2->getOperand(3)) 1488 if (isa<ConstantSDNode>(Load1->getOperand(1)) && 1490 Offset1 = cast<ConstantSDNode>(Load1->getOperand(1))->getSExtValue(); 1505 /// have already been scheduled after Load1. 1509 bool ARMBaseInstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNod argument [all...] |
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