| cddc3e03e4ec99c0268c03a126195173e519ed58 |
|
04-Mar-2016 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master LLVM for rebase to r256229
http://b/26987366
(cherry picked from commit f3ef5332fa3f4d5ec72c178a2b19dac363a19383)
Change-Id: Ic75dcb63191d65df1b69724576392c0aaeb47728
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 6948897e478cbd66626159776a8017b3c18579b9 |
|
01-Jul-2015 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master LLVM for rebase to r239765
Bug: 20140355: This rebase pulls the upstream fix for the spurious
warnings mentioned in the bug.
Change-Id: I7fd24253c50f4d48d900875dcf43ce3f1721a3da
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 0c7f116bb6950ef819323d855415b2f2b0aad987 |
|
06-May-2015 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master LLVM for rebase to r235153
Change-Id: I9bf53792f9fc30570e81a8d80d296c681d005ea7
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 4c5e43da7792f75567b693105cc53e3f1992ad98 |
|
08-Apr-2015 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master llvm for rebase to r233350
Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| ebe69fe11e48d322045d5949c83283927a0d790b |
|
23-Mar-2015 |
Stephen Hines <srhines@google.com> |
Update aosp/master LLVM for rebase to r230699.
Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 37ed9c199ca639565f6ce88105f9e39e898d82d0 |
|
01-Dec-2014 |
Stephen Hines <srhines@google.com> |
Update aosp/master LLVM for rebase to r222494.
Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| c6a4f5e819217e1e12c458aed8e7b122e23a3a58 |
|
21-Jul-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for rebase to r212749.
Includes a cherry-pick of:
r212948 - fixes a small issue with atomic calls
Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| dce4a407a24b04eebc6a376f8e62b41aaa7b071f |
|
29-May-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
|
24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a.
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 354362524a72b3fa43a6c09380b7ae3b2380cbba |
|
19-Nov-2013 |
Juergen Ributzka <juergen@apple.com> |
[weak vtables] Remove a bunch of weak vtables
This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file. The memory leaks in this version have been fixed. Thanks
Alexey for pointing them out.
Differential Revision: http://llvm-reviews.chandlerc.com/D2068
Reviewed by Andy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195064 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| b21ab43cfc3fa0dacf5c95f04e58b6d804b59a16 |
|
18-Nov-2013 |
Alexey Samsonov <samsonov@google.com> |
Revert r194865 and r194874.
This change is incorrect. If you delete virtual destructor of both a base class
and a subclass, then the following code:
Base *foo = new Child();
delete foo;
will not cause the destructor for members of Child class. As a result, I observe
plently of memory leaks. Notable examples I investigated are:
ObjectBuffer and ObjectBufferStream, AttributeImpl and StringSAttributeImpl.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194997 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 5a364c5561ec04e33a6f5d52c14f1bac6f247ea0 |
|
15-Nov-2013 |
Juergen Ributzka <juergen@apple.com> |
[weak vtables] Remove a bunch of weak vtables
This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file.
Differential Revision: http://llvm-reviews.chandlerc.com/D2068
Reviewed by Andy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194865 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 0187e7a9ba5c50b4559e0c2e0afceb6d5cd32190 |
|
16-Jun-2013 |
David Blaikie <dblaikie@gmail.com> |
DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs
Frame index handling is now target-agnostic, so delete the target hooks
for creation & asm printing of target-specific addressing in DBG_VALUEs
and any related functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184067 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 54a56fad36a32f12709da5f96998336f08524be9 |
|
07-Jun-2013 |
Bill Wendling <isanbard@gmail.com> |
Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183490 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| cdfb55d15bbcdf1533ca26ffcb9c94fa5d225bd0 |
|
10-May-2013 |
Jyotsna Verma <jverma@codeaurora.org> |
Hexagon: Fix switch statements in GetDotOldOp and IsNewifyStore.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181628 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 1a35b8e2eb165624013d5a2eaf8b673f026999fc |
|
10-May-2013 |
Jyotsna Verma <jverma@codeaurora.org> |
Hexagon: Fix switch cases in HexagonVLIWPacketizer.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181624 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 80d81aa8ba923c9f9a953410677ac53c4c2b8318 |
|
09-May-2013 |
Jyotsna Verma <jverma@codeaurora.org> |
Hexagon: Remove switch cases from GetDotNewPredOp and isPostIncrement functions.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181535 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| f4f60b10e4ccd14511f5c83f4e83dbcad6740f63 |
|
09-May-2013 |
Jyotsna Verma <jverma@codeaurora.org> |
Hexagon: Use relation map for getMatchingCondBranchOpcode() and
getInvertedPredicatedOpcode() functions instead of switch cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181530 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 1a7eab387849feaa3e9c35f145d5b07be54686e3 |
|
06-May-2013 |
Jyotsna Verma <jverma@codeaurora.org> |
Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181235 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| aa35a569751eb79b2a2db31139932e30c6889400 |
|
03-May-2013 |
Reid Kleckner <reid@kleckner.net> |
Fix missing include in Hexagon code for Release+Asserts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180983 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| d4f8a6b9e9501f02f7888feed4e21df0d3e63b85 |
|
03-May-2013 |
Jyotsna Verma <jverma@codeaurora.org> |
reverting r180953
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180964 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 8a3f50038fa68e1c6697152ee08ad0f2faacb0b7 |
|
02-May-2013 |
Jyotsna Verma <jverma@codeaurora.org> |
Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180953 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| f945d09d53a4f2f392b8b51191d37de2f8acd566 |
|
02-May-2013 |
Jyotsna Verma <jverma@codeaurora.org> |
Hexagon: Honor __builtin_expect by using branch probabilities.
* lib/Target/Hexagon/HexagonInstrInfo.cpp (GetDotNewPredOp):
Given a jump opcode return the right pred.new jump opcode with
a taken vs not-taken hint based on branch probabilities provided
by the target independent module.
* lib/Target/Hexagon/HexagonVLIWPacketizer.cpp: Use the above function.
* lib/Target/Hexagon/HexagonNewValueJump.cpp(getNewvalueJumpOpcode):
Enhance existing function use branch probabilities like
HexagonInstrInfo::GetDotNewPredOp but for New Value (GPR) Jumps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180923 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 6ea706e40e841c148bc47bcac4dcca5e0f0245eb |
|
01-May-2013 |
Jyotsna Verma <jverma@codeaurora.org> |
Hexagon: Use multiclass for Jump instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180885 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| f9759c9f08af056ca6a496d846dd06656b6f1d9b |
|
01-May-2013 |
Jyotsna Verma <jverma@codeaurora.org> |
Hexagon: Clear isKill flag on the predicate register in
PredicateInstruction function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180884 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 47089c91aea7bdd8b2fa81223dfdd3484a20fd12 |
|
23-Apr-2013 |
Jyotsna Verma <jverma@codeaurora.org> |
Hexagon: Remove assembler mapped instruction definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180133 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 3d7b39e7d4d3cef9f859f5965fbf959e251ee3ee |
|
23-Apr-2013 |
Jyotsna Verma <jverma@codeaurora.org> |
Hexagon: Remove duplicate instructions to handle global/immediate values
for absolute/absolute-set addressing modes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180120 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 2a88555e0d92a22b50966b223bab19d8518a8f27 |
|
29-Mar-2013 |
Jyotsna Verma <jverma@codeaurora.org> |
Hexagon: Add emitFrameIndexDebugValue function to emit debug information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178368 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 810848d5b3bc53747722db0d30a21dc168c5503e |
|
28-Mar-2013 |
Jyotsna Verma <jverma@codeaurora.org> |
Hexagon: Replace switch-case in isDotNewInst with TSFlags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178281 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 97e602b574b38d57384f0f877700357531a3d23e |
|
22-Mar-2013 |
Jyotsna Verma <jverma@codeaurora.org> |
Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and word.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177747 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| cec50e6da221edeef922a5d5f85081ba66b08dab |
|
14-Mar-2013 |
Jyotsna Verma <jverma@codeaurora.org> |
Hexagon: Removed asserts regarding alignment and offset.
We are warning the user about the alignment, so we should not assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177103 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 9feabc23b39d90f8bf9ab5ac23f5a7f8af71480a |
|
05-Mar-2013 |
Jyotsna Verma <jverma@codeaurora.org> |
Hexagon: Use MO operand flags to mark constant extended instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176500 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| ef94c6c85eed42d16fde51ee4415d27bb281a2ca |
|
01-Mar-2013 |
Jyotsna Verma <jverma@codeaurora.org> |
Hexagon: Add constant extender support framework.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176358 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 666e0d3bc4a28540c1aa73b24573af70d1d46aea |
|
13-Feb-2013 |
Anshuman Dasgupta <adasgupt@codeaurora.org> |
Hexagon: add support for predicate-GPR copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175102 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| f6563427c40774953d4a7a0387a000f7a6d94ee1 |
|
13-Feb-2013 |
Jyotsna Verma <jverma@codeaurora.org> |
Hexagon: Use absolute addressing mode loads/stores for global+offset
instead of redefining separate instructions for them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175086 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 6b8d2026ba0b60a317fa239eacbcaeff5f2270f0 |
|
12-Feb-2013 |
Jyotsna Verma <jverma@codeaurora.org> |
Hexagon: Add support to generate predicated absolute addressing mode
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174973 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 71490fa946f750fb3afe7228a32d31d401d4c1d8 |
|
11-Feb-2013 |
Krzysztof Parzyszek <kparzysz@codeaurora.org> |
Extend Hexagon hardware loop generation to handle various additional cases:
- variety of compare instructions,
- loops with no preheader,
- arbitrary lower and upper bounds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174904 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| ce55d91ec97b1227cb4cb94354c89452d787515e |
|
11-Feb-2013 |
Krzysztof Parzyszek <kparzysz@codeaurora.org> |
Implement HexagonInstrInfo::analyzeCompare.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174901 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 924223c9aba54736c86bed74ffe0ceb01467a23d |
|
01-Feb-2013 |
Jyotsna Verma <jverma@codeaurora.org> |
Replace LDriu*[bhdw]_indexed_V4 instructions with "def Pats".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174193 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| a454ffd02a7ce2f7c8ffebaad1055bf09637d21b |
|
17-Jan-2013 |
Jyotsna Verma <jverma@codeaurora.org> |
Add indexed load/store instructions for offset validation check.
This patch fixes bug 14902 - http://llvm.org/bugs/show_bug.cgi?id=14902
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172737 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| d04a8d4b33ff316ca4cf961e06c9e312eff8e64f |
|
03-Dec-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Use the new script to sort the includes of every file under lib.
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.
Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| b53b791efd85e9278baacb29745217dfa2eae775 |
|
29-Nov-2012 |
Jyotsna Verma <jverma@codeaurora.org> |
Use multiclass for 'transfer' instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168929 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 7d1b42a842754ac4db08b3bbf0087c7c8fb202fa |
|
20-Nov-2012 |
Jyotsna Verma <jverma@codeaurora.org> |
Removing some unused instruction definitions from the Hexagon backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168388 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 8aa138c12282e8bccac665f2197e817e32c2adcf |
|
01-Nov-2012 |
Pranav Bhandarkar <pranavb@codeaurora.org> |
Use the relationship models infrastructure to add two relations - getPredOpcode
and getPredNewOpcode. The first relates non predicated instructions with their
predicated forms and the second relates predicated instructions with their
predicate-new forms.
Patch by Jyotsna Verma!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167243 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 575e90e955064f60ac66230dce6c27653973c149 |
|
13-Jun-2012 |
Kay Tiong Khoo <kkhoo@perfwizard.com> |
*typo: Cyles changed to Cycles
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158404 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 5262abb2682a4d09cda3563a55f27caffb57466c |
|
14-May-2012 |
Brendon Cahoon <bcahoon@codeaurora.org> |
Revert 156634 upon request until code improvement changes are made.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156775 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 51b49c52926d65e6fe84e32894f1a8dd32223bab |
|
13-May-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Hexagon: Initialize TBB to 0.
Found by valgrind.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156744 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 2b38c12643236825a6a49c31ef49da8e62b094c2 |
|
12-May-2012 |
Sirish Pande <spande@codeaurora.org> |
Make sure new value jump is enabled for Hexagon V5 as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156700 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| b33857040f63a9fdfb0c2a2ca2af67ec12cf9d02 |
|
12-May-2012 |
Sirish Pande <spande@codeaurora.org> |
Support for Hexagon feature, New Value Jump.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156698 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 6d532d8860c07a3af3b66339f55ab91b4618ca7d |
|
11-May-2012 |
Brendon Cahoon <bcahoon@codeaurora.org> |
Hexagon constant extender support.
Patch by Jyotsna Verma.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156634 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 7517bbc91ae1c60d3c7df8b11642c7a5bb3d5a71 |
|
10-May-2012 |
Sirish Pande <spande@codeaurora.org> |
Hexagon V5 FP Support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156568 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 26f61a158b3cce69252c05cc0e79f500d6c3d92e |
|
03-May-2012 |
Sirish Pande <spande@codeaurora.org> |
Support for target dependent Hexagon VLIW packetizer.
This patch creates and optimizes packets as per Hexagon ISA rules.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156109 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
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| 71d56462a1bc885c97321eff2fc4b481fd3bf452 |
|
03-May-2012 |
Sirish Pande <spande@codeaurora.org> |
Extensions of Hexagon V4 instructions.
This adds new instructions for Hexagon V4 architecture.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156071 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
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| d410eaba04211d53a523a518a5e315eb24c1072f |
|
23-Apr-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Revert r155365, r155366, and r155367. All three of these have regression
test suite failures. The failures occur at each stage, and only get
worse, so I'm reverting all of them.
Please resubmit these patches, one at a time, after verifying that the
regression test suite passes. Never submit a patch without running the
regression test suite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155372 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
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| 15e56ad8855ff2d135a79efa71b540852acf3b97 |
|
23-Apr-2012 |
Sirish Pande <spande@codeaurora.org> |
Hexagon V5 (floating point) support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155367 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
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| 1bfd24851ef35e754d9652551e1a7abb12fe6738 |
|
23-Apr-2012 |
Sirish Pande <spande@codeaurora.org> |
Support for Hexagon architectural feature, new value jump.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155366 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
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| 0dac3919e52e28308deba555bbcb6286674d5495 |
|
23-Apr-2012 |
Sirish Pande <spande@codeaurora.org> |
Support for Hexagon VLIW Packetizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155365 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
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| 420761a0f193e87d08ee1c51b26bba23ab4bac7f |
|
20-Apr-2012 |
Craig Topper <craig.topper@gmail.com> |
Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155188 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
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| 37097623bbde5420f81ab8d1d056700f8f258025 |
|
18-Apr-2012 |
Chandler Carruth <chandlerc@gmail.com> |
This reverts a long string of commits to the Hexagon backend. These
commits have had several major issues pointed out in review, and those
issues are not being addressed in a timely fashion. Furthermore, this
was all committed leading up to the v3.1 branch, and we don't need piles
of code with outstanding issues in the branch.
It is possible that not all of these commits were necessary to revert to
get us back to a green state, but I'm going to let the Hexagon
maintainer sort that out. They can recommit, in order, after addressing
the feedback.
Reverted commits, with some notes:
Primary commit r154616: HexagonPacketizer
- There are lots of review comments here. This is the primary reason
for reverting. In particular, it introduced large amount of warnings
due to a bad construct in tablegen.
- Follow-up commits that should be folded back into this when
reposting:
- r154622: CMake fixes
- r154660: Fix numerous build warnings in release builds.
- Please don't resubmit this until the three commits above are
included, and the issues in review addressed.
Primary commit r154695: Pass to replace transfer/copy ...
- Reverted to minimize merge conflicts. I'm not aware of specific
issues with this patch.
Primary commit r154703: New Value Jump.
- Primarily reverted due to merge conflicts.
- Follow-up commits that should be folded back into this when
reposting:
- r154703: Remove iostream usage
- r154758: Fix CMake builds
- r154759: Fix build warnings in release builds
- Please incorporate these fixes and and review feedback before
resubmitting.
Primary commit r154829: Hexagon V5 (floating point) support.
- Primarily reverted due to merge conflicts.
- Follow-up commits that should be folded back into this when
reposting:
- r154841: Remove unused variable (fixing build warnings)
There are also accompanying Clang commits that will be reverted for
consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155047 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 87eb92d913c2e3cdeb08b0a22250cd6c3214a3ff |
|
16-Apr-2012 |
Sirish Pande <spande@codeaurora.org> |
Hexagon V5 (Floating Point) Support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154829 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 8800cada206d6f2eda1d54b2a40f4403e9e522bc |
|
13-Apr-2012 |
Sirish Pande <spande@codeaurora.org> |
Add support for Hexagon Architectural feature, New Value Jump.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154696 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 7a2e472d527156165273a6c105ca7a93ff9e48f8 |
|
13-Apr-2012 |
Craig Topper <craig.topper@gmail.com> |
Silence various build warnings from Hexagon backend that show up in release builds. Mostly converting 'assert(0)' to 'llvm_unreachable' to silence warnings about missing returns. Also fold some variable declarations into asserts to prevent the variables from being unused in release builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154660 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| d1a87a68064e0b9af3b71b681286954f861bb1b3 |
|
12-Apr-2012 |
Sirish Pande <spande@codeaurora.org> |
HexagonPacketizer patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154616 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| e5041e6fa8fa74a26e031b7487be1912257c87f1 |
|
12-Apr-2012 |
Evandro Menezes <emenezes@codeaurora.org> |
Hexagon: enable assembler output through the MC layer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154597 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 79aa3417eb6f58d668aadfedf075240a41d35a26 |
|
17-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152997 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| dfb4fe2862a91b23f20be08d1f1fb3a2e8344ee4 |
|
22-Feb-2012 |
Sirish Pande <spande@codeaurora.org> |
Efficient pattern for store truncate. Patch by Evandro Menezes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151166 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 31d157ae1ac2cd9c787dc3c1d28e64c682803844 |
|
18-Feb-2012 |
Jia Liu <proljc@gmail.com> |
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| ab7955b9ce3197215406bc9fc97b22074127d035 |
|
15-Feb-2012 |
Sirish Pande <spande@codeaurora.org> |
Optimize redundant sign extends and negation of predicates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150606 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| eddd6abdde2c66743e2bc3fe8996aa38d0e77b80 |
|
15-Feb-2012 |
Eric Christopher <echristo@apple.com> |
Revert "Optimize redundant sign extends and negation of predicates"
as it's breaking the build.
This reverts commit 11241abca5e2a313412fed594bb9d9fa2a2057fb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150604 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 11241abca5e2a313412fed594bb9d9fa2a2057fb |
|
15-Feb-2012 |
Sirish Pande <spande@codeaurora.org> |
Optimize redundant sign extends and negation of predicates
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150601 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| c635ebdb1a366060fe71ef3028ae888fa5e4130d |
|
08-Feb-2012 |
Brendon Cahoon <bcahoon@codeaurora.org> |
Use TSFlag bit to describe instruction properties.
Creating the isPredicated TSFlag enables the code
to use the property defined in the instruction format
instead of using a large switch statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150078 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| bc2198133a1836598b54b943420748e75d5dea94 |
|
07-Feb-2012 |
Craig Topper <craig.topper@gmail.com> |
Convert assert(0) to llvm_unreachable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149961 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| f3fd7ee415ec8a6475a060e29959d04d6158f45f |
|
06-Feb-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Hexagon: Remove forbidden iostream includes (it introduces static initializers)
Reorder includes while at it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149863 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| ee498d3254b86bceb4f441741e9f442990647ce6 |
|
01-Feb-2012 |
Andrew Trick <atrick@apple.com> |
VLIW specific scheduler framework that utilizes deterministic finite automaton (DFA).
This new scheduler plugs into the existing selection DAG scheduling framework. It is a top-down critical path scheduler that tracks register pressure and uses a DFA for pipeline modeling.
Patch by Sergei Larin!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149547 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 4d6ccb5f68cd7c6418a209f1fa4dbade569e4493 |
|
20-Jan-2012 |
David Blaikie <dblaikie@gmail.com> |
More dead code removal (using -Wunreachable-code)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148578 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| 27baab62e7d6267d9b18e4665c6bb1b75dae10d4 |
|
27-Dec-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Clean up some Release build warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147289 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| d239ff67f210094c205be7e57332948caecf6a24 |
|
15-Dec-2011 |
Tony Linthicum <tlinth@codeaurora.org> |
Add MCTargetDesc library to Hexagon target
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146692 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|
| b4b54153ad760c69a00a08531abef4ed434a5092 |
|
12-Dec-2011 |
Tony Linthicum <tlinth@codeaurora.org> |
Hexagon backend support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146412 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
|